CN108511420A - Semiconductor structure and chip - Google Patents

Semiconductor structure and chip Download PDF

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Publication number
CN108511420A
CN108511420A CN201810437298.0A CN201810437298A CN108511420A CN 108511420 A CN108511420 A CN 108511420A CN 201810437298 A CN201810437298 A CN 201810437298A CN 108511420 A CN108511420 A CN 108511420A
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China
Prior art keywords
area
divider resistance
areas
semiconductor structure
chip
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CN201810437298.0A
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Chinese (zh)
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CN108511420B (en
Inventor
胡建波
方绍明
刘义
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Shenzhen Yuan Shun Microelectronics Technology Co Ltd
Xiamen Unit Is Along Microelectric Technique Co Ltd
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Shenzhen Yuan Shun Microelectronics Technology Co Ltd
Xiamen Unit Is Along Microelectric Technique Co Ltd
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Priority to CN201810437298.0A priority Critical patent/CN108511420B/en
Publication of CN108511420A publication Critical patent/CN108511420A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/62Protection against overvoltage, e.g. fuses, shunts

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

A kind of semiconductor structure and chip.The semiconductor structure includes:Semiconductor substrate;Positioned at the diode of the semiconductor substrate, the diode includes first kind area and Second Type area;Divider resistance, the divider resistance are located above the first kind area, have insulating layer between the divider resistance and the first kind area;There is the divider resistance first end, partial pressure end and second end, the first end to be electrically connected the first kind area, and the second end is electrically connected the Second Type area.The semiconductor structure can make corresponding chip in the case where that need not coordinate with the independent divider resistance on PCB, just have reliable anti-high-voltage performance.

Description

Semiconductor structure and chip
Technical field
The present invention relates to semiconductor applications more particularly to a kind of semiconductor structures and chip.
Background technology
Chip is in use, will usually be integrated in PCB (Printed Circuit Board) above.It is again integrated above PCB Some components, such as resistance capacitance etc..These components improve cost, in order to cost-effective, these independent resistance The fewer capacitance the better.
However, chip when in use, frequently encounters the case where needing with the use of divider resistance.With using COMS techniques For chip, the metal-oxide-semiconductor resistance to compression in usual chip at more than ten volts, when voltage be more than its pressure resistance, metal-oxide-semiconductor will be punctured, caused Corresponding chip cisco unity malfunction.And in for example, by using structures such as the Analogous Integrated Electronic Circuits of COMS techniques, corresponding OVP It is to generally employ metal-oxide-semiconductor that (Over Voltage Protection, overvoltage protection or overvoltage protection) module samples, which are rectified, So corresponding input voltage cannot be excessively high.
In order to enable this kind of chip is applied in the field (such as be used in tens volts of voltage environment) of higher voltage, just not It obtains and does not realize partial pressure using independent resistance device is increased on PCB.It needs to integrate divider resistance on PCB at this time, point Piezoresistance accesses high pressure partial pressure, to make the chip being integrated on PCB obtain suitable voltage.In this case, it results in the need for Additionally integrated divider resistance.Also, this external divider resistance volume is big, and power is big, causes the complication of circuit, Yi Jicheng This raising.
Invention content
Problems solved by the invention is to provide a kind of semiconductor structure and chip, to be implemented without by peripheral hardware divider Part can reliably improve the anti-high-voltage performance of chip, to simplify circuit, reduce corresponding power, reduce cost.
To solve the above problems, the present invention provides a kind of semiconductor structures, including:Semiconductor substrate;Positioned at described half The diode of conductor substrate, the diode include first kind area and Second Type area;Divider resistance, the divider resistance position Above the first kind area, there is insulating layer between the divider resistance and the first kind area;The divider resistance With first end, partial pressure end and second end, the first end is electrically connected the first kind area, described in the second end electrical connection Second Type area.
Optionally, the side in the first kind area is surrounded by the Second Type area.
Optionally, the divider resistance is multi-helical structure, and the inner end of the helical structure is the divider resistance The first end;The outer end of the helical structure is the second end of the divider resistance.
Optionally, the plan view shape in the first kind area is circle, and the plan view shape in the Second Type area is annulus Shape.
Optionally, the first kind area is N-type region, and the Second Type area is p type island region.
Optionally, the N-type region includes the first areas N and surrounds the 2nd areas N of the first areas N side.
Optionally, the N-type region further includes the 3rd areas N, and the 3rd areas N are located at the first areas N and at least partly institute State the lower section in the 2nd areas N.
Optionally, the p type island region includes the first areas P and the 2nd areas P below the first areas P.
To solve the above problems, the present invention also provides a kind of chip, there is semiconductor as described above in the chip Structure.
Optionally, the chip is power management chip, and the partial pressure end electrical connection overvoltage of the semiconductor structure is protected Protect comparator.
In the one side of technical solution of the present invention, it will be welded on point on PCB and for chip high voltage sampling end originally Piezoresistance is integrated into semiconductor substrate, at this point, chip interior can be integrated by the independent divider resistance on PCB by being equivalent to, Circuit is simplified, also, can make that there is the chip of the semiconductor structure to have anti-high-voltage performance and save chip face Product, to cost-effective.
Meanwhile after divider resistance is integrated into semiconductor substrate (chip), due to design divider resistance and diode structure Cooperation, additionally it is possible to ensure the semiconductor structure when carrying out corresponding circuit protection, divider resistance is not easy to be burned out, to make The semiconductor structure is reliably achieved anti-high voltage functionality.Wherein, divider resistance can not be burned out, and be because entire at this time divide Piezoresistance be with diodes in parallel, the electric current for flowing through divider resistance is small, and electric current is born by diode.In addition, compared to dividing Piezoresistance was not integrated into for the case where semiconductor substrate (chip), and corresponding power (power consumption) also reduces.
Description of the drawings
Fig. 1 is semiconductor structure schematic top plan view provided in an embodiment of the present invention;
Fig. 2 is semiconductor structure diagrammatic cross-section provided in an embodiment of the present invention;
Fig. 3 is the partial circuit schematic diagram of chip provided in an embodiment of the present invention.
Specific implementation mode
As stated in the background art in the structures such as Analogous Integrated Electronic Circuits, led in high pressure due to applying corresponding chip In domain, such as tens volts of environment above, it has to realize partial pressure (concrete example using independent divider resistance device is increased on PCB Divider resistance, the OVP collection terminals of access chip are such as welded on PCB), so, individual devices increase, the face of total Product is bigger, and cost is relatively high.
For this purpose, the present invention provides a kind of semiconductor structure, this semiconductor structure directly makes phase on a semiconductor substrate The bleeder circuit answered, and corresponding semiconductor substrate can be simultaneously the semiconductor substrate of chip, tie partial pressure at this point, being equivalent to Structure is directly integrated in the chips, simplifies circuit overall structure, moreover, reducing cost.
More clearly to indicate, the present invention is described in detail below in conjunction with the accompanying drawings.
The embodiment of the present invention provides a kind of semiconductor structure, bows for semiconductor structure incorporated by reference to reference to figure 1 and Fig. 2, Fig. 1 Depending on schematic diagram, Fig. 2 is the diagrammatic cross-section of semiconductor structure.
As can be seen from Figure 2, the semiconductor structure includes semiconductor substrate 100.
In the present embodiment, semiconductor substrate 100 can be silicon substrate, can also be other substrates.Semiconductor substrate 100 can Think P type substrate.
The semiconductor structure further includes the diode (not marking) positioned at semiconductor substrate 100, and the diode includes First kind area 110 and Second Type area 120.
As can be seen from Figure 2, semiconductor structure further includes divider resistance 130.Fig. 1 shows, divider resistance 130 have first end A, Divide end B and second end C, first end A electrical connection first kind area 110, second end C electrical connection Second Types area 120.In Fig. 2 Cross-section structure in, do not show first end A electrical connection first kind area 110, second end C electrical connection Second Types area 120, this Be because Fig. 2 does not further display the structure on the upper layer again of divider resistance 130, in the structure of 130 more top of divider resistance, figure The 110 exit a of first kind area shown in 2 can be electrically connected with the first end A of divider resistance 130, and Second Type area 120 draws Outlet c can be electrically connected with the second end C of divider resistance 130.
In the top plan view of Fig. 1, divider resistance 130 is multi-helical structure, and the inner end of helical structure is divider resistance 130 first end A.The outer end of helical structure is the second end C of divider resistance 130.That is, first end A to second end C it Between wreath (helical structure) be divider resistance 130.
As can be seen from Figure 2, divider resistance 130 is located at 110 top of first kind area, divider resistance 130 and first kind area 110 Between have the first insulating layer 140.First insulating layer 140 is for so that between divider resistance 130 and first kind area 110 mutually Insulation.First insulating layer 140 can be located at 120 top of part Second Type area simultaneously.Also, the first insulating layer 140 can be with Doping mask layer as each heavily doped region subsequently mentioned.
As shown in Figure 2, the interval between the helical structure of divider resistance 130, is filled by second insulating layer 150.
In the present embodiment, first kind area 110 is N-type region, and Second Type area 120 is p type island region.
As shown in Fig. 2, N-type region further comprises the first areas N 111 and surrounds the 2nd areas N 112 of 111 side of the first areas N.
In the present embodiment, the first areas N 111 can be low pressure N well regions (Low Voltage N-well), and the 2nd areas N 112 can Think high pressure N well regions (High Voltage N-well).Correspondingly, the doping concentration in the first areas N 111 can be higher than the 2nd areas N 112 doping concentration.
As shown in Fig. 2, N-type region further includes the 3rd areas N 113, the 3rd areas N 113 are located at the first areas N 111 and at least partly The lower section in two areas N 112.
In the present embodiment, the 3rd areas N 113 can be deep-well region (Deep N-well), and the 3rd areas N 113 of setting can make The anti-high-voltage performance of diode improves.
As shown in Fig. 2, p type island region may include the first areas P 121 and the 2nd areas P 122 positioned at 121 lower section of the first areas P.
In the present embodiment, the first areas P 121 can be p-well region (P-well), and the 2nd areas P 122 can be p type buried layer (bury Layer), the 2nd areas P 122 can make the pressure-resistant performance of diode improve.
In the present embodiment, in conjunction with Fig. 1 and Fig. 2 it is found that the side in first kind area 110 is surrounded by Second Type area 120, and The bottom surface in first kind area 110 is usually then corresponding substrate.
In Fig. 1, the plan view shape in first kind area 110 is circle, and the plan view shape in Second Type area 120 is annulus Shape, the circular ring shape surround the circle.In fig. 2, the display first kind 110 two, area board edge and Second Type area 120 inside portion edge is adjacent, and the outer edge in specially the 2nd areas N 112 is adjacent with the inward flange in the first areas P 121, described inside and outside Relationship is illustrated using the first areas N 111 as inside center.
In other embodiments, the plan view shape in first kind area can also be not necessarily round, such as can be ellipse Or other shapes, the plan view shape in corresponding Second Type area may be other shapes.
It should be noted that first kind area 110 can also include N-type heavily doped region (N+), N-type heavily doped region is located at the In one areas N 111.It can be connected with corresponding conductive structure using the N-type heavily doped region, the conductive structure can be metal Line 160.Similar, Second Type area 120 can also include p-type heavily doped region (P+), and p-type heavily doped region is located at the first areas P 121 In.It can be connected with corresponding conductive structure using the p-type heavily doped region, the conductive structure can be metal wire 160.
In the present embodiment, the first end A of divider resistance 130 can be used as power input, and can be high input voltage End.Signified high pressure is a kind of relative concept in the present embodiment.This high pressure, which refers to the semiconductor structure of the present embodiment, to be used In all kinds of chips, compared with chip script is using voltage, high pressure is higher than the voltage using voltage, or and chip The operating voltage of the circuit of middle conjunction with semiconductors structure is compared, and high pressure is above the voltage of the operating voltage.For example, if core Piece is to need to be used in the environment of 100V, then it is more than the voltage ability of 100V that the first end A of divider resistance 130, which may need access, High pressure is calculated, and if fruit chip is the environment applied in 10V, then the voltage that the access of divider resistance 130 is more than 10V may be height Pressure.For another example for power management chip, usual 40V or more voltages are exactly high pressure.
In the present embodiment, corresponds to the relative concept of above-mentioned high pressure, select diode for high-voltage diode, i.e., this structure Diode can resist high pressure.Because if selection general-purpose diode (such as operating voltage range uses voltage range with chip Identical diode), in use, corresponding divider resistance 130 may be burned out.This is because the present embodiment needs Diode is wanted come the anti-high pressure that helps, prevents divider resistance 130 that can be burned out.
In the present embodiment, partial pressure end B is the output end after partial pressure, and partial pressure end B can be used for and excess voltage protection Sampling end is electrically connected.In the present embodiment, second end C can be grounded.
Semiconductor structure that the present embodiment is provided itself can belong to simulation circuit structure, still, this semiconductor Structure can be both used in inside analog circuit, can also be used in inside digital circuit.That is, either analog chip is still Digit chip, the semiconductor structure that the present embodiment can be used to be provided.
In the one side of technical solution of the present invention, it will be welded on point on PCB and for chip high voltage sampling end originally Voltage device is integrated into semiconductor substrate (divider resistance 130 is integrated in semiconductor substrate 100), at this point, being equivalent to can incite somebody to action Independent partial pressure device on PCB is integrated into chip interior, simplifies circuit, also, can make the core with this semiconductor structure Piece achievees the purpose that anti-high pressure, and can save chip area, to cost-effective.
Meanwhile after divider resistance 130 is integrated into semiconductor substrate (chip), due to design divider resistance 130 and diode The cooperation of structure, additionally it is possible to ensure the semiconductor structure when carrying out corresponding circuit protection, divider resistance 130 is not easy to be burnt It ruins, to make the semiconductor structure be reliably achieved anti-high voltage functionality.Wherein, divider resistance 130 can not be burned out, be because For entire divider resistance 130 at this time be with diodes in parallel, the electric current for flowing through divider resistance 130 is small, electric current (active energy) It is born by diode.In addition, for the case where divider resistance is not integrated into semiconductor substrate (chip), corresponding work( Rate (power consumption) also reduces.
The embodiment of the present invention additionally provides a kind of chip, the semiconductor junction provided with previous embodiment in the chip Structure can refer to previous embodiment corresponding contents accordingly, with respect to the content of semiconductor structure.
In the present embodiment, the chip can be power management chip.
In addition to the semiconductor structure that previous embodiment is provided, in the present embodiment, the chip is also by semiconductor structure Partial pressure end B is electrically connected to overvoltage protection comparator 200, specifically, partial pressure end B is electrically connected to overvoltage protection comparator 200 Sampling end, sampling end generally employ metal-oxide-semiconductor.The other end of overvoltage protection comparator 200 is usually reference voltage end, for connecting Reference voltage Vref is connect, (Fig. 3 shows corresponding circuit, i.e. part in the chip to corresponding circuit diagram structure as shown in Figure 3 Circuit).
In Fig. 3, other than overvoltage protection comparator 200, what the circuit structure in dotted line frame S1 indicated is semiconductor junction The corresponding circuit structure of structure, therefore, the semiconductor structure corresponding circuits that previous embodiment provides can be in conjunction with reference to figures 3.
As seen from Figure 3, the both ends of the diode D0 of semiconductor structure (correspond to the first kind area of previous embodiment 110 exit a and the exit c) in Second Type area 120 are electrically connected with the first end A of divider resistance and second end C respectively, point Piezoresistance includes resistance R1 and resistance R0, wherein resistance R1 is that the first end A of divider resistance extremely divides the resistance between the B of end, electricity Partial pressure end B that R0 is divider resistance is hindered to the resistance between second end C.
By the semiconductor structure that the semiconductor structure of the present embodiment is provided by above-described embodiment, in conjunction with Fig. 2 institutes Show circuit structure shown in cross-section structure and Fig. 3 it is found that the present embodiment is integrated into divider resistance 130 in (high pressure) diode, from And the sampling end of overvoltage protection comparator 200 can be given to provide suitable voltage, this structure had not only saved area but also can resist high pressure.Together When the partial pressure device (divider resistance) that can independently be produced on PCB of script is integrated into chip, saved cost.This be because For one of the basic principle of, semiconductor design, area as possible small of chip is exactly allowed, to make in piece of silicon on piece output Chip as possible more, it is so just opposite to have saved cost, and the present embodiment is this that divider resistance 130 is integrated into high pressure Mode in diode one of has the advantage that be exactly the area that can save the chip using this semiconductor structure.
Although present disclosure is as above, present invention is not limited to this.Any those skilled in the art are not departing from this It in the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute Subject to the range of restriction.

Claims (10)

1. a kind of semiconductor structure, including:
Semiconductor substrate;
Positioned at the diode of the semiconductor substrate, the diode includes first kind area and Second Type area;Its feature exists In further including:
Divider resistance, the divider resistance are located above the first kind area, the divider resistance and the first kind area Between have insulating layer;The divider resistance has first end, partial pressure end and second end, the first end electrical connection described first Class area, the second end are electrically connected the Second Type area.
2. semiconductor structure as described in claim 1, which is characterized in that the side in the first kind area is by second class Type area surrounds.
3. semiconductor structure as claimed in claim 2, which is characterized in that the divider resistance is multi-helical structure, described The inner end of helical structure is the first end of the divider resistance;The outer end of the helical structure for the divider resistance institute State second end.
4. semiconductor structure as claimed in claim 3, which is characterized in that the plan view shape in the first kind area is circle, The plan view shape in the Second Type area is circular ring shape.
5. semiconductor structure as claimed in claim 2 or claim 3, which is characterized in that the first kind area is N-type region, described the Two class areas are p type island region.
6. semiconductor structure as claimed in claim 5, which is characterized in that the N-type region includes the first areas N and surrounds described the 2nd areas N in one areas N side.
7. semiconductor structure as claimed in claim 6, which is characterized in that the N-type region further includes the 3rd areas N, the 3rd N Area is located at the lower section in the first areas N and at least partly described 2nd areas N.
8. semiconductor structure as claimed in claim 7, which is characterized in that the p type island region includes the first areas P and positioned at described the The 2nd areas P below one areas P.
9. a kind of chip, which is characterized in that have claim 1 to 8 any one of them semiconductor structure in the chip.
10. chip as claimed in claim 9, which is characterized in that the chip is power management chip, the semiconductor structure The partial pressure end be electrically connected overvoltage protection comparator.
CN201810437298.0A 2018-05-09 2018-05-09 Semiconductor structure and chip Active CN108511420B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114068754A (en) * 2021-12-29 2022-02-18 上海集成电路研发中心有限公司 Double-sided avalanche photodiode and preparation method thereof

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001102524A (en) * 1999-09-30 2001-04-13 Tokin Corp Integrated semiconductor device
CN102376773A (en) * 2010-08-04 2012-03-14 株式会社电装 Semiconductor device having lateral diode
CN102832211A (en) * 2011-06-14 2012-12-19 台湾积体电路制造股份有限公司 High voltage resistor with PIN diode isolation
CN104167435A (en) * 2014-08-08 2014-11-26 无锡市晶源微电子有限公司 On-chip high-voltage resistor with voltage dividing ring structure
CN208400845U (en) * 2018-05-09 2019-01-18 厦门元顺微电子技术有限公司 Semiconductor structure and chip

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001102524A (en) * 1999-09-30 2001-04-13 Tokin Corp Integrated semiconductor device
CN102376773A (en) * 2010-08-04 2012-03-14 株式会社电装 Semiconductor device having lateral diode
CN102832211A (en) * 2011-06-14 2012-12-19 台湾积体电路制造股份有限公司 High voltage resistor with PIN diode isolation
CN104167435A (en) * 2014-08-08 2014-11-26 无锡市晶源微电子有限公司 On-chip high-voltage resistor with voltage dividing ring structure
CN208400845U (en) * 2018-05-09 2019-01-18 厦门元顺微电子技术有限公司 Semiconductor structure and chip

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114068754A (en) * 2021-12-29 2022-02-18 上海集成电路研发中心有限公司 Double-sided avalanche photodiode and preparation method thereof
CN114068754B (en) * 2021-12-29 2024-05-14 上海集成电路研发中心有限公司 Double-sided avalanche photodiode and preparation method thereof

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