CN108511317A - The manufacturing method and epitaxial wafer of epitaxial wafer - Google Patents

The manufacturing method and epitaxial wafer of epitaxial wafer Download PDF

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CN108511317A
CN108511317A CN201710113141.8A CN201710113141A CN108511317A CN 108511317 A CN108511317 A CN 108511317A CN 201710113141 A CN201710113141 A CN 201710113141A CN 108511317 A CN108511317 A CN 108511317A
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atoms
monocrystalline silicon
epitaxial wafer
wafer
manufacturing
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CN108511317B (en
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浅山英
浅山英一
宝来正隆
村上浩纪
久保高行
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Sumco Corp
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Sumco Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering

Abstract

It is 10 that the present invention, which provides a kind of defect concentration for the gettering ability and epi-layer surface that can be played and be brought by crystal defect,2A/cm2The manufacturing method of epitaxial wafer below.The manufacturing method of the epitaxial wafer is characterized in that having:Monocrystalline silicon growing process, by cutting the growth of krousky Czochralski method doped with 1011atoms/cm3~4.5 × 1015atoms/cm3Nitrogen monocrystalline silicon;Monocrystalline silicon cuts process, and Silicon Wafer is cut from the monocrystalline silicon;And epitaxial layer formation process forms monocrystalline silicon layer i.e. epitaxial layer by vapor phase growth on the substrate using above-mentioned Silicon Wafer as substrate, in the epitaxial layer formation process, the epitaxial layer is formed in the range of 1050 DEG C to 1200 DEG C.

Description

The manufacturing method and epitaxial wafer of epitaxial wafer
Technical field
The present application be related to a kind of lower high-quality wafer of the surface defect density i.e. manufacturing method of epitaxial wafer and Epitaxial wafer.
Background technology
With including smart mobile phone etc. can portable communication terminal universal, the integrated circuit component (power device of silicon semiconductor Part) integrated densification in becoming faster year by year trend, the requirement of the quality of the Silicon Wafer to forming power supply apparatus is increasingly stringenter. That is, integrated more densification circuit becomes more very thin, therefore in the so-called power supply apparatus activity for forming power supply apparatus using wafer Region, than knots such as the displacements for the reason of more stringent limitation is shortened as the increase of leakage current and the lifetime of carrier in the past The impurity of metal series elements other than brilliant defect and dopant.
All the time, using the base cut from monocrystalline silicon with CZ methods (cutting krousky Czochralski method) by power supply apparatus Plate (wafer).10 are generally comprised in the wafer18atoms/cm3The oxygen of left and right.It is well known that although oxygen has by preventing from conjugating Come effective effects such as the effects that improves wafer intensity and gettering, it is precipitated but then because becoming oxide and is forming electricity The thermal history when device of source and cause the crystal defects such as displacement and fault.But during manufacturing power supply apparatus, passing through field When the LOCOS (local oxidation of silicon) of oxidation film is formed and is formed trap diffusion layer, 1100~ Kept at a high temperature of 1200 DEG C several hours, thus near crystal column surface because oxygen to formed due to external diffusion thickness be tens μm The DZ layers (denuded zone) of the nodeless mesh defect of left and right.The DZ layers becomes power supply apparatus active region, therefore just makes naturally At the less state of crystal defect.
However, with integrated densification, high energy ion injection method is used in trap is formed, if the system of power supply apparatus It makes and is handled at 1000 DEG C or less, then the diffusion of oxygen can be slack-off, therefore is formed with being unable to fully DZ layers above-mentioned.Therefore, although The suboxides of substrate are promoted, but inhibit crystal defect with being unable to fully, and generate the performance deterioration of wafer because of the reduction of oxygen, And fail to obtain satisfied result.Therefore, it hardly includes crystallization gradually to develop in the grown above silicon as wafer substrate The epitaxial wafer of the epitaxial layer of the Si of defect, and it is widely used in high integration power supply apparatus.
Thus, can be by epitaxial wafer using improving the power supply apparatus active region for completely eliminating crystal column surface This possibility of the crystal defect in domain.But integrating densification, then technique also just becomes more complicated, because of metal system The impurity of element causes the chance of pollution also to increase, and influence also becomes increasing.The countermeasure to decontaminate essentially consists of work Skill environment and purifying using material, but be difficult to completely eliminate in power supply apparatus manufacturing process, have as its game method Gettering.This be it is a kind of will because pollution intrusion come in impurity element gather the place outside power supply apparatus active region due to carry out nothing The method of evilization.
Metal system impurity element is invaded and is solid-solution in Si crystallizations at a lower temperature, and the usual metal system impurity element exists Diffusion velocity in Si is very fast.If moreover, there is the defect of displacement and the crystallizations such as distortion caused by nano-precipitation, energy It is upper also more stable than when being present in lattice, therefore the metal system impurity element has the tendency that gathering the defect of these crystallizations.Cause This, utilizes the property, crystal defect is deliberately imported, so as to therefrom capture and block metal system impurity element in turn.It will The place for capturing the impurity is known as slot.Make slot method, that is, gettering have external gettering and inherent gettering both.External gettering Pass through sandblasting, grinding, laser irradiation, ion implanting or Si3N4The external factors such as the growth of film and polycrystalline Si films are to forming wafer Power supply apparatus face back side assign distort and import crystal defect.In contrast, in inherent gettering, if to aerobic by containing The wafer that makes of CZ method monocrystalline implement the heat treatment of low temperature and high temperature repeatedly, then will produce much may be small caused by oxygen Defect, by the defect be used as slot.
However, when being external gettering, there are the following problems:Lead to cost increase, another party with the increase of process number There is particle, the warpage etc. because implementing to cause wafer due to processing since the part for assigning distortion in face.On the other hand, inherent gettering It needs containing a degree of oxygen, but this may will produce the defect for being harmful to power supply apparatus formation.In addition it also needs to for having Effect makes the heat treatment of slot, this can also increase workload.In addition, when being epitaxial wafer, in the process that epitaxial layer is formed, become 1050~1200 DEG C of high temperature, therefore should will reduce, disappear as the oxygen precipitate of the core of the tiny flaw in wafer substrate, And cause to be difficult to form slot in subsequent heat treatment.Therefore, it is impossible to the method for effectively utilizing existing inherent gettering.
Invention content
The present application is related to a kind of manufacturing method and epitaxial wafer of High Density Integration degree power supply apparatus epitaxial wafer, Its purpose is to provide a kind of extension that the epitaxial wafer for giving full play to gettering ability can be produced in shorter process is brilliant Round manufacturing method and epitaxial wafer.
There are Oxidation induced stacking fualt (Oxidation-induced in the microscopic defect crystallized because caused by oxygen-containing stacking fault:Hereinafter referred to as " OSF ").This be in power supply apparatus manufacturing process carry out high temperature oxidation process when There is positive correlation, the defect oxygen to be made to be precipitated for the fault that the underlying crystal of oxidation film generates, generation and the oxygen amount in Si crystallizations of OSF Object development nucleation.If implementing thermal oxide in 1~20 hour to the wafer of the Si monocrystalline manufactured by CZ methods at 1000~1200 DEG C Processing, then will produce the cricoid OSF (hereinafter referred to as " OSF rings ") centered on the lifting shaft of monocrystalline.It is reported that if comprising The top of the substrate of OSF rings forms the epitaxial layer of Si, then the oxygen precipitate core of ring region will not disappear, and after being epitaxially formed Power supply apparatus manufacturing process in, functioned as effective gettering site.
In general, the width of OSF rings is several mm to tens mm, it is extremely clear with the boundary in other regions.If also, accelerating to carry Pulling rate degree, then the diameter of ring just becomes larger, and then close to wafer periphery, if slow-down, can shrink, and then vanish from sight.
Present inventor is conceived to the gettering effect brought by the crystal defect of the OSF ring regions, to expanding the width of ring The condition of degree has carried out various researchs.Itself as a result, it has been found that, when carrying out crystal growth using CZ methods, can be expanded by adulterating nitrogen The width of ring.
Also, in addition to OSF defects, there are a kind of COP (Crystal Originated in the surface defect of Silicon Wafer Particle).The COP defects are about 0.1 μm or so the regular octahedron below generated in single crystal by the cohesion of emptying aperture Cavity blemish.It is formed with SiO in the inner surface of COP defects2
Present inventor be also conceived to by COP imperfect tapes Lai gettering effect, to generating the COP of appropriate size and density The condition of defect has carried out various researchs.Itself as a result, it has been found that, using CZ methods carry out crystal growth when, doping nitrogen simultaneously suitably adjust Pull rate accounts for the leading regions COP so as to form and assign the emptying aperture in the adaptable lifting of sufficient gettering ability.
It is well known that having reinforcing crystallization (Japanese Patent Publication 7- as the effect for adulterating nitrogen in single crystal using CZ methods in the past No. 76151 bulletins), inhibit with thermal stress generate displacement and displacement movement (Japanese Unexamined Patent Application 60-251190 bulletins), Inhibit to result from the generation of the etch pit of wafer and prevents decline (the Japanese Unexamined Patent Publication 5- of the oxidation film resistance to pressure of power supply apparatus No. 294780 bulletins) etc..However, about the effect to gettering, effect that the shape of OSF rings is brought and to being formed by COP The influence that region is brought is completely unknown.
Therefore, to expanding the width of OSF rings and resulting crystal defect equably being generated the condition in wafer on the whole It is studied, and the validity of gettering effect is also investigated.Its result is known, if the amount of the nitrogen of doping is set as 1013atoms/cm3More than, then the core of OSF effective to gettering can be integrally uniformly dispersed in crystal, if the monocrystalline will be passed through The slice of acquisition forms Si epitaxial layers as substrate and on surface, then can produce surface defect seldom and in power supply apparatus Wafer with effective gettering effect in manufacturing process.
Also, know even if the amount of the nitrogen of doping is set as 1011atoms/cm3To 4.5 × 1015atoms/cm3As long as more careful Ground controls the heat treatment condition etc. of the pull rate and Silicon Wafer of monocrystalline, then equally can also produce surface defect it is few and The wafer with effective gettering effect in power supply apparatus manufacturing process.
The gettering method makes the formation process of epitaxial layer to being easy to eliminate the power supply apparatus for p-, n- or n+ that core is precipitated that slot is formed It is particularly effective with wafer, to adulterate the p+ wafers for the doping high concentration boron that boron and Fe are sucked by boron (for example, being added with 1019cm-3 The wafer of (9m Ω cm or less) above) when, it is also effective to the element other than Fe.It adulterates in the p+ wafers of high concentration boron by high concentration Boron and the gettering effect of Fe and Cu elements brought is stronger, therefore, it is considered that can not be with the gettering method band disclosed in the present application The effect come explicitly is distinguished, but at least there is also the application gettering effects of Fe and Cu.
In the present application, a concentration of p+ types of boron (B) refer to the concentration that resistivity is equivalent to 5m Ω cm~100m Ω cm, p classes Type or p- types refer to the concentration that resistivity is equivalent to 0.1~100 Ω cm, and phosphorus (P) or antimony (Sb) a concentration of n- refer to resistivity It is equivalent to the concentration of 0.1~100 Ω cm, n+ refers to the concentration for being equivalent to 10 to 100m Ω cm.Also, such as p/p- types refer to The wafer of the epitaxial layer of p types is laminated with above p- type of substrate.It is brilliant that the gettering method is suitable for n/n-, n/n+ structure epitaxial Round manufacturing method is also effective to the manufacturing method of the p/p+ structure epitaxial wafers of substrate specific resistance 8~100m Ω cm.
Also, the gettering method is not only using the Silicon Wafer of existing diameter 150mm as in the case of substrate, but also by diameter For 200mm~450mm Silicon Wafer (for example, a diameter of 200mm, 300mm and 450mm) as in the case of substrate, will not The epitaxial wafer manufactured is set to generate warpage etc. and effective.
The gettering effect for forming the wafer of the epitaxial layer is evaluated by the generation lifetime of MOS.So doping nitrogen, it is right The wafer that can get excellent effect has carried out more detailed investigation, as a result knows that thermal oxidation produces on surface later 102A/cm2The above OSF produces 10/cm2Above COP (for COP when, what oxidizing thermal treatment was not necessarily meant to carry out). That is, for OSF when, it is believed that in the state of monocrystalline just like by thermal oxidation generate to a certain degree more than OSF defect core, This results in excellent gettering effects.For COP when, it is believed that though individually with COP generate strain field it is less, doped with nitrogen Monocrystalline in the state of just like the silicon crystal lattice for generating the COP above to a certain degree emptying aperture, this results in excellent gettering effects.
Also, it is preferred that heating wafers with 1000 DEG C or more to carry out the formation of epitaxial layer in hydrogen atmosphere.More preferably exist In the range of 1050 DEG C to 1200 DEG C.Therefore, to from doped with 1013atoms/cm3The wafer that the monocrystalline of the above nitrogen is cut is real The heat treatment for forming identical 1100 DEG C or more for granting epitaxial layer, as a result in cross-section to 5 × 103/cm2Above defect. This defect plays a role as the slot of gettering and improves the gettering effect of wafer, and in the monocrystalline generated by adulterating nitrogen Defect core and obtain.
Also, it is formed before epitaxial layer, pre-anneal treatment can be carried out.
The present application has following manner.
(1) a kind of manufacturing method of epitaxial wafer, the epitaxial wafer can play the gettering energy brought by crystal defect The defect concentration on the surface of power and epitaxial layer is 102A/cm2Hereinafter, the manufacturing method of the epitaxial wafer is characterized in that having: Monocrystalline silicon growing process, by cutting the growth of krousky Czochralski method doped with 1011atoms/cm3~4.5 × 1015atoms/ cm3Nitrogen monocrystalline silicon;Monocrystalline silicon cuts process, and Silicon Wafer is cut from the monocrystalline silicon;And epitaxial layer formation process, with above-mentioned Silicon Wafer is substrate, forms monocrystalline silicon layer i.e. epitaxial layer on the substrate by vapor phase growth, and work is formed in the epitaxial layer In sequence, the epitaxial layer is formed in the range of 1050 DEG C to 1200 DEG C.
(2) manufacturing method of the epitaxial wafer described in (1), which is characterized in that be doped in and given birth in the monocrystalline silicon Nitrogen quantity in the monocrystalline silicon grown in long process is 1013atoms/cm3~4.5 × 1015atoms/cm3, the extension crystalline substance Round manufacturing method is also equipped with the thermal oxidation carried out to the Silicon Wafer at 700 DEG C~1200 DEG C 30 minutes~20 hours Process, the crystal defect formed by the thermal oxidation by oxidation to imported into silicon between the lattice of the monocrystalline silicon Oxidation induced stacking fualt, the density of the Oxidation induced stacking fualt on the substrate is 10 in the entire substrate2A/cm2With On.
(3) manufacturing method of the epitaxial wafer described in (2), which is characterized in that in the monocrystalline silicon growing process, Also doped with 0.01 × 10 in the monocrystalline silicon16atoms/cm3~5 × 1016atoms/cm3Carbon.
(4) manufacturing method of the epitaxial wafer described in (2) or (3), which is characterized in that the oxygen of the monocrystalline silicon is dense Degree is 2 × 1017atoms/cm3~15 × 1017atoms/cm3In the range of.
(5) manufacturing method of the epitaxial wafer described in (1), which is characterized in that be doped in and given birth in the monocrystalline silicon Nitrogen quantity in the monocrystalline silicon grown in long process is 1011atoms/cm3~1013atoms/cm3, the crystal defect be because It is directed in silicon crystallization caused by the emptying aperture of the monocrystalline silicon and has lured surface defect i.e. COP defects, the COP on the substrate is lacked Sunken density is 10/cm in the entire substrate2More than.
(6) manufacturing method of the epitaxial wafer described in (5), which is characterized in that in the monocrystalline silicon growing process, Also doped with 0.01 × 10 in the monocrystalline silicon16atoms/cm3~5 × 1016atoms/cm3Carbon.
(7) manufacturing method of the epitaxial wafer described in (5) or (6), which is characterized in that the oxygen of the monocrystalline silicon is dense Degree is 11 × 1017atoms/cm3~13.5 × 1017atoms/cm3In the range of.
(8) a kind of epitaxial wafer is manufactured by the manufacturing method of the epitaxial wafer described in (1)~(7), described Epitaxial wafer is characterized in that, a diameter of 200mm~450mm of the epitaxial wafer.
(9) epitaxial wafer described in (8), which is characterized in that a diameter of 300mm of the epitaxial wafer~ 450mm。
Invention effect
According to the present application, without increasing outside and the inherent gettering effect increase processing of process and cost, energy Enough obtain becomes the epitaxial wafer base material with the defect core to disappear is not easy in being formed in epitaxial layer and wait including high temperature processes Monocrystalline silicon, manufactured using the monocrystalline, be there is no defect and gettering effect so as to obtain in power supply apparatus active region High High Density Integration degree power supply apparatus epitaxial wafer.
Description of the drawings
The figure that Density Distribution changes with the increase of N doping amount in wafers of the Fig. 1 to indicate OSF.
Fig. 2 is the distribution for the monocrystalline axial direction for indicating OSF density as the increase of N doping amount is got higher and becomes uniform figure.
The figure on the surface for the epitaxial wafer that Fig. 3 is obtained by expression and the distribution of the crystal defect in internal (section).
Fig. 4 is is equivalent to the temperature changing regularity in order to evaluate the power supply apparatus manufacturing process that the gettering ability of wafer uses Figure.
Fig. 5 is measures with the result of variations that occurs of manufacturing process for generating lifetime by the different wafer of N doping amount Figure.
Specific implementation mode
To epitaxial wafer assign by OSF imperfect tapes Lai gettering ability in the case of, why by the N doping of monocrystalline silicon Amount is set as 1013atoms/cm3More than, if being because nitrogen quantity is less than above-mentioned amount, the width of OSF rings expands to be not enough, And it can not be evenly dispersed in the wafer of gettering slot.Also, the upper limit of doping is not particularly limited, if excessively, be easy Become polycrystalline, therefore is preferably set to 4.5 × 1015atoms/cm3Left and right.
To epitaxial wafer assign by COP imperfect tapes Lai gettering ability in the case of, why the N doping amount of monocrystalline silicon is set It is 1011atoms/cm3Above 1013atoms/cm3If hereinafter, being because exceeding the range, even if there are silicon in monocrystalline silicon The emptying aperture of lattice will not generate the defect of epitaxial surface, and can not be formed as sufficient COP defects to the effective position of gettering Point.
As the method for doping, as long as the nitrogen of required concentration can be adulterated, then any method, can enumerate in the feed Or mixed nitride object in melt, by added with nitrogen the crystallization of FZ silicon and be formed on surface the wafer of silicon nitride film and be mixed into raw material In, on one side import nitrogen into stove or compound gas while carry out crystal growth, before melting at a high temperature of spray to polysilicon The use etc. of nitrogen flushing or compound gas and nitride crucible.
It, also being capable of doped carbon, boron and/or phosphorus in monocrystalline silicon as needed other than nitrogen.By adulterate these carbon, boron and/ Or phosphorus, such as the specific resistance rate of obtained silicon wafer substrate can be adjusted, or further enhance gettering ability etc..
The preferred scope of carbon doping is 1.0 × 1014atoms/cm3~1.0 × 1016atoms/cm3, further preferably import small In 1 × 1014atoms/cm3Above~1 × 1015atoms/cm3Trace carbon.Carbon assay method not only has SIMS and GFA, is micro- There is the method based on PL or DLTS when measuring carbon.
Boron doped preferred scope is 3 × 1017atoms/cm3~1 × 1019atoms/cm3If (converted by ASTM, with than Resistance is calculated as 8.9m Ω cm~93m Ω cm).
The preferred scope of phosphorus doping is 4 × 1014atoms/cm3~5 × 1015atoms/cm3If (converted by ASTM, with than Resistance is calculated as 0.98 Ω of Ω cm~10.9 cm).
Also, oxygen concentration (the old ASTM specifications of monocrystalline silicon and the Silicon Wafer cut from monocrystalline silicon:As long as 1979) 11 × 1017atoms/cm3~13.5 × 1017atoms/cm3In the range of.
The monocrystalline doped with above-mentioned nitrogen is cut, after the polishing cleaning of surface, epitaxial layer is formed, produces wafer, but only If the method for the not no epitaxial layer of crystal defect of the formation such as the thermal decomposition method of vapor growth method, then any method.So 1011atoms/cm3~4.5 × 1015atoms/cm3In the range of adulterate nitrogen, and set and the crystal defect that finally imports The corresponding other conditions of type, so as to which the defect for becoming the stabilization of gettering slot is evenly dispersed into wafer entirety.This is lacked Sunken number is influenced by oxygen and other impurities amount or crystal growth condition.In epitaxial wafer, power supply can be ensured in epitaxial layer Device activates region, it is therefore desirable to defect concentration is substantially ensured in wafer substrate.Defect is investigated for this viewpoint Several results know, in order to obtain more stable gettering effect, preferably assign by OSF imperfect tapes Lai gettering ability feelings Under condition, using such as generating 10 on surface when having carried out thermal oxidation2A/cm2The wafer of the above OSF.It is assigning by COP defects In the case of the gettering ability brought, using such as in 10/cm of surface generation2Above and it is less than 1 × 105A/cm2COP crystalline substance Circle.
Carry out Silicon Wafer surface inspection when, such as can use KLA Tencor corporation SurfscanSP1, SP2 and SP3.When measuring the number of the crystal defect on the surface of substrate, at least its size is calculated as one for 130nm~65nm It is a.In addition, when measuring the number of the crystal defect of epi-layer surface, size is calculated as 1 for 130nm or more.
For example, in the case of being counted to the number of OSF defects, outer layer growth is preferably implemented at 1100 DEG C or more of heat After reason, 5 × 10 are observed3A/cm2Above defect.
Also, the other methods of the detection means as this preferred defect number, also can be after forming epitaxial layer to crystalline substance It is observed circular section.The method for carrying out cross-section after epitaxial growth has, and 1 μm~5 μm erosions are carried out with selection etching in OSF It is filled for example, by the crystal defect inspection of RAYTEX CORPORATION in the method that is counted to defect after quarter, COP Set the defect testing method of MO441, MO601 implementation.
In the manufacturing method of the epitaxial wafer of the present application, preferably by single-chip stove, epitaxial growth goes out Silicon Wafer piecewise, into One step carries out high speed heating and cooling preferably in the technique of epitaxial growth.Specifically, by the 900 heating speed until growth temperature Degree is set as 450 degrees/min or more, cooling rate of the epitaxial growth temperature until 900 degree is set as 800 degrees/min or more, from And multiple precipitation cores can be remained in substrate (wafer).Also, can also include epitaxial growth procedure before at 700 DEG C to 900 The Low Temperature Heat Treatment process in power supply apparatus process within being carried out 1 hour 20 minutes or more within the temperature range of DEG C.Alternatively, The high-temperature heat treatment process for carrying out 60 minutes or more after epitaxial growth within the temperature range of 1000 DEG C to 1150 DEG C can be included.
The thickness of epitaxial layer is that 1~20 μm of epitaxial growth is more suitable, further preferably forms 1~6 μm of relatively thin outer of ratio The case where prolonging layer.
[embodiment]
(embodiment 1)
Effect in order to test out N doping has carried out following 2 kinds of experiments.Crystal growth condition is set as, is melted in silica crucible 50kg high-purity polycrystalline silicons, using boron as dopant, by the pull rate of the monocrystalline of 100 > of crystalline orientation < of diameter 150mm It has been set as 0.6mm/min.
First, the first step is in order to highlight the additive effect of nitrogen, in crystal growth to the stage of lower right 300mm, with 10L/ Nitrogen stream is put into stove with this state continued growth by min, and increases the nitrogen in monocrystalline.Then, for ease of estimating N doping Amount does not carry out nitrogen addition in lifting with gas form, and by the height of the nitrogen quantity specific Silicon Wafer and raw material of forming nitride film Virgin polysilicon is melted together, is 10 to grow N doping amount12、1013Or 1014atoms/cm3Respectively different 3 Kind monocrystalline.
The face vertical with crystal axis parallelly cuts the test film of wafer-shaped from the monocrystalline after these growths, in oxygen atmosphere In implement 16 hours with 1100 DEG C thermal oxidation.Later, the selection carried out 5 minutes with light etching solution etches, and uses optics Measurement microscope OSF density.
Show to import by nitrogen in Fig. 1 changing the monocrystalline of doping, experiment in test film off-position it is unilateral in OSF density distribution investigation result.The figure shows the OSF Density Distributions on the line drawn from the center of monocrystalline to periphery, OSF is usually in substantially a ring-shaped with the central axis of monocrystalline.The test film of the lower right positions 100mm does not import nitrogen also, with It and arrives 400mm, 700mm under lower right position, N doping amount gradually increases.If accordingly it is found that increasing N doping amount, OSF rings Width increase, in test film overall distribution OSF, and the rank of density also increases.
It shows to measure the examination that the monocrystalline for growing the grade for changing N doping amount is sampled along crystalline growth axis in Fig. 2 Test the result of the OSF density of piece.In this case, the longitudinal axis is in the center of test film and from center to the periphery side of test film To the average value of the OSF density for the position finding for being separated with 10mm.If accordingly it is found that monocrystalline N doping amount be 1012atoms/cm3 Shi Shengchang then causes OSF density to reduce, even if being reduced to 1013atoms/cm3, quite high OSF density is also maintained, is 1014atoms/cm3When, uniform and higher OSF density is also can get in axial direction.Also, it is 1014atoms/cm3Monocrystalline when, OSF is distributed evenly in test film entirety.
(embodiment 2)
In embodiment 1, for from doped with 1014atoms/cm3Nitrogen monocrystalline obtain wafer, in the case where accumulating 1150 DEG C of temperature Form the epitaxial layer of about 5 μm of thickness.For the wafer test film obtained, the selection carried out 5 minutes using photoetch liquid is lost It carves, the defect concentration of epi-layer surface and the defect concentration in section is determined by light microscope.
Show that the density of from the center of test film on the position of peripheral direction, surface and section defect is surveyed in Fig. 3 Determine result.Accordingly it is found that by the wafer of the monocrystalline making doped with the nitrogen after forming epitaxial layer, in section of the monocrystalline of lower layer Face has been observed that 104A/cm2The defect of left and right, when confirming the epitaxial layer to form high temperature, oxygen precipitate is not easy to disappear.And And, additionally it is possible to it confirms and defect is not observed in the section of epi-layer surface and epitaxial layer, as power supply apparatus active region The epitaxial layer in domain does not generate penetrating for the defect in underlying monocrystalline portion.
(embodiment 3)
Using resistivity it is 10 Ω cm or 0.008 Ω cm, high resistance or low resistance both p-type wafer substrates is objects, makes Go out respectively the monocrystalline undoped with nitrogen, doped with 1012、1013Or 1014atoms/cm38 kinds of monocrystalline of nitrogen, wafer is cut from each monocrystalline Substrate and the epitaxial layer that 5 μm of thickness is formed in the case where accumulating 1150 DEG C of temperature, as epitaxial wafer.
In the Cu (NO of 3ppm3)2After being polluted these crystal column surfaces using spin coater in aqueous solution, in dry oxygen It is middle to carry out the pattern assumed in power supply apparatus manufacturing process heat treatment, investigate the gettering effect generated with the progress of heat treatment The variation of fruit.
The temperature and time condition of Fig. 4 intermediate schemes heat treatment.In the process of figure, as 3 time points shown in A, B, C Wafer is taken out, has checked the effect of the gettering generated with the progress being heat-treated.The effect of gettering with hydrofluoric acid by being removed It after heat oxide film, is aoxidized 2 hours with 1000 DEG C in dry oxygen atmosphere, the gettering oxidation film of about 75nm is formed, by 500nm After the Al films vapor deposition of thickness, sintering in 30 minutes is carried out at 450 DEG C, produces the grid electricity of the 1mm angles with gate electrode Pole is evaluated by measuring the generation lifetime using the MOS of the electrode.
It shows to measure the result for generating lifetime in Fig. 5.The wafer made by the monocrystalline undoped with nitrogen, newly formed epitaxial layer Generation lifetime later is shorter, progressively longer with the carry out of heat treatment, but is not enough.And by doped with 1013Or 1014atoms/cm3Nitrogen the wafer that makes of monocrystalline in, can get almost until the power supply apparatus manufacturing process start to finish Constant longer lifetime.Doping is 1012atoms/cm3In the case of, show the trend similar to undoped situation. And 1013atoms/cm3When, as shown in Fig. 2 of embodiment 1, OSF density and N doping amount 1014atoms/cm3Monocrystalline compare Low, however gettering ability is substantially identical to 1014atoms/cm3The case where.If presumption is the reason is that N doping amount is 1013atoms/cm3More than, then form the slot for carrying out gettering enough.Additionally it is believed that the gettering effect gap of p/p and p/p+ is not It is very big therefore little by the gettering ability of the epitaxial wafer of the monocrystalline acquisition doped with nitrogen and the resistivity relation of wafer, until Few resistivity can get sufficient gettering effect when being 10 Ω cm to 0.008 Ω cm.
(embodiment 4)
In embodiment 4, the N doping amount being doped in monocrystalline silicon is set as 1012atoms/cm3, oxygen concentration is set as 12 × 1017atoms/cm3(ASTM1979), Silicon Wafer type is set as p+ types, the pull rate of monocrystalline silicon is set as embodiment 1 2 times, and be manufactured that epitaxial wafer.
As a result, the density as the COP defects in the substrate of the monocrystalline silicon wafer crystal obtained is 10 on entire real estate cm2More than.
Moreover, carrying out the measurement of the generation lifetime of MOS with method identical with Examples 1 to 3, and gettering ability is carried out Evaluation.
As a result, in example 4 also with the Examples 1 to 3 the case where in the same manner as, from power supply apparatus manufacturing process start to finish Until obtain nearly constant longer lifetime.
Industrial availability
Can be effectively manufactured out in shorter process give full play to by crystal defect bring in gettering ability Epitaxial wafer.

Claims (9)

1. a kind of manufacturing method of epitaxial wafer, the epitaxial wafer can play the gettering ability brought by crystal defect and outer The defect concentration for prolonging layer surface is 102A/cm2Hereinafter, the manufacturing method of the epitaxial wafer is characterized in that having:
Monocrystalline silicon growing process, by cutting the growth of krousky Czochralski method doped with 1011atoms/cm3~4.5 × 1015atoms/cm3Nitrogen monocrystalline silicon;
Monocrystalline silicon cuts process, and Silicon Wafer is cut from the monocrystalline silicon;And
Epitaxial layer formation process forms monocrystalline silicon layer i.e. on the substrate using above-mentioned Silicon Wafer as substrate by vapor phase growth Epitaxial layer,
In the epitaxial layer formation process, the epitaxial layer is formed in the range of 1050 DEG C to 1200 DEG C.
2. the manufacturing method of epitaxial wafer according to claim 1, which is characterized in that
The nitrogen quantity being doped in the monocrystalline silicon grown in the monocrystalline silicon growing process is 1013atoms/cm3~4.5 × 1015atoms/cm3,
The manufacturing method of the epitaxial wafer is also equipped at 700 DEG C~1200 DEG C small to Silicon Wafer progress 30 minutes~20 When thermal oxidation process,
The crystal defect is that silicon is formed by the thermal oxidation by oxidation between importeding into the lattice of the monocrystalline silicon Oxidation induced stacking fualt,
The density of the Oxidation induced stacking fualt on the substrate is 10 in the entire substrate2A/cm2More than.
3. the manufacturing method of epitaxial wafer according to claim 2, which is characterized in that
In the monocrystalline silicon growing process, also doped with 0.01 × 10 in the monocrystalline silicon16atoms/cm3~5 × 1016atoms/cm3Carbon.
4. the manufacturing method of epitaxial wafer according to claim 2 or 3, which is characterized in that
The oxygen concentration of the monocrystalline silicon is 2 × 1017atoms/cm3~15 × 1017atoms/cm3In the range of.
5. the manufacturing method of epitaxial wafer according to claim 1, which is characterized in that
The nitrogen quantity being doped in the monocrystalline silicon grown in the monocrystalline silicon growing process is 1011atoms/cm3~ 1013atoms/cm3,
The crystal defect is that the silicon crystallization caused by being directed in the emptying aperture of the monocrystalline silicon has lured surface defect i.e. COP defects,
The density of the COP defects on the substrate is 10/cm in the entire substrate2More than.
6. the manufacturing method of epitaxial wafer according to claim 5, which is characterized in that
In the monocrystalline silicon growing process, also doped with 0.01 × 10 in the monocrystalline silicon16atoms/cm3~5 × 1016atoms/cm3Carbon.
7. the manufacturing method of epitaxial wafer according to claim 5 or 6, which is characterized in that
The oxygen concentration of the monocrystalline silicon is 11 × 1017atoms/cm3~13.5 × 1017atoms/cm3In the range of.
8. a kind of epitaxial wafer, the manufacturing method of the epitaxial wafer described in any one of claim 1 to 7 by, manufactures, institute It states epitaxial wafer to be characterized in that, a diameter of 200mm~450mm of the epitaxial wafer.
9. epitaxial wafer according to claim 8, which is characterized in that
A diameter of 300mm~450mm of the epitaxial wafer.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11189493A (en) * 1997-12-25 1999-07-13 Sumitomo Metal Ind Ltd Silicon single crystal and epitaxial wafer
CN1545725A (en) * 2001-08-23 2004-11-10 信越半导体株式会社 Epitaxial wafer and a method for producing it
JP2007235153A (en) * 2002-04-26 2007-09-13 Sumco Corp High-resistance silicon wafer, and manufacturing method thereof
JP2011222842A (en) * 2010-04-13 2011-11-04 Shin Etsu Handotai Co Ltd Manufacturing method for epitaxial wafer, epitaxial wafer, and manufacturing method for imaging device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11189493A (en) * 1997-12-25 1999-07-13 Sumitomo Metal Ind Ltd Silicon single crystal and epitaxial wafer
CN1545725A (en) * 2001-08-23 2004-11-10 信越半导体株式会社 Epitaxial wafer and a method for producing it
JP2007235153A (en) * 2002-04-26 2007-09-13 Sumco Corp High-resistance silicon wafer, and manufacturing method thereof
JP2011222842A (en) * 2010-04-13 2011-11-04 Shin Etsu Handotai Co Ltd Manufacturing method for epitaxial wafer, epitaxial wafer, and manufacturing method for imaging device

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