CN108510932A - A kind of electrical level transferring chip and its control method, shutdown driving circuit - Google Patents
A kind of electrical level transferring chip and its control method, shutdown driving circuit Download PDFInfo
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- CN108510932A CN108510932A CN201810293192.8A CN201810293192A CN108510932A CN 108510932 A CN108510932 A CN 108510932A CN 201810293192 A CN201810293192 A CN 201810293192A CN 108510932 A CN108510932 A CN 108510932A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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Abstract
A kind of electrical level transferring chip of the embodiment of the present invention offer and its control method, shutdown driving circuit, are related to display technology field, PU points can be enable to discharge.A kind of electrical level transferring chip, output circuit are used under the control of high level input terminal and the first reference voltage end, and the first signal is exported to first node in the first stage that Xon starts, and second signal is exported to first node in the second stage that Xon starts；First gating circuit is used to, when first node exports the first signal, low-level input and low level output end be made to disconnect；When first node exports second signal, low-level input and low level output end is made to be electrically connected；First control circuit is used under the control that control terminal exports Xon enabling signals, and signal output end is made to be electrically connected with high level input terminal；And when first node exports the first signal, low level output end is made to be electrically connected with high level input terminal, when first node exports second signal, low level output end is made to be disconnected with high level input terminal.
Description
Technical field
The present invention relates to display technology field more particularly to a kind of electrical level transferring chip and its control method, shutdown drivings
Circuit.
Background technology
With the development of display technology, high-resolution, narrow frame become development trend.For this trend, there is battle array
Row substrate gate driving (Gate Drive on Array, GOA) technology.GOA technologies are directly by the integrated making of gate driving circuit
In in array substrate, thus the driving chip being bound on panel is replaced.
For GOA products, various stringent reliability tests can be carried out, high temperature high-speed switch machine is then one therein.
It in general, having the function of Xon in electrical level transferring chip, can quickly discharge pixel electrode, eliminate when product shuts down
Ghost is bad.
Specifically, in high temperature high-speed switch machine, Xon is opened, and all signals of GOA are as high level, thin film transistor (TFT)
(Thin Film Transistor, TFT) is all turned on, and is discharged pixel electrode.When the voltage drop of high level input terminal
When closing voltage to electrical level transferring chip, electrical level transferring chip is closed, but PU in GOA (by taking GOA as shown in Figure 1 as an example) at this time
Still there are a large amount of charge residues on point, in quick turn-on next time, GOA unit will produce multiple output (Multi-Out), cause
High level input terminal connects load and rapidly increases, and making high level, it is pulled low (at the virtual coil in such as Fig. 2), and picture is caused to show
Abnormal (Abnormal Display, AD).
Invention content
A kind of electrical level transferring chip of the embodiment of the present invention offer and its control method, shutdown driving circuit, can make product
When shutdown, PU points are discharged.
In order to achieve the above objectives, the embodiment of the present invention adopts the following technical scheme that：
In a first aspect, a kind of electrical level transferring chip is provided, including：Output circuit, the first gating circuit, the first control electricity
Road；The output circuit is separately connected high level input terminal, the first reference voltage end and first node, in the high electricity
Under the control of flat input terminal and first reference voltage end, in the first stage that Xon starts to first node output the
One signal exports second signal in the second stage that Xon starts to the first node；First gating circuit, connects respectively
Low-level input, low level output end and the first node are connect, for when the first node exports the first signal, making
The low-level input and the low level output end disconnect electrical connection；When the first node exports second signal, make
The low-level input and low level output end electrical connection；The first control circuit is separately connected control terminal, described
First node, the low level output end, the high level input terminal and signal output end, for being exported in the control terminal
Under the control of Xon enabling signals, the signal output end is made to be electrically connected with the high level input terminal；And in the first node
When exporting the first signal, the low level output end is made to be electrically connected with the high level input terminal；It is exported in the first node
When second signal, make the low level output end and the high level input terminal is electrically connected disconnection.
Optionally, the electrical level transferring chip further includes second control circuit, is separately connected digital logic voltage end, second
Reference voltage end and the control terminal are used under the control of the digital logic voltage end and second reference voltage end,
Xon enabling signals are exported to the control terminal.
Optionally, the electrical level transferring chip further includes level shifting circuit, is separately connected signal input part, the signal
Output end, the low-level input and the high level input terminal, for according to the low-level input and the high electricity
The voltage of flat input terminal input, promotes the signal amplitude of the signal input part input, and is exported by the signal output end.
Based on above-mentioned, optionally, the output circuit includes first comparator；Two input terminals of the first comparator
It is electrically connected respectively with the high level input terminal and first reference voltage end, output end is electrically connected with the first node.
Optionally, first gating circuit includes the first transistor；The grid of the first transistor and described first
Node is electrically connected, and the first pole is electrically connected with the low-level input, and the second pole is electrically connected with the low level output end.
Optionally, the first control circuit includes first switch sub-circuit, second switch sub-circuit and third switch
Circuit；The first switch sub-circuit is electrically connected with the control terminal, the first node and the second switch sub-circuit, is used
It is opened under the control that the control terminal exports Xon enabling signals, the first signal that the first node is exported or the
Binary signal is input to the second switch sub-circuit；The second switch sub-circuit also with the high level input terminal and described low
Level output end is electrically connected, and for being opened when receiving first signal, makes the high level input terminal and the low electricity
Flat output end electrical connection；It is closed when receiving the second signal, makes the high level input terminal and the low level output end
Electrical connection disconnect；The third switch sub-circuit and the control terminal, the high level input terminal and the signal output end
Electrical connection makes the high level input terminal and the letter for being opened under the control that the control terminal exports Xon enabling signals
The electrical connection of number output end.
Optionally, the second control circuit includes the second comparator；Two input terminals of second comparator are distinguished
It is electrically connected with the digital logic voltage end and second reference voltage end, output end is electrically connected with the control terminal.
Second aspect provides a kind of shutdown driving circuit, including the electrical level transferring chip described in first aspect, power management
Chip and bleeder circuit；The first voltage output end of the power management chip passes through the bleeder circuit and the level conversion
The high level input terminal of chip is electrically connected；The second voltage output end of the power management chip and the electrical level transferring chip
Low-level input is electrically connected.
Optionally, the bleeder circuit includes first resistor and second resistance；One end of the first resistor and described the
One voltage output end is electrically connected, and the other end is electrically connected with the high level input terminal；One end of the second resistance and the height
Level input is electrically connected, other end ground connection.
The third aspect provides a kind of control method of above-mentioned electrical level transferring chip, including：Control terminal exports Xon and starts letter
Number, signal output end is electrically connected with high level input terminal, and in the control of the high level input terminal and the first reference voltage end
Under system, in the first stage that Xon starts, first node is made to export the first signal, so that the low level output end and the height
Level input is electrically connected, meanwhile, so that low-level input and the low level output end is disconnected electrical connection, carries out pixel and put
Electricity；Under the control of the high level input terminal and first reference voltage end, in the second stage that Xon starts, make described
First node exports second signal, so that the low-level input and low level output end electrical connection, also, make described
The disconnection that is electrically connected at low level output end and the high level input terminal carries out PU point electric discharges.
A kind of electrical level transferring chip of the embodiment of the present invention offer and its control method, shutdown driving circuit, by height
Under the control of level input and the first reference voltage end, keep the first stage that output circuit starts in Xon defeated to first node
Going out the first signal, and the first gating circuit is made to close, low-level input and low level output end disconnect electrical connection, meanwhile,
Control terminal exports under the control of Xon enabling signals and first node the first signal of output, makes low level by first control circuit
Output end and signal output end are electrically connected with high level input terminal respectively, and the first stage that can start in Xon carries out pixel discharge；
Second stage after pixel discharge completion exports second signal by output circuit to first node, and makes the first gating
Circuit gates, and low-level input and low level output end be electrically connected again, meanwhile, in control terminal output Xon enabling signals and
First node exports under the control of second signal, and the electricity at low level output end and high level input terminal is made by first control circuit
Connection disconnects, and can force low level output end rapid decrease, PU points is enable to discharge.
Description of the drawings
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
Obtain other attached drawings according to these attached drawings.
Fig. 1 is a kind of GOA circuit diagrams that the prior art provides；
Fig. 2 be in the prior art quick turn-on when, schematic diagram that high level input terminal is pulled low；
Fig. 3 is a kind of structural schematic diagram one of electrical level transferring chip provided by the invention；
Fig. 4 is low level output end, signal output end and the change of high level input terminal voltage after Xon startups in the prior art
The schematic diagram of change；
Fig. 5 is low level output end, signal output end and the variation of high level input terminal voltage in the present invention after Xon startups
Schematic diagram；
When Fig. 6 is quick turn-on in the present invention, the V diagram of high level input terminal；
Fig. 7 is a kind of structural schematic diagram two of electrical level transferring chip provided by the invention；
Fig. 8 is a kind of structural schematic diagram three of electrical level transferring chip provided by the invention；
Fig. 9 is a kind of a kind of concrete structure schematic diagram one of each circuit of electrical level transferring chip kind provided by the invention；
Figure 10 is a kind of a kind of concrete structure schematic diagram two of each circuit of electrical level transferring chip kind provided by the invention；
Figure 11 is a kind of structural schematic diagram one of shutdown driving circuit provided by the invention；
Figure 12 is a kind of structural schematic diagram two of shutdown driving circuit provided by the invention；
Figure 13 is the control method flow diagram of electrical level transferring chip provided by the invention.
Reference numeral：
10- output circuits；The first gating circuits of 20-；30- first control circuits；40- second control circuits；50- level turns
Change circuit；60- bleeder circuits；101- first comparators；301- first switch sub-circuits；302- second switch sub-circuits；303-
Third switchs sub-circuit；The second comparators of 401-；T1- the first transistors；A- first nodes；C- control terminals；R1- first resistors；
R2- second resistances；VGHHigh level input terminal；VGLLow-level input；VSSLow level output end；SOUTSignal output end；
SINSignal input part；Vref1- the first reference voltage end；Vref2- the second reference voltage end；DVDD- digital logic voltages end；P1-
First stage；P2- second stage.
Specific implementation mode
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation describes, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
The embodiment of the present invention provides a kind of electrical level transferring chip, as shown in figure 3, including：The gating electricity of output circuit 10, first
Road 20, first control circuit 30.
Specifically, output circuit 10, is separately connected high level input terminal VGH, the first reference voltage end Vref1And first node
A, in high level input terminal VGHWith the first reference voltage end Vref1Control under, in the first stage that Xon starts to first
Node A exports the first signal, and second signal is exported to first node A in the second stage that Xon starts.
First gating circuit 20, is separately connected low-level input VGL, low level output end VSSWith first node A, it is used for
When first node A exports the first signal, make low-level input VGLWith low level output end VSSDisconnect electrical connection；First
When node A output second signals, make low-level input VGLWith low level output end VSSElectrical connection.
First control circuit 30 is separately connected control terminal C, first node A, low level output end VSS, high level input terminal
VGHWith signal output end SOUT, under the control that control terminal C exports Xon enabling signals, making signal output end SOUTWith height electricity
Flat input terminal VGHElectrical connection；And when first node A exports the first signal, make low level output end VSSWith high level input terminal
VGHElectrical connection makes low level output end V when first node A exports second signalSSWith high level input terminal VGHElectrical connection
It disconnects.
It will be understood by those skilled in the art that an effect of electrical level transferring chip is exactly to export clock signal, therefore, it is possible to manage
It solves, can pass through signal output end S in the embodiment of the present inventionOUTExport clock signal.Wherein, signal output end SOUTAnd it is unlimited
Then one, it can be multiple, not limit herein specifically.
In addition, in the prior art, after Xon starts, to carry out discharge pixel electrodes, low level output in electrical level transferring chip
Hold VSSWith signal output end SOUTRespectively with high level input terminal VGHElectrical connection, makes low level output end VSSAnd signal output end
SOUTVoltage follow high level input terminal VGHThe variation of voltage and change (as shown in Figure 4), until high level input terminal VGHDrop
To electrical level transferring chip closing voltage when, electrical level transferring chip close.But as stated in the background art, a large amount of electricity are had on PU points
Lotus remains.Wherein, due to before Xon is not actuated, low-level input VGLWith low level output end VSSReally it is electrically connected,
Therefore, to make low level output end VSSVoltage follow high level input terminal VGHThe variation of voltage and change, low level should be made defeated
Enter to hold VGLWith low level output end VSSDisconnect electrical connection.
To solve the problems, such as a large amount of charge residues on PU points, after Xon is started in the embodiment of the present invention, electrical level transferring chip
It is divided into two stages before closing, as shown in figure 5, in the first stage P1 that Xon is opened, makes low level output end VSSAnd signal output end
SOUTRespectively with high level input terminal VGHElectrical connection, so that low level output end VSSWith signal output end SOUTVoltage follow it is high
Level input VGHThe variation of voltage and change, carry out discharge pixel electrodes.In the second stage P2 that Xon is opened, keep low level defeated
Outlet VSSWith high level input terminal VGHElectrical connection disconnect, and make low-level input VGLWith low level output end VSSAgain electric
Connection, forces low level output end VSSRapid decrease enables PU points to discharge.To in next quick turn-on so that high electricity
Flat input terminal VGHVoltage there is no (as shown in Figure 6) the case where dragging down in the prior art
Based on this, it is to be understood that the initial time of second stage P2 should be high level input terminal VGHOn voltage fall
When electricity certain amplitude extremely, and after the selection of this amplitude should be discharge pixel electrodes, certainly, it need to be closed in electrical level transferring chip
Before closing, therefore, based on the electrical level transferring chip of the present invention, by assigning the amplitude to the first reference voltage end Vref1,
Realize the control of first stage P1 and second stage P2 after above-mentioned Xon starts.
Wherein, it should be noted that above-mentioned output circuit 10, the first gating circuit 20 and first control circuit 30 are only electricity
With the relevant circuit of inventive point of the present invention in flat conversion chip, other circuits are may also include in electrical level transferring chip.For example,
It may also include the gating circuit of the existing control terminal control that can be exported Xon enabling signals (to be gated with the first of the present invention
Circuit 20 is distinguished, and the second gating circuit is can be described as), before Xon starts, to keep low-level input VGLWith low level output end
VSSElectrical connection, and after Xon startups, make low-level input VGLWith low level output end VSSElectrical connection disconnect.Certainly, such as
Output circuit 10, the first gating circuit 20 and the first control circuit 30 of fruit through the invention can guarantee before Xon startups, low
Level input VGLWith low level output end VSSElectrical connection, then can be not necessarily to the second above-mentioned gating circuit.
The embodiment of the present invention provides a kind of electrical level transferring chip, by high level input terminal VGHWith the first reference voltage end
Vref1Control under, so that the first stage P1 that output circuit 10 starts in Xon is exported the first signal to first node A, and make the
One gating circuit 20 is closed, low-level input VGLWith low level output end VSSElectrical connection is disconnected, meanwhile, it is exported in control terminal C
Xon enabling signals and first node A are exported under the control of the first signal, make low level output end V by first control circuit 30SS
With signal output end SOUTRespectively with high level input terminal VGHElectrical connection, first stage P1 that can start in Xon carry out pixel and put
Electricity；Second stage P2 after pixel discharge completion exports second signal by output circuit 10 to first node A, and makes
First gating circuit 20 gates, low-level input VGLWith low level output end VSSAgain it is electrically connected, meanwhile, it is defeated in control terminal C
Go out under the control of Xon enabling signals and first node A output second signals, low level output end is made by first control circuit 30
VSSWith high level input terminal VGHElectrical connection disconnect, low level output end V can be forcedSSRapid decrease enables PU points to discharge.
Optionally, as described in Figure 7, the electrical level transferring chip further includes second control circuit 40, is separately connected number and patrols
Collect voltage end DVDD, the second reference voltage end Vref2With control terminal C, it is used in digital logic voltage end DVDD and second with reference to electricity
Pressure side Vref2Control under, export Xon enabling signals to control terminal C.
The embodiment of the present invention can be by being rationally arranged the by the way that second control circuit 40 is arranged in electrical level transferring chip
Two reference voltage end Vref2Voltage value, at digital logic voltage end, the voltage of DVDD is power-down to the second reference voltage end Vref2If
Fixed voltage value or it is following when, it is automatic to export Xon enabling signals.
Optionally, as shown in figure 8, the electrical level transferring chip further includes level shifting circuit 50, it is defeated to be separately connected signal
Enter to hold SIN, signal output end SOUT, low-level input VGLWith high level input terminal VGH, for according to low-level input VGLWith
High level input terminal VGHThe voltage of input, promotion signal input terminal SINThe signal amplitude of input, and pass through signal output end SOUT
Output.
That is, passing through signal output end SOUTExport clock signal.
Based on above-mentioned, optionally, as shown in figure 9, the output circuit 10 includes first comparator 101；First comparator
101 two input terminals respectively with high level input terminal VGHWith the first reference voltage end Vref1Electrical connection, output end and first segment
Point A electrical connections.
Specifically, as the first reference voltage end Vref1Voltage be set as high level input terminal VGHOn voltage power-down to picture
When voltage value after plain electrode discharge, if high level input terminal VGHVoltage be more than the first reference voltage end Vref1Electricity
It presses, then exportable first signals of first node A, if high level input terminal VGHVoltage be less than or equal to the first reference voltage end Vref1
Voltage, then exportable second signals of first node A.
Optionally, as shown in figure 9, first gating circuit 20 includes the first transistor T1；The grid of the first transistor T1
Pole is electrically connected with first node A, the first pole and low-level input VGLElectrical connection, the second pole and low level output end VSSIt is electrically connected
It connects.
Specifically, when first node A exports the first signal, the first transistor T1 can be made to close, low-level input VGL
With low level output end VSSIt disconnects；When first node A exports second signal, the first transistor T1 can be made to open, low level is defeated
Enter to hold VGLWith low level output end VSSElectrical connection.
Optionally, as shown in figure 9, the first control circuit 30 includes first switch sub-circuit 301, second switch electricity
Road 302 and third switch sub-circuit 303.
Specifically, first switch sub-circuit 301 is electrically connected with control terminal C, first node A and second switch sub-circuit 302,
For being opened under the control that control terminal C exports Xon enabling signals, first node A the first signals exported or second are believed
Number it is input to second switch sub-circuit 302.
Second switch sub-circuit 302 also with high level input terminal VGHWith low level output end VSSElectrical connection, for receiving
It is opened when to first signal, makes high level input terminal VGHWith low level output end VSSElectrical connection；Receive second letter
Number when close, make high level input terminal VGHWith low level output end VSSElectrical connection disconnect.
Third switchs sub-circuit 303 and control terminal C, high level input terminal VGHWith signal output end SOUTElectrical connection is used for
It is opened under the control of control terminal C output Xon enabling signals, makes high level input terminal VGHWith signal output end SOUTElectrical connection
Wherein, in first switch sub-circuit 301, second switch sub-circuit 302 and third switch sub-circuit 303, Mei Gekai
Climax circuit 301 can include at least a transistor.The grid of transistor is electrically connected with control terminal C in first switch sub-circuit 301
It connects, the first pole is electrically connected with first node A, and the second pole is electrically connected with second switch sub-circuit 302.
The second of the grid of transistor and transistor in first switch sub-circuit 301 is extremely electric in second switch sub-circuit 302
Connection, the first pole and the second pole respectively with high level input terminal VGHWith low level output end VSSElectrical connection.
The grid of transistor is electrically connected with control terminal C in third switch sub-circuit 303, the first pole and the second pole respectively with height
Level input VGHWith signal output end SOUTElectrical connection.
Optionally, as shown in Figure 10, the second control circuit 40 includes the second comparator 401；Second comparator 401
Two input terminals respectively with digital logic voltage end DVDD and the second reference voltage end Vref2Electrical connection, output end and control terminal C
Electrical connection.
Specifically, by the way that the second reference voltage end V is rationally arrangedref2Voltage value, can be in digital logic voltage end DVDD
Voltage be less than or equal to the second reference voltage end Vref2Voltage in the case of, export Xon enabling signals to control terminal C.
The embodiment of the present invention also provides a kind of shutdown driving circuit, as shown in figure 11, including above-mentioned electrical level transferring chip,
Power management chip and bleeder circuit 60；The first voltage output end of the power management chip passes through bleeder circuit 60 and level
The high level input terminal V of conversion chipGHElectrical connection；The second voltage output end of power management chip and electrical level transferring chip it is low
Level input VGLElectrical connection.
The present invention provides a kind of shutdown driving circuit, has effect identical with the electrical level transferring chip.Wherein, pass through
The high level of power management chip is input to the high level input terminal V of electrical level transferring chip by bleeder circuit 60GH, can turn for level
Change the high level input terminal V of chipGHSuitable voltage is provided.
Optionally, as shown in figure 12, bleeder circuit 60 includes first resistor R1 and second resistance R2；The one of first resistor R1
End is electrically connected with first voltage output end, the other end and high level input terminal VGHElectrical connection；One end of second resistance R2 and height electricity
Flat input terminal VGHElectrical connection, other end ground connection.
Wherein, the prevention of first resistor R1 and second resistance R2 should be arranged according to the voltage reasonable of first voltage output end.
The embodiment of the present invention also provides a kind of control method of above-mentioned electrical level transferring chip, as shown in figure 13, including：
S10, control terminal C export Xon enabling signals, signal output end SOUTWith high level input terminal VGHElectrical connection, and
High level input terminal VGHWith the first reference voltage end Vref1Control under, Xon start first stage P1, make first node A
The first signal is exported, so that low level output end VSSWith high level input terminal VGHElectrical connection, meanwhile, make low-level input VGL
With low level output end VSSElectrical connection is disconnected, pixel discharge is carried out.
S20, in high level input terminal VGHWith the first reference voltage end Vref1Control under, Xon start second stage
P2 makes first node export second signal, so that low-level input VGLWith low level output end VSSElectrical connection, also, make low
Level output end VSSWith high level input terminal VGHElectrical connection disconnect, carry out PU point electric discharges
The embodiment of the present invention provides a kind of control method of electrical level transferring chip, has identical as above-mentioned electrical level transferring chip
Effect, details are not described herein.
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
Those familiar with the art in the technical scope disclosed by the present invention, can easily think of the change or the replacement, and should all contain
Lid is within protection scope of the present invention.Therefore, protection scope of the present invention should be based on the protection scope of the described claims.
Claims (10)
1. a kind of electrical level transferring chip, which is characterized in that including：Output circuit, the first gating circuit, first control circuit；
The output circuit is separately connected high level input terminal, the first reference voltage end and first node, in the high electricity
Under the control of flat input terminal and first reference voltage end, in the first stage that Xon starts to first node output the
One signal exports second signal in the second stage that Xon starts to the first node；
First gating circuit is separately connected low-level input, low level output end and the first node, in institute
When stating first node the first signal of output, the low-level input and the low level output end is made to disconnect electrical connection；Institute
When stating first node output second signal, the low-level input and the low level output end is made to be electrically connected；
The first control circuit is separately connected control terminal, the first node, the low level output end, the high level
Input terminal and signal output end, for the control terminal export Xon enabling signals control under, make the signal output end with
The high level input terminal electrical connection；And when the first node exports the first signal, make the low level output end and institute
The electrical connection of high level input terminal is stated, when the first node exports second signal, makes the low level output end and the height
The electrical connection of level input disconnects.
2. electrical level transferring chip according to claim 1, which is characterized in that further include second control circuit, be separately connected
Digital logic voltage end, the second reference voltage end and the control terminal, at the digital logic voltage end and described second
Under the control of reference voltage end, Xon enabling signals are exported to the control terminal.
3. electrical level transferring chip according to claim 1, which is characterized in that further include level shifting circuit, be separately connected
Signal input part, the signal output end, the low-level input and the high level input terminal, for according to the low electricity
The voltage of flat input terminal and high level input terminal input, promotes the signal amplitude of the signal input part input, and passes through
The signal output end output.
4. according to claim 1-3 any one of them electrical level transferring chips, which is characterized in that the output circuit includes first
Comparator；
Two input terminals of the first comparator are electrically connected with the high level input terminal and first reference voltage end respectively
It connects, output end is electrically connected with the first node.
5. according to claim 1-3 any one of them electrical level transferring chips, which is characterized in that first gating circuit includes
The first transistor；
The grid of the first transistor is electrically connected with the first node, and the first pole is electrically connected with the low-level input,
Second pole is electrically connected with the low level output end.
6. according to claim 1-3 any one of them electrical level transferring chips, which is characterized in that the first control circuit includes
First switch sub-circuit, second switch sub-circuit and third switch sub-circuit；
The first switch sub-circuit is electrically connected with the control terminal, the first node and the second switch sub-circuit, is used
It is opened under the control that the control terminal exports Xon enabling signals, the first signal that the first node is exported or the
Binary signal is input to the second switch sub-circuit；
The second switch sub-circuit is also electrically connected with the high level input terminal and the low level output end, for receiving
It is opened when to first signal, the high level input terminal and the low level output end is made to be electrically connected；Receive described
It is closed when binary signal, the electrical connection at the high level input terminal and the low level output end is made to disconnect；
The third switch sub-circuit is electrically connected with the control terminal, the high level input terminal and the signal output end, is used
It is opened under the control that the control terminal exports Xon enabling signals, makes the high level input terminal and the signal output end
Electrical connection.
7. electrical level transferring chip according to claim 2, which is characterized in that the second control circuit compares including second
Device；
Two input terminals of second comparator are electric with the digital logic voltage end and second reference voltage end respectively
Connection, output end are electrically connected with the control terminal.
8. a kind of shutdown driving circuit, which is characterized in that including claim 1-7 any one of them electrical level transferring chip, electricity
Source control chip and bleeder circuit；
The height electricity that the first voltage output end of the power management chip passes through the bleeder circuit and the electrical level transferring chip
Flat input terminal electrical connection；
The second voltage output end of the power management chip is electrically connected with the low-level input of the electrical level transferring chip.
9. shutdown driving circuit according to claim 8, which is characterized in that the bleeder circuit includes first resistor and
Two resistance；
One end of the first resistor is electrically connected with the first voltage output end, and the other end is electrically connected with the high level input terminal
It connects；
One end of the second resistance is electrically connected with the high level input terminal, other end ground connection.
10. a kind of control method of the electrical level transferring chip as described in claim any one of 1-7, which is characterized in that including：
Control terminal exports Xon enabling signals, and signal output end is electrically connected with high level input terminal, and is inputted in the high level
Under the control of end and the first reference voltage end, in the first stage that Xon starts, first node is set to export the first signal, so that low
Level output end is electrically connected with the high level input terminal, meanwhile, so that low-level input and the low level output end is disconnected
Electrical connection carries out pixel discharge；
Under the control of the high level input terminal and first reference voltage end, in the second stage that Xon starts, make described
First node exports second signal, so that the low-level input and low level output end electrical connection, also, make described
The disconnection that is electrically connected at low level output end and the high level input terminal carries out PU point electric discharges.
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| CN201810293192.8A CN108510932B (en) | 2018-03-30 | 2018-03-30 | Level conversion chip, control method thereof and shutdown drive circuit |
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| CN201810293192.8A CN108510932B (en) | 2018-03-30 | 2018-03-30 | Level conversion chip, control method thereof and shutdown drive circuit |
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| CN108510932B CN108510932B (en) | 2021-08-10 |
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| CN108510932B (en) | 2021-08-10 |
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