CN108427069A - A kind of test circuit of panel detection - Google Patents
A kind of test circuit of panel detection Download PDFInfo
- Publication number
- CN108427069A CN108427069A CN201810102705.2A CN201810102705A CN108427069A CN 108427069 A CN108427069 A CN 108427069A CN 201810102705 A CN201810102705 A CN 201810102705A CN 108427069 A CN108427069 A CN 108427069A
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- China
- Prior art keywords
- panel
- detection
- output
- detection port
- test circuit
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Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
- G01R31/2825—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere in household appliances or professional audio/video equipment
Abstract
A kind of test circuit of panel detection, including the first detection port, the second detection port, the first detection port are connected with the output of chopped-off head panel, and the second detection port is connected with secondary panel output, and first detection port, which is also exported with grade panel again, to be connected.Multiplexed port can be carried out, the detecting of multistage output signal can be drawn, multichannel GIP signals are solved the problems, such as while detecting.
Description
Technical field
The present invention relates to GOA signal detections field more particularly to a kind of panel test electricity for drawing multistage signal simultaneously
Road.
Background technology
In gate array Gate ON Array (GOA) circuit of display panel, due to having reduction technological process, save
The advantages such as COF costs are that display enterprise pays close attention to one of technology.LCD and oled panel have selection GOA technologies.Exist at present
The small sizes such as mobile phone faceplate are related to, and have been widely used.Meanwhile more and more large size panels (TV) also use GOA
Technology.But for GOA technologies due to making logic circuit using amorphous or polycrystalline TFT structure, device stability itself can cause GOA electric
Road is abnormal, thus the problems such as yield loss and product quality can be caused, therefore GOA detections at cell test (also known as P inspections) are
Whether decision circuitry abnormal and product whether into processing procedure together with lower important detection node.To find that product may be deposited in advance
The problem of, avoid risk.Exception Type can be judged by the state of the feedback signal of the output of GOA indirectly simultaneously；Thus from
Processing procedure or circuit framework itself improve.But our widespread practices are to draw what GIP output signals detecting at present；
To signal Limited information；It is not enough to judge abnormal cause and type completely.
Invention content
For this reason, it may be necessary to which multiplexed port can be carried out by providing one kind, the method for detecting of multistage output signal can be drawn,
To achieve the above object, a kind of test circuit of panel detection is inventor provided, including the first detection port, the
Two detection ports, the first detection port are connected with the output of chopped-off head panel, and the second detection port is connected with secondary panel output,
First detection port, which is also exported with grade panel again, to be connected.
Specifically, every grade of panel output includes first switch pipe, second switch pipe, the source electrode of the first switch pipe,
Grid is connect with this grade of panel output end, and drain electrode is connect with detection port；
The source electrode of the second switch pipe is connect with detection port, and grid is connect with next stage panel output end, and drain electrode connects
Turn off voltage.
Further, the first switch pipe, second switch pipe are TFT thin film transistor (TFT)s.
Preferably, panel output ends at different levels are also connect with the zone of action of panel.
Optionally, first detection port, the second detection port are connect with wave detector.
Specifically, the wave detector includes automatic detection interrupt module, and the automatic detection interrupt module is additionally operable to control
The output of panels at different levels.
Be different from the prior art, above-mentioned technical proposal can indirect detection per level-one output signal, be GOA abnormal causes and class
Type provides more fully signal detection mode, diagnosable per level-one GOA circuit output signals, once and GOA output signals and
When expected inconsistent, you can which rank of circuit abnormality and abnormal cause be diagnosed to be.
Description of the drawings
Fig. 1 is that traditional P detection examination Gout signals described in specific implementation mode export schematic diagram；
Fig. 2 is that the P of the present invention detection examination Gout signals described in specific implementation mode export schematic diagram；
Fig. 3 is that the P of the present invention described in specific implementation mode examines circuit diagram sequential.
Specific implementation mode
For the technology contents of technical solution, construction feature, the objects and the effects are described in detail, below in conjunction with specific reality
It applies example and attached drawing is coordinated to be explained in detail.
Before our new method is introduced in expansion, we have a simple introduction, traditional skill shown in Fig. 1 to traditional technology
In embodiment used by art, usually certain grade of output signal of GOA circuits is drawn out on P inspections pad or is directly led out
On FPC, the signal is detected with oscillograph, judges whether correct or abnormal, there are following two points using the major drawbacks of this method：
1. if to detect certain grade of GOA output signal, this grade of signal must be drawn；And if to detect multistage GOA signals, it must
Need there are corresponding lead and test node.2. certain grade of signal of detection will draw certain grade, corresponding bracing wire and probe node are needed,
In fact we are less likely many grade GOA output circuits of detection, and main cause, which is each lead and detection point, to be increased
Border width；We are unlikely to detect per level-one, we can not just confirm the concrete condition of every level-one output in this way, also can not
The detailed process and reason of decision circuitry exception.
Referring to Fig. 2, for a kind of specific embodiment of the present invention, for a kind of test circuit of panel detection, including first
Port Gout_L, the second detection port Gout_R are detected, detection port here is connect with signal collecting device, can be number
Collecting device can also be analog acquisition equipment, and in general we can directly communicate to connect detection port with wave detector.
The first detection port is connected with the output of chopped-off head panel, and the second detection port is connected with secondary panel output, first inspection
It surveys port and also exports connection with grade panel again.Here chopped-off head panel output can be GIP (the gate device in of a certain grade
Panel) output port has ordinal relation between output port, then the first detection port, the second detection port be respectively alternately and head
The output of grade panel, secondary panel output, grade panel output ... etc. is sequentially connected again.In our embodiment, chopped-off head face
Plate output is that G1 is exported, secondary panel output is G2 outputs, grade panel output G3 is exported and according to odd number number in left, even numbers again
It numbers and is sequentially connected in right rule.In this way when carrying out P inspections, the GIP signals of control panel output are exported successively,
Before only needing the signal for exporting G3 in grade panel again to start output, the signal of G1 stops output, ensure that the same detection
The signal of port will not be exported by different panels to be influenced, and spaced GIP signals also ensure the same detection port
Different operating sequential between there is certain interval, to reduce influencing each other between GIP signals, to more accurately reaching
To the technique effect of detection port detection panel output.
In order to preferably avoid detection panel export influence each other, in the particular embodiment as shown in Figure 1, we
Every grade of panel output is respectively provided with first switch pipe, second switch pipe.For the GIP mouths of panel output where the G1, here first
Switching tube is labeled as T1, and second switch pipe is labeled as T2.Switching tube can select for example general triode of the switch of transistorlike,
Diode switch can also be metal-oxide-semiconductor etc..Wherein first switch pipe is used to control conductings of the GIP to the access of detection port,
Second switch pipe is used to connect with VGL shutdown voltages, is responsible for the open circuit that control GIP accesses are connect with detection output.In Fig. 2 institutes
In the specific embodiment shown, the first switch pipe, second switch pipe are TFT thin film transistor (TFT)s.The source of the first switch pipe
Pole, grid are connect with this grade of panel output end, and drain electrode is connect with detection port；The source electrode of the second switch pipe and detection port
Connection, grid are connect with next stage panel output end, and drain on/off voltage.Specifically when Gate is high potential, T1 just meetings
It opens, the current potential that P is examined to signal line fills height, and at this time since other grades of GOA circuits (if circuit is normal) Gate are low potential,
Therefore other grades of T1 is to close, and is unlikely to influence P inspection current potentials in this way；When prime Gate current potentials are (assuming that when prime is n-th
Grade) when being lower, T1 is closed, and T2 can be opened (at this time when the Gate n+1 of the next stage of prime are high potential) at this time, and P is examined and is interrogated
Number line current potential drags down again.It waits for Gn+2 to export high potential, opens T1 and open, P inspection signals fill height again.GOA circuits weigh successively
Folded, P inspection signals are filled high potential to during moving to as low potential successively.When switching tube uses triode or metal-oxide-semiconductor,
The connection types such as collector emitter voluntarily adjust connection according to above-mentioned function.Thus by above-mentioned design, it is diagnosable every
Level-one GOA circuit output signals, and once GOA output signals and it is expected inconsistent when, you can it is different to be diagnosed to be which rank of circuit
Normal and abnormal cause.
In other preferred embodiments, panel output ends at different levels are also connect with the zone of action of panel, i.e., per level-one
GIP output signals can draw the area AA (active area) for being output to panel all the way, drive AA pixel circuits.If directly
Take GIP signals be output to P inspection signal mode, can also realize the method for the present invention to a certain extent, if but fruit do not connect
Enter to AA panels, be equivalent in circuit and do not load, the signal that Gout is detected is it is possible that level signal is unstable, clutter letter
Number interference is strong, the areas GIP signals access AA are driven Panel, shown so that in face without load level numerical value distortion etc.
P detection examinations are carried out when plate works normally, and avoid above-mentioned negative issue.By the function of the perfect present invention of above-mentioned design, not shadow
Ring the normal use of panel.
In some other specific embodiment, our wave detector includes automatic detection interrupt module, described automatic
The pulse signal that interrupt module can be inputted according to setting detection is detected, once detect pulse signal abnormal (such as amplitude, week
Phase avoids the peak hour) etc., the output of panels at different levels can be interrupted automatically.Specifically, the function of detection interrupt module can pass through automatically
Test side is integrated in realize, for example, directly in wave detector integrate include above-mentioned function processor.By detecting end automatically
End module can improve the automatization level of P inspections, and liberation is artificial, improves the service efficiency of the present invention.
It should be noted that although the various embodiments described above have been described herein, it is not intended to limit
The scope of patent protection of the present invention.Therefore, based on the present invention innovative idea, to embodiment described herein carry out change and repair
Change, or using equivalent structure or equivalent flow shift made by description of the invention and accompanying drawing content, it directly or indirectly will be with
Upper technical solution is used in other related technical areas, is included within the scope of patent protection of the present invention.
Claims (6)
1. a kind of test circuit of panel detection, which is characterized in that including the first detection port, the second detection port, described the
One detection port is connected with the output of chopped-off head panel, and the second detection port is connected with secondary panel output, first detection port
It also exports and connects with grade panel again.
2. the test circuit of panel detection according to claim 1, which is characterized in that every grade of panel output includes first
Switching tube, second switch pipe, source electrode, the grid of the first switch pipe are connect with this grade of panel output end, drain electrode and test side
Mouth connection；
The source electrode of the second switch pipe is connect with detection port, and grid is connect with next stage panel output end, and drain on/off
Voltage.
3. the test circuit of panel detection according to claim 2, which is characterized in that the first switch pipe, second open
It is TFT thin film transistor (TFT)s to close pipe.
4. the test circuit of panel detection according to claim 1, which is characterized in that panel output ends at different levels also with panel
Zone of action connection.
5. the test circuit of panel detection according to claim 1, which is characterized in that first detection port, second
Detection port is connect with wave detector.
6. the test circuit of panel detection according to claim 5, which is characterized in that the wave detector includes automatic detection
Interrupt module, the automatic detection interrupt module are additionally operable to control the output of panels at different levels.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810102705.2A CN108427069A (en) | 2018-02-01 | 2018-02-01 | A kind of test circuit of panel detection |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810102705.2A CN108427069A (en) | 2018-02-01 | 2018-02-01 | A kind of test circuit of panel detection |
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| CN108427069A true CN108427069A (en) | 2018-08-21 |
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| CN201810102705.2A Pending CN108427069A (en) | 2018-02-01 | 2018-02-01 | A kind of test circuit of panel detection |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109166504A (en) * | 2018-10-17 | 2019-01-08 | 惠科股份有限公司 | Test circuit and display device |
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| CN105096789A (en) * | 2015-09-25 | 2015-11-25 | 武汉华星光电技术有限公司 | Common circuit for gate driver on array (GOA) test and shutdown ghost elimination |
| CN205080895U (en) * | 2015-11-09 | 2016-03-09 | 武汉华星光电技术有限公司 | GOA drive circuit , TFT display panel and display device |
| CN105590607A (en) * | 2016-03-10 | 2016-05-18 | 京东方科技集团股份有限公司 | Gate driving circuit, testing method thereof, array substrate comprising gate driving circuit, and display device comprising array substrate |
| US20160284259A1 (en) * | 2015-03-26 | 2016-09-29 | Boe Technology Group Co., Ltd. | Detection device and detection method of a goa circuit of a display panel |
| CN107633830A (en) * | 2017-09-28 | 2018-01-26 | 深圳市华星光电技术有限公司 | A kind of GOA circuit sequences control method and Gate IC, display device |
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2018
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Patent Citations (5)
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| US20160284259A1 (en) * | 2015-03-26 | 2016-09-29 | Boe Technology Group Co., Ltd. | Detection device and detection method of a goa circuit of a display panel |
| CN105096789A (en) * | 2015-09-25 | 2015-11-25 | 武汉华星光电技术有限公司 | Common circuit for gate driver on array (GOA) test and shutdown ghost elimination |
| CN205080895U (en) * | 2015-11-09 | 2016-03-09 | 武汉华星光电技术有限公司 | GOA drive circuit , TFT display panel and display device |
| CN105590607A (en) * | 2016-03-10 | 2016-05-18 | 京东方科技集团股份有限公司 | Gate driving circuit, testing method thereof, array substrate comprising gate driving circuit, and display device comprising array substrate |
| CN107633830A (en) * | 2017-09-28 | 2018-01-26 | 深圳市华星光电技术有限公司 | A kind of GOA circuit sequences control method and Gate IC, display device |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109166504A (en) * | 2018-10-17 | 2019-01-08 | 惠科股份有限公司 | Test circuit and display device |
| WO2020077798A1 (en) * | 2018-10-17 | 2020-04-23 | 惠科股份有限公司 | Test circuit and display device |
| CN109166504B (en) * | 2018-10-17 | 2021-10-01 | 惠科股份有限公司 | Test circuit and display device |
| US11145231B2 (en) | 2018-10-17 | 2021-10-12 | HKC Corporation Limited | Test circuit and display device |
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Application publication date: 20180821 |
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| RJ01 | Rejection of invention patent application after publication |