CN108398915A - Control device and its control method - Google Patents
Control device and its control method Download PDFInfo
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- CN108398915A CN108398915A CN201711133366.6A CN201711133366A CN108398915A CN 108398915 A CN108398915 A CN 108398915A CN 201711133366 A CN201711133366 A CN 201711133366A CN 108398915 A CN108398915 A CN 108398915A
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- 238000000034 method Methods 0.000 title claims abstract description 18
- 238000012545 processing Methods 0.000 claims abstract description 67
- 238000001514 detection method Methods 0.000 claims abstract description 54
- 230000005856 abnormality Effects 0.000 claims abstract description 45
- 230000003068 static effect Effects 0.000 claims description 6
- 125000004122 cyclic group Chemical group 0.000 claims description 4
- 238000013507 mapping Methods 0.000 claims description 4
- 230000006870 function Effects 0.000 description 60
- 238000004891 communication Methods 0.000 description 19
- 238000010586 diagram Methods 0.000 description 6
- 210000004209 hair Anatomy 0.000 description 3
- 238000012544 monitoring process Methods 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 230000002159 abnormal effect Effects 0.000 description 2
- 230000009977 dual effect Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000012795 verification Methods 0.000 description 2
- 238000012790 confirmation Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000003745 diagnosis Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010365 information processing Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000002285 radioactive effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
- G05B19/058—Safety, monitoring
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B23/00—Testing or monitoring of control systems or parts thereof
- G05B23/02—Electric testing or monitoring
- G05B23/0205—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
- G05B23/0259—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterized by the response to fault detection
- G05B23/0264—Control of logging system, e.g. decision on which data to store; time-stamping measurements
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
- G05B19/054—Input/output
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
- G05B19/056—Programming the PLC
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B23/00—Testing or monitoring of control systems or parts thereof
- G05B23/02—Electric testing or monitoring
- G05B23/0205—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
- G05B23/0259—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterized by the response to fault detection
- G05B23/0286—Modifications to the monitored process, e.g. stopping operation or adapting control
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/52—Protection of memory contents; Detection of errors in memory contents
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/702—Masking faults in memories by using spares or by reconfiguring by replacing auxiliary circuits, e.g. spare voltage generators, decoders or sense amplifiers, to be used instead of defective ones
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/10—Plc systems
- G05B2219/11—Plc I-O input output
- G05B2219/1103—Special, intelligent I-O processor, also plc can only access via processor
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/10—Plc systems
- G05B2219/11—Plc I-O input output
- G05B2219/1105—I-O
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/10—Plc systems
- G05B2219/13—Plc programming
- G05B2219/13004—Programming the plc
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/10—Plc systems
- G05B2219/14—Plc safety
- G05B2219/14067—Log, history of key, input information before last fault occurred
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/10—Plc systems
- G05B2219/15—Plc structure of the system
- G05B2219/15057—FPGA field programmable gate array
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C2029/0409—Online test
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/24—Accessing extra cells, e.g. dummy cells or redundant cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/44—Indication or identification of errors, e.g. for repair
- G11C29/4401—Indication or identification of errors, e.g. for repair for self repair
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- Engineering & Computer Science (AREA)
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- General Physics & Mathematics (AREA)
- Automation & Control Theory (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Quality & Reliability (AREA)
- Computer Security & Cryptography (AREA)
- Retry When Errors Occur (AREA)
- Safety Devices In Control Systems (AREA)
- Programmable Controllers (AREA)
- Hardware Redundancy (AREA)
- Detection And Correction Of Errors (AREA)
Abstract
The present invention provides a kind of control device and its control method, including at least programmable circuit portion and is being connected to the arithmetic processing section in programmable circuit portion, and can prevent unnecessary stopping using in control device of the arithmetic processing section to execute user program.In the present invention, abnormality determination unit (15) judged based on map information it is corresponding with functional unit by the position of the soft error detected by wrong detection unit (23), the map information include location informations (Position Number) corresponding with functional unit (function part) in the portions FPGA (20), in the portions FPGA (20).In turn, when processor portion (10) judges unused portion of the position of soft error for functional unit in abnormality determination unit (15), continue the operating of control device (100), in the abnormality determination unit (15) position of judgement soft error for functional unit use portion (such as, majority voter portion and use circuit portion etc.) when, execute scheduled processing.
Description
Technical field
The present invention relates to a kind of control device and its control method, the control device includes at least programmable
(programable) circuit portion and it is connected to the arithmetic processing section in programmable circuit portion, and can be executed using arithmetic processing section
User program (user program).
Background technology
The machinery or equipment used in most production scenes, typically by programmable controller (Programmable logical controller
Device (Programmable Logic Controller, below also referred to as PLC)) equal controller controlled.Thus kind control
Control program performed by device is typically referred to as supporting the information processing apparatus of (support) device by user's operation
It sets and is generated to design.Such program for freely being designed, being made by user is also referred to as user program.
In PLC, including central processing unit (Central Processing Unit, CPU) unit and input/output
The functional units such as (Input/Output, I/O) unit, the I/O units are responsible for from external switch (switch) or sensor
(sensor) input signal and relay (relay) or actuator (actuator) output signal to outside.For function
Unit, sometimes programmable circuits such as use site programmable gate array (Field Programmable Gate Array, FPGA)
To realize.
However, though programmable circuit has the advantages that user can build alone circuit (merit) and exist but then
The shortcomings that being likely to occur soft error (soft error) (demerit), the soft error refers to preserving configuration data
The information of the configuration random-access memory (ConfigRAM) (hereinafter also referred to CRAM) of (configuration data) is because putting
Ray etc. changes.In particular, utilizing static RAM (Static Random Access to CRAM
Memory, SRAM) in the case of, the possibility of soft error, which occurs, becomes notable.
For this purpose, in patent document 1, disclosing a kind of in order to FPGA detection soft errors and equipped with monitoring control circuit
Structure.Specifically, in 1 revealed monitoring control circuit of patent document, have：(check) component is verified, is verified in FPGA
The storage data of set CRAM have inerrancy；And recording-member will be wrong when being tested with mistake by the verification component
Flase drop measurement information is included with detection date information and is recorded, can be wrong in outside display when being recorded in recording-member
Accidentally occur.
[existing technical literature]
[patent document]
Patent document 1：Japanese Patent Laid-Open 2014-52781 bulletins
Invention content
[problem to be solved by the invention]
However, patent document 1 it is revealed monitoring control circuit can only judge preserve configuration data CRAM in whether there is or not hairs
Raw soft error, even if the soft error occurred must if being located at the position unrelated with the functional unit constituted in programmable circuit
Control device must be made to stop.Therefore there are following problems：Even if the soft error that will not be impacted to the function of control device occurs
Accidentally, control device can also stop, to which unnecessary stopping occur.
The purpose of the present invention is to provide a kind of control device and its control methods, including at least programmable circuit portion
And it is connected to the arithmetic processing section in programmable circuit portion, and the control device of user program can be executed using arithmetic processing section
In, unnecessary stopping can be prevented.
[technical means to solve problem]
According to an aspect of the present invention, a kind of control device including at least programmable circuit portion and is connected to programmable electricity
The arithmetic processing section in road portion, and user program can be executed using arithmetic processing section, wherein programmable circuit portion includes：It preserves
Portion is stored in the configuration data of the function part constituted in programmable circuit portion；And wrong detection unit, detect the soft error of storage unit
Accidentally, arithmetic processing section includes：Storage part, storage mapping information, the map information include and the function in programmable circuit portion
Portion is corresponding, the location information in programmable circuit portion；And abnormality determination unit, judged by error detection based on map information
The position for the soft error that portion detects is corresponding with function part, and arithmetic processing section judges the position of soft error in abnormality determination unit
For function part unused portion when, continue the operating of control device, in abnormality determination unit judge soft error position be function
When the use portion in portion, scheduled processing is executed.
Preferably, scheduled processing is the processing for making programmable circuit portion stop.
Preferably, scheduled processing is to switch to the place for condensing operating for only stopping the function part of soft error position
Reason.
Preferably, function part includes the 1st function part comprising redundant circuit and the 2nd function comprising irredundant circuit
Portion only makes the circuit of soft error position when arithmetic processing section judges that the position of soft error is 1 function part in abnormality determination unit
Stop and remain in operation, when judging that the position of soft error is 2 function part in abnormality determination unit, execution, which is switched to, only makes soft error
The processing for condensing operating that accidentally function part of position stops.
Preferably, storage unit can be divided into scheduled block (block) by wrong detection unit, be detected for each block
Soft error.
Preferably, abnormality determination unit considers whether the position of the soft error to detect in the past, to execute scheduled place
Reason.
Preferably, wrong detection unit is come using cyclic redundancy check (Cyclic Redundancy Check, CRC) code
Carry out error detection.
Preferably, programmable circuit portion is static RAM (the Static Random in storage unit
Access Memory, SRAM) in preserve field programmable gate array (the Field Programmable Gate of configuration data
Array, FPGA).
According to another aspect of the present invention, a kind of control method of control device, the control device are included at least and can be compiled
Journey circuit portion and the arithmetic processing section for being connected to programmable circuit portion, and user program can be executed using arithmetic processing section,
In, programmable circuit portion includes：Storage unit is stored in the configuration data of the function part constituted in programmable circuit portion；And it is wrong
The soft error of storage unit is detected in error detection portion, and arithmetic processing section includes the storage part of storage mapping information, the map information packet
Containing location information corresponding with the function part in programmable circuit portion, in programmable circuit portion, control method includes following steps
Suddenly：Judge that the position of the soft error detected by wrong detection unit is corresponding with function part based on map information；It is soft when judging
When the position of mistake is the unused portion of function part, continue the operating of control device；And when the position of judgement soft error is work(
When the use portion in energy portion, scheduled processing is executed.
[The effect of invention]
According to the control device of this technology, it can judge that the position of soft error is not making for function part in abnormality determination unit
Portion is still used with portion, therefore can realize high reliability and prevent unnecessary stopping.
Description of the drawings
Fig. 1 is the block diagram of an example for the hardware configuration for indicating the control device in present embodiment.
Fig. 2 is the block diagram of an example of the soft error detection for illustrating the portions FPGA in present embodiment.
Fig. 3 is the time for illustrating the wrong reading unit in present embodiment to an example on the reading opportunity of error message
Figure.
Fig. 4 is the flow chart for processing when illustrating the abnormality detection in present embodiment.
[explanation of symbol]
10：Processor portion
11：ROM
12：RAM
15：Abnormality determination unit
16：Map information
20：The portions FPGA
21：CRAM
22：Subscriber's line circuit
23：Wrong detection unit
24：Mistake reading unit
25：Communication IF
30：I/O units
100：Control device
200：Input-output apparatus
S51~S61：Step
Specific implementation mode
Hereinafter, present embodiment is described in detail with reference to the attached drawings.In addition, in attached drawing, same symbol indicates same or suitable
Part.
Fig. 1 is the block diagram of an example of hardware (hardware) structure for indicating the control device in present embodiment.As
An example, the control device 100 of present embodiment are to use programmable logic controller (PLC) (Programmable Logic
Controller, PLC) implement.Control device 100 will be by executing the program (system program (system pre-saved
Program) and user program etc.) and the command value that calculates, give to via input/output (Input/Output, I/O) unit
The control object (such as motor driver (motor driver) etc.) of 30 connections, and obtain state from the control object
Value.That is, control device 100 is dynamically generated command value appropriate by the state value of feedback (feedback) control object,
So as to suitably be controlled according to situation.
Moreover, control device 100 is as shown in Figure 1, with processor portion 10, the portions FPGA 20, read-only memory (Read
Only Memory, ROM) 11, random access memory (Random Access Memory, RAM) 12 and I/O units 30.Control
Each part in device 100 is connected by bus (bus).
Processor portion 10 is substantially carried out the control with control object by executing the program being stored in ROM 11 or RAM 12
Make or operate relevant processing.The portions FPGA (programmable circuit portion) 20 constitute functional unit, to the number inputted from processor portion 10
Word (digital) value executes specific processing.ROM 11 preserves the program controlled control device 100 or procedure operation
Required data etc..RAM 12 is operated as the working region (work area) in processor portion 10.I/O units 30 carry
For the interface (interface) between control object.Input-output apparatus 200 be as touch screen (touch panel) that
Sample to user's prompt message, and accepts the device of operation input from the user.
In order to configure the portions FPGA 20 to execute the functional unit (function part) of particular procedure, need at device (device)
The configuration of middle write-in configuration data.In general, being configured immediately to the portions FPGA 20 after power supply connection, acquisition can carry out institute
The functional unit of desired circuit operation.
However, the portions FPGA 20 are likely to occur soft error, that is, preserve the information of the CRAM of configuration data because of radioactive ray etc.
It changes, therefore, error detection is carried out in order to detect the soft error of CRAM.Hereinafter, the soft error in the portions FPGA 20 is described in detail
Error detection.Fig. 2 is the block diagram of an example of the soft error detection for illustrating the portions FPGA 20 in present embodiment.
The portions FPGA 20 are by into the configuration in the configuration data write device for being about to be stored in CRAM 21, to set
Constitute the subscriber's line circuit 22 of functional unit.Herein, CRAM 21 is, for example, SRAM (Static Random Access Memory).
The portions FPGA 20 include the wrong detection unit 23 of the soft error for detecting CRAM 21.Wrong detection unit 23 is to use
CRC (Cyclic Redundancy Check) codes carry out the detection of soft error.Specifically, wrong detection unit 23 is to CRAM
21 every frame (frame) adds CRC code, CRC check is carried out as unit of frame, thus carries out the detection of soft error.Mistake
Whether the calculating that test section 23 sequentially carries out multiple frames contained in the portions FPGA 20 CRC code is consistent with attached CRC code
CRC check carries out CRC check with starting the cycle over from initial frame again when the CRC check of all frames is completed.In addition, mistake
Test section 23 can not be to carry out CRC check using all frames contained in the portions FPGA 20 as 1 unit, and be divided into predetermined yet
Block, CRC check is carried out to each block.It is extremely constituted for example, dividing in the portions FPGA 20 to constitute the block of functional unit A
This 4 blocks of the block of functional unit D carry out CRC check to each block respectively.
CRAM 21 is judged in the entirety in the portions FPGA 20 whether there is or not in the case of soft error, even then not constituting function
Soft error occurs in the unused portion of unit, can not also be distinguished.Therefore, in present embodiment, soft error has occurred in determination
The portions FPGA 20 in position (the hereinafter also referred to position of soft error) which functional unit for constituting in the portions FPGA 20 corresponded to.
Specifically, the abnormality determination unit 15 in processor portion 10 is based on map information 16, come judge to be detected by wrong detection unit 23
Which functional unit the position of soft error corresponds to.
First, wrong detection unit 23 is when detecting soft error, will be comprising detected soft via wrong reading unit 24
The register (register) of daily record (log) information write-in subscriber's line circuit 22 of wrong content.In log information, as being examined
The content for the soft error measured, such as include position (address information of happening part) or the error occurrence condition mark of soft error
Remember (flag) etc..Moreover, in log information, in turn the content for the soft error that the 1st time detects is held in daily record 0, it will
The content of 2nd soft error detected is held in daily record 1.In turn, wrong detection unit 23 is a by the generation comprising soft error
The register of state (status) the write-in subscriber's line circuit 22 of the information such as the confirmation situation in number or processor portion 10.
Herein, illustrate reading opportunity of the mistake reading unit 24 to error message.Fig. 3 is for illustrating in present embodiment
Time diagram (timing chart) of the mistake reading unit 24 to an example on the reading opportunity of error message.Time diagram shown in Fig. 3
In, it is illustrated that the opportunity until the N frames to N+5 frames of CRAM 21.Also, wrong detection unit 23 is in N+1 frames, the N+ of CRAM 21
Soft error is detected in 2 frames and N+4 frames.Even if wrong detection unit 23 detects soft error in the N+1 frames of CRAM 21, but in N
During the data of+1 frame are read, error message label is not made to become ON states.Wrong detection unit 23 in next N+2 frames,
So that the error message of the soft error detected in N+1 frames is marked becomes ON states.Therefore, mistake reading unit 24 is in N+2 frames
During data are read, the error message of the soft error detected in N+1 frames is read from wrong detection unit 23.
Similarly, even if wrong detection unit 23 detects soft error in the N+2 frames of CRAM 21, but in the data of N+2 frames
During reading, error message label is not made to become ON states.Wrong detection unit 23 makes in next N+3 frames in N+2 frames
The error message label of the soft error detected becomes ON states.Therefore, mistake reading unit 24 reads the phase in the data of N+3 frames
Between, the error message of the soft error detected in N+2 frames is read from wrong detection unit 23.In addition, due to the N+ in CRAM 21
Soft error is not detected in 3 frames, therefore during the data of N+4 frames are read, error message label becomes OFF state.However, wrong
Accidentally reading unit 24 is during the data of N+4 frames are read, without reading the error message of soft error detected in N+3 frames, because
This can continue the error message for reading the soft error detected in N+2 frames.
Fig. 2 is returned to, wrong detection unit 23 sends interrupt notification when detecting soft error, to processor portion 10.Processor
Portion 10 starts the processing in abnormality determination unit 15 when receiving interrupt notification.Abnormality determination unit 15 via the portions FPGA 20 communication
Interface (Interface, IF) 25 reads soft error with reference to the log information kept by subscriber's line circuit 22 from the log information
Position accidentally.Abnormality determination unit 15 is based on map information 16, to judge which function the position of read-out soft error corresponds to
Unit.Include Position Number in the position of read-out soft error.Map information 16 is stored with corresponding with the Position Number
Functional unit information.That is, map information 16 includes position corresponding with the functional unit in the portions FPGA 20, in the portions FPGA 20
Confidence ceases (Position Number).
The following table 1 is the figure of an example for illustrating the map information 16 in present embodiment.In map information 16, storage
There is the information of 0~8 Position Number and the title of corresponding functional unit.Functional unit corresponding to Position Number 0 is
The portion of being not used.Functional unit corresponding to Position Number 1 is redundant circuit portion, and more specifically, Position Number 1A is as redundancy
Circuit A, Position Number 1B are functioned as redundant circuit B, Position Number 1C as redundant circuit C.Corresponding to Position Number 2
Functional unit be the 1st serial (serial) communication unit.Functional unit corresponding to Position Number 3 is the 2nd serial communication portion.Position
It is input/output control unit to set the functional unit corresponding to number 4.Functional unit corresponding to Position Number 5 is local
(local) communication unit.Functional unit corresponding to Position Number 6 is network (network) communication unit.Corresponding to Position Number 7
Functional unit be timer (timer) function part.Functional unit corresponding to Position Number 8 is other function parts.
| Position Number | Corresponding functional unit |
| 0 | The portion of being not used |
| 1A | Redundant circuit A |
| 1B | Redundant circuit B |
| 1C | Redundant circuit C |
| 2 | 1st serial communication portion |
| 3 | 2nd serial communication portion |
| 4 | Input/output control unit |
| 5 | Local communication portion |
| 6 | Network communication unit |
| 7 | Timer |
| 8 | It is other |
Table 1
Abnormality determination unit 15 based on map information 16 come judge read-out soft error position correspond to which function
When unit, described information is written in the state kept by subscriber's line circuit 22, with more new state.For example, abnormality determination unit 15
It is which in the portion that is not used, redundant circuit portion and use circuit portion by the functional unit judged in read-out log information
A kind of information write state, with more new state.In addition, in the status, in the log information that abnormality determination unit 15 is not yet analyzed
In be stored with the information that do not analyze.Therefore, abnormality determination unit 15 from log information read soft error position when, by referring to
State can identify the log information not yet analyzed.
Map information 16 is storage part (such as the RAM for being formed when making configuration data, and being stored in processor portion 10
12) in, the configuration data is for being set in the functional unit constituted in subscriber's line circuit 22.
In the past, due to that can not determine which functional unit the position of soft error corresponds to, FPGA is not in order to prevent
Work as operation, once detect soft error, it will mechanically stop control.Accordingly, there exist following problems：Generation does not influence
When soft error (soft error that occurs in the portion of being not used) of function also can stop control, to which unnecessary stop occur
Only.Moreover, when soft error occurs, separately diagnosed whether there is or not improper operation using diagnostic program etc., thereby, it is possible to prevent need not
The stopping wanted, but there are it is following the problems such as：Diagnostic program etc. is for whether there is or not the verification and measurement ratio of improper operation is low；And it needs for holding
During row diagnosis.
Therefore, as previously mentioned, by making abnormality determination unit 15 that can judge the position pair of soft error based on map information 16
Should be in which functional unit, so as to prevent unnecessary stopping.Specifically, illustrating the exception in present embodiment below
Processing when detection.Fig. 4 is the flow chart for processing when illustrating the abnormality detection in present embodiment.
First, processor portion 10 determines whether to receive the interrupt notification (step of soft error detection from wrong detection unit 23
S51).If it is determined that not receive interrupt notification (step S51：No (NO)), then processor portion 10 continues the reception etc. of interrupt notification
It waits for state, executes normal processing.If it is determined that receive interrupt notification (step S51：It is (YES)), then processor portion 10 exports
For making what mistake light emitting diode (Light Emitting Diode, LED) (not shown) lighted to light signal (step
S52).Mistake LED is in controller for being located at control device or being connected to control device etc., for informing wrong hair to user
Raw informs component.In addition, informing that component is not limited to wrong LED or liquid crystal display (Liquid Crystal
Display, LCD) etc. display devices or the loud speaker (speaker) etc. for output error sound.
Next, processor portion 10 (especially abnormality determination unit 15) reads log information from subscriber's line circuit 22, and it is based on
Map information 16 determines errors present (step S53).Herein, so-called determining errors present refers to determining by wrong detection unit
The position of 23 soft errors detected corresponds to which functional unit constituted in the portions FPGA 20.If for example, the position of soft error
For Position Number 4 (with reference to Fig. 4), then abnormality determination unit 15 judge determined by the functional unit (function part) of errors present be defeated
Enter/output control unit.
Next, whether errors present determined by processor portion 10 (especially abnormality determination unit 15) judgement is as work(
The unused portion (step S54) of energy unit (function part).For example, if the position of soft error is Position Number 0 (with reference to Fig. 4),
Abnormality determination unit 15 judges that the functional unit (function part) of identified errors present is the portion that is not used.If it is determined that identified mistake
Accidentally position is unused portion (the step S54 as functional unit (function part)：It is), then processor portion 10 makes control device 100
It remains in operation (step S55).That is, even if soft error has occurred in the unused portion as functional unit (function part), due to
It still is able to work orderly as control device 100, therefore it is not made to stop and remain in operation, even if soft error occurs
Accidentally, it is also prevented from unnecessary stopping.In addition, after processor portion 10 makes control device 100 remain in operation in step S55, terminate
Processing when abnormality detection.
Next, if it is determined that identified errors present is not intended as unused portion's (step of functional unit (function part)
S54：It is no), then whether errors present determined by processor portion 10 (especially abnormality determination unit 15) judgement is as function list
The redundant circuit portion (step S56) of first (function part).Herein, so-called redundant circuit portion, refers to the circuit portion of redundant, is to repeat
Ground is formed with the circuit with same function.Such as dual circuit portion comprising the circuit dual that will have same function,
Or the redundant circuit portion for majority voting being carried out with the circuit triple modular redundant of same function.In example shown in Fig. 4, will have
The circuit of same function is triple to turn to redundant circuit A, redundant circuit B and redundant circuit C.
If it is determined that identified errors present is redundant circuit portion (the step S56 as functional unit (function part)：It is),
Then processor portion 10 makes the function stop (step S57) of the redundant circuit of errors present.For example, if the position of soft error is position
Number 1A (reference Fig. 4), then abnormality determination unit 15 makes the function stop of the redundant circuit A of identified errors present.Processor
When soft error has occurred in redundant circuit portion in portion 10, only stop the circuit that soft error has occurred in redundant circuit portion.If that is,
Redundant circuit portion is the redundant circuit portion that triple modular redundant has redundant circuit A, redundant circuit B and redundant circuit C, only makes redundant circuit A
Function stop, and execute processing using remaining redundant circuit B and redundant circuit C.Then, processor portion 10 utilizes redundancy
Circuit B and redundant circuit C makes control device 100 remain in operation (step S55).That is, even if a part of electricity in redundant circuit portion
Soft error has occurred in road, due to still being able to work orderly as control device 100, stop it and carry out after
Reforwarding turns, even if soft error occurs, is also prevented from unnecessary stopping.In addition, processor portion 10 makes control device in step S55
After 100 remain in operation, terminate processing when abnormality detection.
Next, if it is determined that identified errors present is not intended as the redundant circuit portion (step of functional unit (function part)
Rapid S56：It is no), then processor portion 10 makes the functional unit (function part) of errors present stop (step S58).If for example, soft error
Position be Position Number 2 (with reference to Fig. 4), then abnormality determination unit 15 judge determined by errors present functional unit (function
Portion) it is the 1st serial communication portion.Processor portion 10 only makes the functional unit (function in the 1st serial communication portion that soft error has occurred
Portion) stop.
In the state that processor portion 10 in step S57 stops only the circuit that soft error has occurred, determining whether can
Control device 100 is set to carry out condensing operating (step S59).Specifically, in processor portion 10, it is used as table (table) in advance
And the operation information of condensing for operating and being set as "available" or being "No" will be condensed by being prepared with when soft error has occurred, from the table
Reading is corresponding with the functional unit stopped in step S58 to condense operation information to be judged.In addition, in processor portion 10
In, the operation of control device 100 will be able to maintain that functional unit (function part) not stopped in step S58, and
The functional unit that will not be impacted to the processing in other functional units (function part) is condensed operating as "available" and is registered in
In table.Even if for example, only stop the functional unit (function part) in the 1st serial communication portion, if connect with the 2nd serial communication portion
The processing of equipment is unaffected, then can condense the function in the 1st serial communication portion to remain in operation.If it is determined that for that control can be made to fill
100 are set to carry out condensing operating (step S59：It is), then processor portion 10 stopped part of functions unit (work(in step S57
Energy portion) in the state of, make control device 100 carry out condensing operating (step S60).Even if part of functions unit (function part) becomes
Obtaining can not utilize, but still control device 100 is made to carry out condensing operating, even if soft error occurs as a result, be also prevented from unnecessary stop
Only.In addition, processor portion 10 makes control device 100 carry out after condensing operating in step S60, terminate place when abnormality detection
Reason.
Next, if it is determined that control device 100 can not be made to carry out condensing operating (step S59：It is no), then processor portion 10 is
So that control device 100 is stopped and starts to back up (backup) processing (step S61).For example, if the position of soft error is position
Number 5 (with reference to Fig. 4), then abnormality determination unit 15 judge determined by the functional unit (function part) of errors present be local communication
Portion.When soft error has occurred in local communication portion in processor portion 10, it is considered as the operation for being unable to maintain that control device 100, and makes
It forces to stop in the portions FPGA 20.When making the portions FPGA 20 stop, it is necessary to carrying out for the portions FPGA 20 will to be made to restart required number
According to equal storage to the processing in RAM 12, therefore processor portion 10 starts back-up processing in step S61.In addition, processor portion
10 after the completion of the back-up processing of step S61, and the portions FPGA 20 is made to force to stop.
In addition, in the case that processor portion 10 has carried out back-up processing in step S61 and the portions FPGA 20 is made to force to stop,
The portions FPGA 20 can be reconfigured, setting again can carry out functional unit and the restarting of desired circuit operation.
In addition, processor portion 10 has carried out back-up processing in step S61 and the portions FPGA 20 is made to force after stopping, when terminating abnormality detection
Processing.
As described above, in the control device 100 of present embodiment, abnormality determination unit 15 is based on the position indicated in the portions FPGA 20
The corresponding map information for setting (Position Number) and the functional unit (function part) in the portions FPGA 20, to judge by wrong detection unit
The position of 23 soft errors detected is corresponding with functional unit.In turn, processor portion 10 judges soft in abnormality determination unit 15
When the position of mistake is the unused portion of functional unit, continues the operating of control device 100, judge in abnormality determination unit 15 soft
When the position of mistake is use portion (such as redundant circuit portion and use circuit portion etc.) of functional unit, scheduled processing is executed.
Therefore, even if soft error has occurred in the portions FPGA 20, control device 100 remain to realize high reliability, and can prevent it is unnecessary
Stopping.
Moreover, scheduled processing may be either the processing for making the portions FPGA 20 stop, or it is switched to and only makes soft error position
Functional unit stop the processing for condensing operating.By making control device 100 carry out condensing operating, can further prevent not
Necessary stopping.In addition, as scheduled processing, or makes processing that the operating of control device 100 temporarily ceases, informs hair
It has given birth to the processing of soft error and has carried out the processing etc. for the operating that record soft error occurs.
In turn, processor portion 10 judges the position of soft error for redundant circuit (such as redundant electric in abnormality determination unit 15
Road portion etc.) when, so that the redundant circuit positioned at soft error position is stopped and is remained in operation.Moreover, processor portion 10 is sentenced extremely
Determine in portion 15 judge soft error position for irredundant circuit (such as using circuit portion etc.) when, if judge can condense operating,
Execution is switched to the processing for condensing operating for only stopping the function part of soft error position.Therefore, even if in the superfluous of the portions FPGA 20
Soft error has occurred in remaining circuit, control device 100 remains to realize high reliability, and can prevent unnecessary stopping.
Moreover, in the control method of the control device 100 of present embodiment, following step (step S53) is carried out, that is, base
Judge that the position of the soft error detected by wrong detection unit 23 is corresponding with functional unit in map information.In turn, in institute
It states in control method, if it is determined that the position of soft error is the unused portion of functional unit, then into the operating for exercising control device 100
The step of continuation (step S55).Moreover, in the control method, if it is determined that the position of soft error is the use of functional unit
Portion (such as redundant circuit portion and using circuit portion etc.), then the step of carrying out execution predetermined process (step S58, S60).Therefore,
Even if soft error has occurred in the portions FPGA 20, the control method of control device 100 remains to realize high reliability, and can prevent not
Necessary stopping.
(variation)
(1) in the wrong detection unit 23 of present embodiment, to coming all frames contained in the portions FPGA 20 as 1 unit
The case where carrying out soft error detection is illustrated, and but it is not limited to this.For example, wrong detection unit 23 can also divide CRAM 21
For scheduled block, soft error is detected to each block.Wrong detection unit 23 detects soft error by being divided into multiple blocks
Accidentally, to which the testing result without waiting for all frames can detect soft error.
(2) in the processor portion 10 of present embodiment, to judging that the position of soft error is function in abnormality determination unit 15
The case where executing predetermined process when use portion (such as redundant circuit portion and use circuit portion etc.) of unit is illustrated, but simultaneously
It is without being limited thereto.For example, the log information that processor portion 10 may be based on subscriber's line circuit 22 detects to consider whether over
Soft error position, to execute scheduled processing.Therefore, control dress can be stopped in the case where soft error has occurred in same position
100 are set, unnecessary stopping can be prevented.
(3) in the processor portion 10 of present embodiment, to when the functional unit of errors present be redundant circuit portion when, only
The case where making control device 100 remain in operation in the state of making the redundant circuit that soft error has occurred stop, being illustrated, but
It is not limited to this.For example, processor portion 10 can also sent out in the redundant circuit that the functional unit of errors present is three or more
The quantity of redundant circuit given birth to soft error and stopped making it carry out condensing operating when being more than half quantity or more.
(4) in the processor portion 10 of present embodiment, to executing book office when soft error has occurred in using circuit portion
The case where reason, is illustrated, and but it is not limited to this.For example, can be also weighted according to the function of circuit portion is used, handle
Performed processing is changed based on the weighting when soft error has occurred in using circuit portion in device portion 10.If specifically,
Function is that soft error has occurred in the use circuit portion in local communication portion, then processor portion 10 makes the portions FPGA 20 force to stop, if but
Function is that soft error has occurred in the use circuit portion in serial communication portion, then processor portion 10 makes it carry out condensing operating.
(5) in the control device 100 of present embodiment, in Fig. 1 and structure shown in Fig. 2, caused by soft error
Processing when abnormal generation is illustrated, but as an example of the structure, as long as processing when same abnormal generation can be carried out,
It is then that any structure all may be used.
It is believed that the embodiment this time disclosed is considered in all respects only as illustration rather than limiter.The scope of the present invention is
Shown in claim rather than the explanation, it is intended to encompass with claim be being had altered in impartial meaning and range.
Claims (9)
1. a kind of control device, including at least programmable circuit portion and it is connected to the arithmetic processing section in the programmable circuit portion,
And user program can be executed using the arithmetic processing section, the control device is characterized in that,
The programmable circuit portion includes：
Storage unit is stored in the configuration data of the function part constituted in the programmable circuit portion；And
Wrong detection unit detects the soft error of the storage unit,
The arithmetic processing section includes：
Storage part, storage mapping information, the map information include corresponding with the function part in the programmable circuit portion
, location information in the programmable circuit portion；And
Abnormality determination unit, based on the map information come judge the position by the soft error detected by the wrong detection unit with
The correspondence of the function part,
The arithmetic processing section includes：
When judging that the position of the soft error is the unused portion of the function part in the abnormality determination unit, continue the control
The operating of device processed,
When judging that the position of the soft error is the use portion of the function part in the abnormality determination unit, scheduled place is executed
Reason.
2. control device according to claim 1, which is characterized in that
The scheduled processing is the processing for making the programmable circuit portion stop.
3. control device according to claim 1, which is characterized in that
Scheduled handle is to switch to the place for condensing operating that the function part for the position for only making the soft error stops
Reason.
4. control device according to claim 1 or 2, which is characterized in that
The function part includes the 1st function part and the 2nd function part comprising irredundant circuit comprising redundant circuit,
The arithmetic processing section includes：
When judging that the position of the soft error is 1 function part in the abnormality determination unit, only make the soft error
The circuit of position stops and remains in operation,
When judging that the position of the soft error is 2 function part in the abnormality determination unit, execution, which is switched to, only makes institute
State the processing for condensing operating that the function part of the position of soft error stops.
5. control device according to claim 1, which is characterized in that
The wrong detection unit includes that the storage unit is divided into scheduled block, and soft error is detected for each block
Accidentally.
6. control device according to claim 1, which is characterized in that
The abnormality determination unit considers whether as the position of the soft error detected in the past, to execute the scheduled place
Reason.
7. control device according to claim 1, which is characterized in that
The wrong detection unit carries out error detection using cyclic redundancy check code.
8. control device according to claim 1, which is characterized in that
The programmable circuit portion is the scene that configuration data is preserved in the static RAM of the storage unit
Programmable gate array.
9. a kind of control method of control device, the control device includes at least programmable circuit portion and is connected to and described can compile
The arithmetic processing section of journey circuit portion, and user program, the feature of the control method can be executed using the arithmetic processing section
It is,
The programmable circuit portion includes：Storage unit is stored in the configuration number of the function part constituted in the programmable circuit portion
According to；And wrong detection unit, the soft error of the storage unit is detected,
The arithmetic processing section includes the storage part of storage mapping information, and the map information includes and the programmable circuit portion
In the function part is corresponding, the location information in the programmable circuit portion,
The control method includes the following steps：
Based on the map information come the position for judging the soft error detected by the wrong detection unit and the function part
It is corresponding；
When it is the unused portion of the function part to judge the position of the soft error, continue the operating of the control device；With
And
When it is the use portion of the function part to judge the position of the soft error, scheduled processing is executed.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2017-021057 | 2017-02-08 | ||
| JP2017021057A JP6880795B2 (en) | 2017-02-08 | 2017-02-08 | Control device and its control method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108398915A true CN108398915A (en) | 2018-08-14 |
| CN108398915B CN108398915B (en) | 2021-03-02 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711133366.6A Active CN108398915B (en) | 2017-02-08 | 2017-11-15 | Control device and control method thereof |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US20180224842A1 (en) |
| EP (1) | EP3361333B1 (en) |
| JP (1) | JP6880795B2 (en) |
| CN (1) | CN108398915B (en) |
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Also Published As
| Publication number | Publication date |
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| JP2018128820A (en) | 2018-08-16 |
| EP3361333A1 (en) | 2018-08-15 |
| US20180224842A1 (en) | 2018-08-09 |
| EP3361333B1 (en) | 2019-10-23 |
| CN108398915B (en) | 2021-03-02 |
| JP6880795B2 (en) | 2021-06-02 |
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