CN108389782B - Method for forming ultra-low K dielectric layer - Google Patents
Method for forming ultra-low K dielectric layer Download PDFInfo
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- CN108389782B CN108389782B CN201810181080.3A CN201810181080A CN108389782B CN 108389782 B CN108389782 B CN 108389782B CN 201810181080 A CN201810181080 A CN 201810181080A CN 108389782 B CN108389782 B CN 108389782B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
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Abstract
The invention provides a method of forming an ultra-low K dielectric layer. The method comprises the following steps: 1) forming a silicon oxycarbide layer on a silicon substrate by a chemical vapor deposition method; 2) depositing photoresist on the silicon oxycarbide layer to form a photoresist pattern through photoetching or electron beam exposure; 3) implanting He ions through the photoresist pattern; 4) removing the photoresist pattern; 5) carrying out heat treatment on the silicon oxycarbide layer subjected to He ion implantation; 6) forming a silicon oxycarbide layer having pores; 7) the silicon oxycarbide layer with pores is provided with a flat upper surface by chemical mechanical polishing; according to the invention, an organic matter pore-foaming agent is not used, so that the complex process for removing the organic matter is reduced; forming smaller microporous structures using ion implantation; the use of the regular lattice-like pore structure enables the control of the distribution of pores, the control of the distribution of implanted ions and the distribution of pores, the further control of the dielectric constant of the material and the improvement of the quality of the ultra-low K dielectric layer.
Description
Technical Field
The invention belongs to the field of semiconductor manufacturing, and particularly relates to a method for forming an ultralow-K dielectric layer.
Background
With the development of semiconductor technology, the concentration of integrated circuits increases, and in order to reduce the delay effect of capacitance and resistance, a dielectric layer between two metal interconnection structures is required to have a lower dielectric constant, in the prior art, a dielectric material is transited from silicon oxide with a dielectric constant of about 4 to fluorine silicon glass with a dielectric constant of about 3.7, then to silicon oxycarbide with a dielectric constant of about 3, and then to an ultra-low-K dielectric material with a certain hole. Currently, an ultra-low K dielectric material is formed by depositing a dielectric barrier layer and a low dielectric layer containing a porogen on a semiconductor substrate, and then removing the porogen from the low dielectric layer to form a microporous low dielectric layer. The uniform distribution of the pore-foaming agent is controlled, the process of irradiating the pore-foaming agent by using ultraviolet rays is complex, and meanwhile, a compact silicon oxide layer is formed on the surface of the silicon oxycarbide by using oxygen plasma, which is not beneficial to discharging the pore-foaming agent.
Disclosure of Invention
In view of solving the above problems, the present invention provides a method of forming an ultra-low K dielectric layer. The method comprises the following steps: 1) forming a silicon oxycarbide layer on a silicon substrate by a chemical vapor deposition method; 2) depositing photoresist on the silicon oxycarbide layer to form a photoresist pattern through photoetching or electron beam exposure; 3) implanting He ions through the photoresist pattern; 4) removing the photoresist pattern; 5) carrying out heat treatment on the silicon oxycarbide layer subjected to He ion implantation; 6) forming a silicon oxycarbide layer having pores; 7) the silicon oxycarbide layer having voids is provided with a flat upper surface by chemical mechanical polishing.
The invention also provides another method of forming an ultra-low K dielectric layer. The method comprises the following steps: 1) passaging on a silicon substrateForming a silicon oxycarbide layer by chemical vapor deposition; 2) depositing photoresist on the silicon oxycarbide layer to form a photoresist pattern through photoetching or electron beam exposure; 3) performing H through the photoresist pattern+And implantation of He ions; 4) removing the photoresist pattern; 5) carrying out heat treatment on the silicon oxycarbide layer subjected to He ion implantation; 6) forming a silicon oxycarbide layer having pores; 7) the silicon oxycarbide layer having voids is provided with a flat upper surface by chemical mechanical polishing.
According to an embodiment of the present invention, the raw material gas for forming the silicon oxycarbide layer in the step 1) is CH4、O2And SiH4(ii) a In the silicon oxycarbide layer, the ratio of carbon element to oxygen element is 1: 1-2: 1.
According to an embodiment of the present invention, the pattern of the photoresist formed in step 2) is a regular lattice-shaped hole structure with a thickness greater than 1.5 μm.
According to the embodiment of the invention, the energy of He ion implantation in the step 3) is 20-150 KeV, and the implantation dosage is more than 5 multiplied by 1016。
According to the embodiment of the invention, the temperature of the heat treatment in the step 5) is 400-600 ℃, and the time of the heat treatment is 0.5-1.5 hours.
According to an embodiment of the present invention, the dielectric constant of the ultra-low K dielectric layer formed after said step 6) is also less than 2.5.
According to an embodiment of the present invention, the dielectric constant of the ultra-low K dielectric layer formed after said step 6) is also less than 2.3.
The invention has the following advantages:
(1) the organic pore-foaming agent is not used, so that the complex process for removing the organic matters is reduced;
(2) forming smaller microporous structures using ion implantation;
(3) the use of a regular lattice-like pore structure enables control of the distribution of pores, and control of the distribution of implanted ions and the distribution of pores.
Drawings
FIG. 1 is a process diagram of a method of forming an ultra-low K dielectric layer.
1: a silicon substrate; 2: a silicon oxycarbide layer; 3: a photoresist pattern; 4: an aperture; 5: ion implantation, H+Ions, He ions, H+Ions and He ions; 6: an implantation region; 7: porous silica.
Detailed Description
First embodiment
Referring to fig. 1, a method of forming an ultra-low K dielectric layer. The method comprises the following steps: as shown in fig. 1 (a), step 1) forms a silicon oxycarbide layer 2 on a silicon substrate 1 by a chemical vapor deposition method; the raw material gas of the silicon oxycarbide layer is CH4、O2And SiH4(ii) a In the silicon oxycarbide layer 2, the ratio of carbon element to oxygen element is 1: 1-2: 1; as shown in fig. 1 (b), step 2) depositing a photoresist on the silicon oxycarbide layer 2 to form a photoresist pattern 3 by photolithography or electron beam exposure; the pattern 3 for forming the photoresist is a regular lattice-shaped porous structure, and the thickness of the photoresist pattern is more than 1.5 mu m; the regular lattice-shaped hole structure has the lattice holes 4 with the size of 2-5 mu m; the area of the dot matrix holes 4 accounts for 30% -50% of the total area of the photoresist pattern; as shown in fig. 1 (c), step 3) performs implantation of He ions 5 through the photoresist pattern; the energy of He ion 5 implantation is 20-150 KeV, and the implantation dosage is more than 5 multiplied by 1016Forming an implantation region 6; as shown in (d) of fig. 1, the step 4) of removing the photoresist pattern 3 may adopt wet etching removal or oxygen plasma ashing; as shown in fig. 1 (e), step 5) heat-treats the He ion-implanted silicon oxycarbide layer; the heat treatment temperature is 400-600 ℃, and the heat treatment time is 0.5-1.5 hours; step 6) forming a silicon oxycarbide layer 7 with pores; 7) the silicon oxycarbide layer having voids is provided with a flat upper surface by chemical mechanical polishing. The dielectric constant of the ultra-low K dielectric layer formed after the step 7) is less than 2.5.
Second embodiment
Referring to fig. 1, a method of forming an ultra-low K dielectric layer. The method comprises the following steps: as shown in FIG. 1 (a), step 1) passes a chemical gas on a silicon substrate 1Forming a silicon oxycarbide layer 2 by a phase deposition method; the raw material gas of the silicon oxycarbide layer is CH4、O2And SiH4(ii) a In the silicon oxycarbide layer 2, the ratio of carbon element to oxygen element is 1: 1-2: 1; as shown in fig. 1 (b), step 2) depositing a photoresist on the silicon oxycarbide layer 2 to form a photoresist pattern 3 by photolithography or electron beam exposure; the pattern 3 for forming the photoresist is a regular lattice-shaped porous structure, and the thickness of the photoresist pattern is more than 1.5 mu m; the regular lattice-shaped hole structure has the lattice holes 4 with the size of 2-5 mu m; the area of the dot matrix hole accounts for 30% -50% of the total area of the photoresist pattern; step 3) H through the photoresist pattern, as shown in FIG. 1 (c)+And implantation of He ions 5; h+The energy of He ion 5 implantation is 20-150 KeV, and the implantation dosage is more than 5 multiplied by 1016Can be implanted with H simultaneously+And He ions, or H ions implanted first+Implanting ions followed by He ions, preferably implanting He ions first followed by H+Ions, forming an implanted region 6; as shown in (d) of fig. 1, the step 4) of removing the photoresist pattern 3 may adopt wet etching removal or oxygen plasma ashing; step 5) for the pass H as shown in FIG. 1 (e)+And He ion-implanted silicon oxycarbide layer is subjected to heat treatment; the heat treatment temperature is 400-600 ℃, and the heat treatment time is 0.5-1.5 hours; step 6) forming a silicon oxycarbide layer 7 with pores; 7) the silicon oxycarbide layer having voids is provided with a flat upper surface by chemical mechanical polishing. The dielectric constant of the ultra-low K dielectric layer formed after the step 7) is less than 2.3.
Third embodiment
An ultra-low K dielectric layer is formed according to the method of implementing the first or second embodiment and Cu is used as a metal layer to form the interconnect structure and dielectric layer of the chip or integrated circuit. Compared with the traditional Cu and silicon oxide system, the response speed is improved. Compared with the process for preparing the ultralow K dielectric layer by using the pore-foaming agent, the complex process for removing organic matters is reduced by using He and/or H+The ions are gathered to form pores, which can generate smaller and microporous structures, and the pore structure is controlledThe quantity of air holes is controlled by the size of the injected amount, the distribution of the holes can be controlled by using a regular lattice-shaped hole structure, the distribution of injected ions and the distribution of the holes are controlled, the dielectric constant of the material is further controlled, and the quality of the ultra-low K dielectric layer is improved.
Finally, it should be noted that: it should be understood that the above examples are only for clearly illustrating the present invention and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of the invention may be made without departing from the scope of the invention.
Claims (7)
1. A method of forming an ultra-low K dielectric layer, comprising the steps of: 1) forming a silicon oxycarbide layer on a silicon substrate by a chemical vapor deposition method; 2) depositing photoresist on the silicon oxycarbide layer to form a photoresist pattern through photoetching or electron beam exposure; 3) implanting He ions through the photoresist pattern; 4) removing the photoresist pattern; 5) carrying out heat treatment on the silicon oxycarbide layer subjected to He ion implantation; 6) forming a silicon oxycarbide layer having pores; 7) the silicon oxycarbide layer with pores is provided with a flat upper surface by chemical mechanical polishing;
wherein the raw material gas for forming the silicon oxycarbide layer in the step 1) is CH4、O2And SiH4(ii) a In the silicon oxycarbide layer, the ratio of carbon element to oxygen element is 1: 1-2: 1; the pattern of the photoresist formed in the step 2) is a regular lattice-shaped porous structure, and the thickness of the pattern is more than 1.5 mu m; the energy of He ion implantation in the step 3) is 20-150 KeV, and the implantation dosage is more than 5 multiplied by 1016(ii) a The temperature of the heat treatment in the step 5) is 400-; the dielectric constant of the ultra-low K dielectric layer formed after the step 7) is less than 2.5.
2. The method of forming an ultra-low K dielectric layer of claim 1, the regular lattice-like pore structure, the lattice pores being between 2-5 μ ι η in size.
3. The method of forming an ultra-low K dielectric layer as claimed in claim 1, said regular lattice-like hole structure, said lattice holes having an area of 30% -50% of said total area of the photoresist pattern.
4. A method of forming an ultra-low K dielectric layer, comprising the steps of: 1) forming a silicon oxycarbide layer on a silicon substrate by a chemical vapor deposition method; 2) depositing photoresist on the silicon oxycarbide layer to form a photoresist pattern through photoetching or electron beam exposure; 3) performing H through the photoresist pattern+And implantation of He ions; 4) removing the photoresist pattern; 5) carrying out heat treatment on the silicon oxycarbide layer subjected to He ion implantation; 6) forming a silicon oxycarbide layer having pores; 7) the silicon oxycarbide layer with pores is provided with a flat upper surface by chemical mechanical polishing;
wherein the raw material gas for forming the silicon oxycarbide layer in the step 1) is CH4、O2And SiH4(ii) a In the silicon oxycarbide layer, the ratio of carbon element to oxygen element is 1: 1-2: 1; the pattern of the photoresist formed in the step 2) is a regular lattice-shaped porous structure, and the thickness of the pattern is more than 1.5 mu m; h in said step 3)+The energy of He ion implantation is 20-150 KeV, and the implantation dosage is more than 5 multiplied by 1016(ii) a The temperature of the heat treatment in the step 5) is 400-; the dielectric constant of the ultra-low K dielectric layer formed after the step 7) is less than 2.3.
5. The method of claim 4, wherein He ions are implanted prior to H implantation+Ions.
6. The method of forming an ultra-low K dielectric layer of claim 4, the regular lattice-like pore structure, the lattice pores being between 2-5 μ ι η in size.
7. The method of forming an ultra-low K dielectric layer as claimed in claim 4, said regular lattice-like hole structure, said lattice holes having an area of 30% -50% of said total area of the photoresist pattern.
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| CN1437226A (en) * | 2002-02-05 | 2003-08-20 | 台湾积体电路制造股份有限公司 | Manufacture of carbon-containing dielectric layer |
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