CN108364617B - Pixel matrix display method and device - Google Patents
Pixel matrix display method and device Download PDFInfo
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
- G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
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Abstract
The invention discloses a pixel matrix display method, wherein a pixel matrix comprises a plurality of sub-pixels arranged in a matrix, and the method comprises the following steps: acquiring original pixel data; converting the original pixel data into first input data and second input data; loading a first driving voltage corresponding to the first input data or a second driving voltage corresponding to the second input data to the pixel matrix along a data line direction in one frame; wherein the aspect ratio of the sub-pixel is 3/4 ≤ a: b is less than or equal to 4/3. According to the pixel matrix display method provided by the embodiment of the invention, through the structural design, in a panel with high resolution requirements such as 8K4K, the coupling effect of the data line on the sub-pixel voltage is greatly reduced, the aperture opening ratio is improved, the penetration rate is improved, the pixel charging time is prolonged, the display effect is enhanced, and the user experience is improved.
Description
Technical Field
The invention belongs to the technical field of image display, and particularly relates to a pixel matrix display method and device.
Background
In recent years, with the gradual development of LCD (Liquid Crystal Display) technology, 4K2K high-resolution Liquid Crystal Display panels have become popular in the market, and at present, the development of Liquid Crystal Display panels with higher resolution, such as 8K4K, is also beginning to be emphasized by panel manufacturers.
However, as the resolution of the display panel is improved, the number of sub-pixels corresponding to the resolution needs to be increased, which increases the design difficulty of the display panel, and if the existing design principle is adopted, the designed display panel has the problems of low penetration rate, severe vertical crosstalk, insufficient charging in the process of charging the sub-pixels, and the like, and the display effect and the user viewing experience are affected.
Disclosure of Invention
In order to solve the above problems in the prior art, the present invention provides a pixel matrix display method and device.
An embodiment of the present invention provides a pixel matrix display method, where the pixel matrix includes a plurality of sub-pixels arranged in a matrix, including the following steps:
acquiring original pixel data;
converting the original pixel data into first input data and second input data;
loading a first driving voltage corresponding to the first input data or a second driving voltage corresponding to the second input data to the pixel matrix along a data line direction in one frame;
wherein the aspect ratio of the sub-pixel is 3/4 ≤ a: b is less than or equal to 4/3.
In one embodiment, the polarity of the data lines is column inversion, and each scan line carries the input of the scan signals of the sub-pixels on both sides thereof.
In a specific embodiment, the first driving voltage or the second driving voltage is alternately loaded to every three sub-pixels along the scanning line direction; and alternately loading the first driving voltage or the second driving voltage to each sub-pixel along the direction of the data line.
In a specific embodiment, the aspect ratio of the sub-pixels is 1.5: 2.
In a specific embodiment, the aspect ratio of the sub-pixels is 2: 1.5.
In a specific embodiment, an ITO common electrode material is used, wherein the opening area width S of the sub-pixel is X-2 × D-G, where X is the sub-pixel length, D is the data line width, and G is the interval between two data lines between adjacent sub-pixels.
An embodiment of the present invention further provides another pixel matrix display device, including a timing controller, a data driving unit, a scan driving unit, and a pixel matrix, where the pixel matrix includes a plurality of sub-pixels arranged in a matrix, and further including:
the time sequence controller is used for acquiring original pixel data and converting the original pixel data into first input data and second input data;
the scanning driving unit is used for loading scanning signals to the pixel matrix;
in one frame, the data driving unit is used for loading a first driving voltage corresponding to the first input data or a second driving voltage corresponding to the second input data to the pixel matrix along the direction of a data line;
wherein the aspect ratio of the sub-pixel is 3/4 ≤ a: b is less than or equal to 4/3.
In a specific embodiment, the data driving unit is further configured to control the data line polarity column inversion,
and the scanning driving unit is used for controlling the input of the scanning signals of the sub-pixels of each scanning line loaded on two sides of the scanning line.
In a specific embodiment, the data driving unit is further configured to alternately load the first driving voltage or the second driving voltage to every three sub-pixels along a scan line direction; and alternately loading the first driving voltage or the second driving voltage to each sub-pixel along the direction of the data line.
In a specific embodiment, the aspect ratio of the sub-pixels is 1.5: 2.
In a specific embodiment, the aspect ratio of the sub-pixels is 2: 1.5.
In one embodiment, the opening area width S of the sub-pixel is X-2 × D-G, where X is the sub-pixel length, D is the data line width, and G is the interval between two data lines of adjacent sub-pixels.
According to the pixel matrix display method provided by the embodiment of the invention, through the structural design, in a panel with high resolution requirements such as 8K4K, the coupling effect of the data line on the sub-pixel voltage is greatly reduced, the aperture opening ratio is improved, the penetration rate is improved, the pixel charging time is prolonged, the display effect is enhanced, and the user experience is improved.
Drawings
FIG. 1 is a flow chart of a pixel matrix display method according to an embodiment of the present invention;
FIG. 2 is a diagram of a conventional pixel design ratio and arrangement;
FIG. 3 is a schematic diagram of pixel design ratio and arrangement according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a pixel matrix architecture according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a pixel matrix driving method according to an embodiment of the invention;
FIG. 6 is a schematic diagram of a second pixel matrix architecture according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of a third pixel matrix architecture according to an embodiment of the present invention;
FIG. 8 is a schematic diagram illustrating a fourth pixel matrix architecture according to an embodiment of the present invention;
FIG. 9 is a graph illustrating the difference between the aperture ratio design of the present embodiment and the prior art design of the same product size at different resolution specifications;
FIG. 10 is a graph of the variation of aperture ratio design for the present embodiment compared to the same product size at different resolution specifications using the prior art design;
FIG. 11 is a graph of the effect of a prior art common electrode design on aperture ratio at different resolutions;
fig. 12 is a schematic view of another pixel matrix display device according to an embodiment of the invention.
Detailed Description
The present invention will be described in further detail with reference to specific embodiments. It should be understood that the scope of the above-described subject matter is not limited to the following examples, and any techniques implemented based on the disclosure of the present invention are within the scope of the present invention.
Example one
Referring to fig. 1, fig. 1 is a flowchart of a pixel matrix display method according to an embodiment of the present invention, which can be applied to display of display screens of various electronic devices, where the pixel matrix includes a plurality of sub-pixels arranged in a matrix, and the method includes the following steps:
acquiring original pixel data;
converting the original pixel data into first input data and second input data;
loading a first driving voltage corresponding to the first input data or a second driving voltage corresponding to the second input data to the pixel matrix along a data line direction in one frame;
wherein the aspect ratio of the sub-pixel is 3/4 ≤ a: b is less than or equal to 4/3.
The display method of the invention can be applied to displays with various resolution requirements, but is mainly applied to high-resolution displays, such as 4K, 8K and other high-resolution displays. For example, the resolution requirement of 8K4K is 7680 × 4320, that is, the resolution requirement in the X direction is 7680 and the resolution requirement in the Y direction is 4320.
Taking a conventional RGB pixel matrix as an example, please refer to fig. 2, where fig. 2 is a schematic diagram of a conventional pixel design ratio and arrangement, an aspect ratio of one sub-pixel is 1:3, and a complete pixel is composed of three sequentially arranged RGB sub-pixels, so that if a requirement of 7680 resolution is met in an X direction, the required number of pixels is 7680 × 3, and 4320 × 1 in a Y direction.
Referring to fig. 3, fig. 3 is a schematic diagram of a pixel design ratio and an arrangement of the pixel matrix of the present embodiment, and the present embodiment improves a display effect by increasing the length of the sub-pixels and correspondingly decreasing the width of the sub-pixels, in the present embodiment, an aspect ratio of one sub-pixel is 3:4, specifically, if a conventional sub-pixel has a length and a width of 3a, the sub-pixel of the present embodiment has a length of 1.5a and a width of 2 a.
Since the size of the sub-pixels is changed in the scheme of this embodiment, the required number of pixels is 7680 × 2 in the X direction and 4320 × 1.5 in the Y direction to achieve 7680 resolution. In order to implement the present embodiment better, the driving method and the driving structure of the pixel matrix need to be changed correspondingly. Therefore, in this embodiment, a pixel sharing design is used to achieve the same resolution, and under the same 8K4K resolution, the number of pixels in the X direction is 7680X2, the number of pixels in the Y direction is 4320X 1.5, and the design of sharing 3 sub-pixels with 2 pixels in the Y direction completes the solution of this embodiment.
Specifically, one data line is connected to both sides of each column of sub-pixels, and one scan line is connected between every two rows of sub-pixels, for example, if R11, G11, B11 are adjacent sub-pixels in one row, and R11 is the starting pixel; r11, R21, G31, G41 are adjacent subpixels in a column, and R11 is the starting pixel; then, one data line D1 is arranged on the left side of R11, two data lines D2 and D3 are arranged between R11 and G11, two data lines D4 and D5 are arranged between G11 and B11, and so on, one scanning line G1 is arranged on the upper side of R11, no scanning line exists between R11 and R21, one scanning line G2 is arranged between R21 and G31, no scanning line exists between G31 and G41, and so on, and vice versa. In terms of architecture, the polarity of the data lines is column inversion, because two sides of each column of sub-pixels are respectively connected with one data line, and the corresponding data lines are respectively loaded with the odd-numbered rows of sub-pixels and the even-numbered rows of sub-pixels in one column of sub-pixels, the polarity of the sub-pixels in any column can be ensured to be alternately inverted, and in addition, because one scanning line is connected between every two rows of sub-pixels, each scanning line is loaded with the input of the scanning signals of the sub-pixels on two sides.
To better explain the driving architecture and driving method of the present embodiment, please refer to fig. 4, fig. 4 is a schematic diagram of a pixel matrix architecture provided by the present embodiment, where R11-B12 includes 6 adjacent sub-pixels in a certain row, and R11-R81 include 8 adjacent sub-pixels in a certain column, where R represents a red sub-pixel, G represents a green sub-pixel, and B represents a blue sub-pixel, and a minimum pixel unit in the present embodiment includes 3 × 6 ═ 18 sub-pixels, for example, 18 sub-pixels of R11, G11, B11, R21, G21, B21, G31, B31, R31, G41, B41, R41, B51, R51, G51, B61, R61, and G61 constitute a pixel unit, so as to display a certain complete pixel in an image.
The data line D1 is connected to the sub-pixel R11, the sub-pixel G31, the sub-pixel B51 and the sub-pixel R51, the data line D51 is connected to the sub-pixel R51, the sub-pixel G51, the sub-pixel B51 and the sub-pixel R51, the data line D51 is connected to the sub-pixel G51, the sub-pixel B51, the sub-pixel R51 and the sub-pixel G51, the data line D51 is connected to the sub-pixel B51, the sub-pixel R51, the sub-pixel G51 and the sub-pixel B51, and the data line D51 is connected to the sub-pixel B51, the sub-pixel R51 and the data line D51 are analogized in turn; the scanning line G1 connects the sub-pixel R11, the sub-pixel G11 and the sub-pixel B11, the scanning line G2 connects the sub-pixel R21, the sub-pixel G21, the sub-pixel B21, the sub-pixel G31, the sub-pixel B31 and the sub-pixel R31, the scanning line G3 connects the sub-pixel G41, the sub-pixel B41, the sub-pixel R41, the sub-pixel B51, the sub-pixel R51 and the sub-pixel G51, the scanning line G4 connects the sub-pixel B61, the sub-pixel R61, the sub-pixel G61, the sub-pixel R71, the sub-pixel G71, the sub-pixel B71, the scanning lines G5 and G6 …, and so on.
In the driving sequence, at the first time of a certain frame, the scan line G1 is turned on, and the data line D1, the data line D3 and the data line D5 charge positive voltages to the sub-pixel R11, the sub-pixel G11 and the sub-pixel B11, respectively.
At the second time of the frame, the scan line G2 is turned on, the data line D1, the data line D3 and the data line D5 charge positive voltages to the sub-pixel G31, the sub-pixel B31 and the sub-pixel R31 respectively, and the data line D2, the data line D4 and the data line D6 charge negative voltages to the sub-pixel R21, the sub-pixel G21 and the sub-pixel B21 respectively;
at the third time of the frame, the scan line G3 is turned on, the data line D1, the data line D3 and the data line D5 charge positive voltages to the sub-pixel B51, the sub-pixel R51 and the sub-pixel G51 respectively, and the data line D2, the data line D4 and the data line D6 charge negative voltages to the sub-pixel G41, the sub-pixel B41 and the sub-pixel R41 respectively;
at the fourth time of the frame, the scan line G4 is turned on, the data line D1, the data line D3 and the data line D5 charge positive voltages to the sub-pixel R71, the sub-pixel G71 and the sub-pixel B71 respectively, and the data line D2, the data line D4 and the data line D6 charge negative voltages to the sub-pixel B61, the sub-pixel R61 and the sub-pixel G61 respectively;
taking 8K4K as an example, the number of scan lines is 3241, at time 5 to time 3240 of the frame, scan lines G5-G3240 are correspondingly turned on, and sub-pixels are charged according to the charging principle, and when the last scan line G3241 is turned on, the data line D2, the data line D4 and the data line D6 charge negative voltages to the sub-pixel B64801, the sub-pixel R64801 and the sub-pixel G64801 respectively; after one frame is completed, the polarity of the data line is reversed in the next frame, and the sub-pixel charging in the next frame is continued according to the above principle.
In the conventional design, the number of pixels in the Y direction is 4320 × 1 — 4320, the number of scan lines corresponding to the number of pixels in the Y direction is 4320, and the charging time of each sub-pixel is 3.86us, taking the scan frequency as 60Hz as an example.
In the design of this embodiment, please refer to table 1, the number of pixels in the Y direction is 4320 × 1.5 — 6480, and according to the architecture of this embodiment, the number of scan lines is 6480/2 — 3240, since the total scan time of one frame is fixed, 4320 times are required in the prior art for the same scan time, whereas the scheme of this embodiment only needs 3240 times, and the charging time of each corresponding sub-pixel is correspondingly prolonged to 5.14us, so that the charging time of a single pixel is increased, the display effect is enhanced, and the user experience is improved.
TABLE 1
According to the pixel matrix display method provided by the embodiment of the invention, through the structural design, in a panel with high resolution requirements such as 8K4K, the coupling effect of the data line on the sub-pixel voltage is greatly reduced, the aperture opening ratio is improved, the penetration rate is improved, the pixel charging time is prolonged, the display effect is enhanced, and the user experience is improved.
Example two
In a specific embodiment, this embodiment includes the contents of embodiment one, and further includes alternately applying the first driving voltage or the second driving voltage to every three sub-pixels along a scanning line direction; and alternately loading the first driving voltage or the second driving voltage to each sub-pixel along the direction of the data line.
In a specific example, the first driving voltage is considered as a high gray level voltage (voltage level of H), the second gray level voltage is considered as a low gray level voltage (voltage level of L), and correspondingly, the voltage level inputted to the sub-pixel is determined by gray levels.
For example, if the original pixel value at a position is 128 gray, and the position should output a high gray voltage, i.e. H, according to the above rule of the present invention, the calculation is performed, in this example, H of 128 is 138, then 138 gray is output, the data driving unit receives 138 gray, and according to the predetermined conversion rule, the voltage corresponding to 138 gray is 10V, and finally, a voltage signal of 10V is output to the a position. Generally, the high-low gray scale adjustment range is determined according to the material of the liquid crystal or the like.
For example, if the original pixel value at a certain position is 128 gray, and the position is supposed to output a low gray, i.e. L, according to the above rule of the present invention, and it is calculated that L of 128 is 118 in this example, 118 gray is output to the B position, the data driving unit receives 118 gray, and according to the predetermined conversion rule, the voltage corresponding to 118 gray is 8V, and finally the voltage signal of 8V is output to the B position.
Referring to fig. 5, fig. 5 is a schematic view of another pixel matrix driving scheme according to the present embodiment, wherein a driving rule according to the first embodiment is referenced for loading potentials and polarities, where P represents that a voltage applied to the sub-pixel is a positive voltage, N represents that a voltage applied to the sub-pixel is a negative voltage, H represents that a voltage gray scale applied to the sub-pixel is a high gray scale, and L represents that a voltage gray scale applied to the sub-pixel is a low gray scale.
In the driving sequence, at the first time of a certain frame, the scan line G1 is turned on, the data line D1, the data line D3 and the data line D5 charge the positive polarity high gray scale voltage (HP) to the sub-pixel R11, the sub-pixel G11 and the sub-pixel B11, respectively, and the data line D7, the data line D9 and the data line D11 charge the positive polarity low voltage low gray scale voltage (LP) to the sub-pixel R12, the sub-pixel G12 and the sub-pixel B12, respectively.
At the second time of the frame, the scan line G2 is turned on, the data line D1, the data line D3 and the data line D5 charge the positive polarity voltage high grayscale voltage (HP) to the sub-pixel G31, the sub-pixel B31 and the sub-pixel R31, respectively, and the data line D7, the data line D9 and the data line D11 charge the positive polarity voltage low grayscale voltage (LP) to the sub-pixel G32, the sub-pixel B32 and the sub-pixel R32, respectively; the data line D2, the data line D4 and the data line D6 respectively charge negative low-gray-scale voltage (LN) to the sub-pixel R21, the sub-pixel G21 and the sub-pixel B21, and the data line D8, the data line D10 and the data line D12 respectively charge negative low-high-scale voltage (HN) to the sub-pixel R22, the sub-pixel G22 and the sub-pixel B22;
at the third time of the frame, the scan line G3 is turned on, the data line D1, the data line D3 and the data line D5 charge the positive polarity high gray scale voltage (HP) to the sub-pixel B51, the sub-pixel R51 and the sub-pixel G51, the data line D7, the data line D9 and the data line D11 charge the positive polarity low gray scale voltage (LP) to the sub-pixel B52, the sub-pixel R52 and the sub-pixel G52, the data line D2, the data line D4 and the data line D6 charge the negative polarity low voltage (LN) to the sub-pixel G41, the sub-pixel B41 and the sub-pixel R41, and the data line D8, the data line D10 and the data line D12 charge the negative polarity high voltage (HN 42 to the sub-pixel G42, the sub-pixel B42 and the sub-pixel R3634;
at the fourth time of the frame, the scan line G4 is turned on, the data line D1, the data line D3 and the data line D5 respectively charge the positive polarity high gray scale voltage (HP) to the sub-pixel R71, the sub-pixel G71 and the sub-pixel B71, the data line D7, the data line D9 and the data line D11 respectively charge the positive polarity low gray scale voltage (LP) to the sub-pixel R72, the sub-pixel G72 and the sub-pixel B72, the data line D2, the data line D4 and the data line D6 respectively charge the negative polarity low gray scale voltage (LN) to the sub-pixel B61, the sub-pixel R61 and the sub-pixel G61, and the data line D8, the data line D10 and the data line D12 respectively charge the negative polarity high gray scale voltage (HN) to the sub-pixel B62, the sub-pixel R62 and the sub-pixel G62; and analogizing in sequence, after one frame is finished, carrying out polarity inversion on a data line in the next frame, and continuing to charge the sub-pixels of the next frame according to the principle. The display effect of 8-Domain is achieved.
Based on the architecture and the driving method, please refer to fig. 6-8, and fig. 6-8 also provide another three architecture methods, and the specific driving method thereof can be driven with reference to the embodiment and will not be described herein again.
According to the pixel matrix display method provided by the embodiment of the invention, through the structural design, in a panel with high resolution requirements such as 8K4K, the coupling effect of the data line on the sub-pixel voltage is greatly reduced, the aperture opening ratio is improved, the penetration rate is improved, the pixel charging time is prolonged, the display effect is enhanced, and the user experience is improved.
EXAMPLE III
In a specific embodiment, the aspect ratio of the sub-pixels is 1.5: 2. The design can reduce the coupling effect of the data line to the pixel voltage and improve the aperture opening ratio design of the pixel.
Compared with the conventional design, the solution of the present embodiment is beneficial to the increase of the aperture opening ratio, please refer to fig. 9, where fig. 9 is a graph comparing the difference between the conventional design (Normal) and the aperture opening ratio design of the present embodiment under different resolution specifications for the same product size, under the same design condition, the aperture opening ratio of the present embodiment is about 2-5% higher than that of the conventional design, and when the resolution is higher, the increase of the aperture opening ratio is larger.
In a specific embodiment, the aspect ratio of the sub-pixels is 2: 1.5. The design can reduce the coupling effect of the data line to the pixel voltage and improve the aperture opening ratio design of the pixel. Compared with the conventional design, the solution of the present embodiment is beneficial to the improvement of the aperture opening ratio, please refer to fig. 10, where fig. 10 is a graph comparing the difference between the conventional design (Normal) and the aperture opening ratio design of the present embodiment under different resolution specifications for the same product size, under the same design condition, the aperture opening ratio of the present embodiment is about 1.5-6.5% higher than that of the conventional design, and when the resolution is higher, the improvement of the aperture opening ratio is larger.
The present embodiment improves the display effect by increasing the length of the sub-pixel and correspondingly decreasing the width of the sub-pixel, in the above example, the aspect ratio of one sub-pixel is 4:3, specifically, if the conventional sub-pixel has a length and a width of 3a, the sub-pixel of the present embodiment has a length of 2a and a width of 1.5 a.
Since the size of the sub-pixels is changed in the scheme of this embodiment, the required number of pixels is 7680 × 1.5 and 4320 × 2 in the Y direction to achieve 7680 resolution in the X direction. In order to implement the present embodiment better, the driving method and the driving structure of the pixel matrix need to be changed correspondingly. Therefore, the present embodiment uses pixel sharing to achieve the design with the same resolution, and under the same 8K4K resolution, the number of pixels in the X direction is 7680X1.5, the number of pixels in the Y direction is 4320X 2, and the design of sharing 3 sub-pixels with 2 pixels in the Y direction completes the present embodiment. In the conventional design, the number of pixels in the Y direction is 4320 × 1 — 4320, the number of scan lines corresponding to the number of pixels in the Y direction is 4320, and the charging time of each sub-pixel is 3.86us, taking the scan frequency as 60Hz as an example.
In the design of the present embodiment, referring to table 2, the number of pixels in the Y direction is 4320 × 2 — 8640, and according to the architecture of the present embodiment, the number of scan lines is 8640/2 — 4320, since the total scan time of one frame is fixed, the same scan time needs 4320 times in the prior art, the number of pixels in the Y direction is doubled, but the Y direction two pixels share one scan line, so the number of pixels in the Y direction is increased, but the charging time of the pixels can also be maintained as the same as the conventional design to enhance the display effect, however, for the X direction, the number of pixels in the X direction is reduced by 50% compared to the prior art, thereby improving the user experience.
TABLE 2
According to the pixel matrix display method provided by the embodiment of the invention, through the structural design, in a panel with high resolution requirements such as 8K4K, the coupling effect of the data line on the sub-pixel voltage is greatly reduced, the aperture opening ratio is improved, the penetration rate is improved, the pixel charging time is prolonged, the display effect is enhanced, and the user experience is improved.
Example four
This embodiment includes the disclosure of embodiments 1-3, and further includes using an ITO common electrode material, wherein the opening area width S of the sub-pixel is X-2 × D-G, where X is the sub-pixel length, D is the data line width, and G is the interval between two data lines between adjacent sub-pixels.
In the conventional 1D design, in order to reduce the coupling effect of the data line to the pixel electrode, a common electrode is designed between the data line and the pixel electrode to improve the above problem, but the aperture ratio of the pixel is reduced by using this design, and the reduction of the aperture ratio is more obvious as the resolution is higher and the pixel size is smaller.
FIG. 11 is a graph that simulates the effect of a certain size product on pixel aperture ratio at FHD, UD, and 8K4K resolution specifications using the common electrode design described above. Under the FHD resolution specification, the ratio of common electrode design space to the aperture opening ratio is only about 7%; however, the ratio of the common electrode design space to the aperture ratio has increased to 16% by the UD resolution specification, and has increased to 41% even by the 8K4K resolution specification.
The embodiment changes the traditional design mode of using metal as the common electrode into the design mode of using ITO as the common electrode, and does not have the aperture ratio loss caused by the design mode of the common electrode in the traditional design.
The opening area width in the X direction is theoretically the opening area width X-d (um) in consideration of only the design width of the data line.
Since the design of the present embodiment using ITO to cover the data lines causes some signal distortion to the data lines, the present embodiment is combined with a COA (Color-on Array) process to reduce the load of the data lines.
In the COA + ITO process of this embodiment, there are 8 layers of TFT, the first layer is a common electrode layer, the second layer is a semiconductor protection layer, the third layer is a source electrode, the fourth and fifth layers are protection layers for a coating process, the sixth layer is an ITO common electrode, the seventh layer is a protection layer, and the eighth layer is an ITO pixel electrode.
For the sub-pixel matching with the ratio of 1.5:2, the pixel electrode can directly cover the data line by matching with the COA (color on array) process, so the original design of the metal common electrode can be removed, the aperture ratio can be further improved, and the problem of data line distortion can be improved by matching with the COA process.
The width of the opening area in the X direction only takes into consideration the design width and the pitch of the data lines. And the opening area width S of the sub-pixel is X-2 XD-G, wherein X is the length of the sub-pixel, D is the width of the data line, and G is the interval between two data lines of adjacent sub-pixels.
Compared with the traditional design with the COA process, the embodiment can obtain higher aperture opening ratio improvement, and the pixel aperture opening ratio improvement amplitude is higher when the resolution is higher. When the product resolution is FHD, the aperture opening ratio of the proposal design is improved by about 7 percent compared with the traditional design; when the product has UD resolution, the aperture opening ratio of the proposal design can be improved by about 18.4 percent compared with the traditional design; when the resolution specification of 8K4K is reached, the lifting amplitude can reach 45.3%.
For the sub-pixel matching with the ratio of 2:1.5, the pixel electrode can directly cover the data line by matching with the COA (color on array) process, so the original design of the metal common electrode can be removed, the aperture ratio can be further improved, and the problem of data line distortion can be improved by matching with the COA process.
The width of the opening area in the X direction only takes into consideration the design width and the pitch of the data lines. And the opening area width S of the sub-pixel is X-2 XD-G, wherein X is the length of the sub-pixel, D is the width of the data line, and G is the interval between two data lines of adjacent sub-pixels.
Compared with the traditional design with the COA process, the embodiment can obtain higher aperture opening ratio improvement, and the pixel aperture opening ratio improvement amplitude is higher when the resolution is higher. When the product resolution is FHD, the aperture opening ratio of the proposal design is improved by about 6 percent compared with the traditional design; when the product has UD resolution, the aperture opening ratio of the proposal design can be improved by about 13.7 percent compared with the traditional design; when the resolution specification of 8K4K is reached, the lifting amplitude can reach 37%.
EXAMPLE five
Referring to fig. 12, fig. 12 is a schematic diagram of another pixel matrix display device according to an embodiment of the present invention, which includes a timing controller 81, a data driving unit 82, a scan driving unit 83, and a pixel matrix 84, where the pixel matrix 84 includes a plurality of sub-pixels 85 arranged in a matrix, and further includes:
the timing controller 81 is configured to obtain original pixel data and convert the original pixel data into first input data and second input data;
the scan driving unit 82 is used for loading scan signals to the pixel matrix 84;
and in one frame, the data driving unit 82 is configured to load a first driving voltage corresponding to the first input data or a second driving voltage corresponding to the second input data to the pixel matrix 84 along a data line direction;
wherein the aspect ratio of the sub-pixel is 3/4 ≤ a: b is less than or equal to 4/3.
In one embodiment, the data driving unit 82 is further configured to control the data line polarity column inversion, and the scan driving unit 83 is configured to control the input of the scan signal of the sub-pixel 85 on each scan line.
In a specific embodiment, the data driving unit 82 is further configured to alternately apply the first driving voltage or the second driving voltage to every three sub-pixels along a scan line direction; in the data line direction, the first driving voltage or the second driving voltage is alternately applied to each sub-pixel 85.
In one embodiment, the sub-pixel 85 has an aspect ratio of 1.5: 2.
In one embodiment, the sub-pixel 85 has an aspect ratio of 2: 1.5.
In one embodiment, the opening area width S of the sub-pixel 85 is X-2 × D-G, where X is the sub-pixel length, D is the data line width, and G is the interval between two adjacent sub-pixels 85.
According to the pixel matrix display method provided by the embodiment of the invention, through the structural design, in a panel with high resolution requirements such as 8K4K, the coupling effect of the data line on the sub-pixel voltage is greatly reduced, the aperture opening ratio is improved, the penetration rate is improved, the pixel charging time is prolonged, the display effect is enhanced, and the user experience is improved.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (8)
1. A pixel matrix display method, said pixel matrix comprising a plurality of sub-pixels arranged in a matrix, comprising the steps of:
acquiring original pixel data;
converting the original pixel data into first input data and second input data;
loading a first driving voltage corresponding to the first input data or a second driving voltage corresponding to the second input data to the pixel matrix along a data line direction in one frame;
the polarity of the data lines is column inversion, and each scanning line carries the input of scanning signals of the sub-pixels at the two sides of the scanning line;
alternately loading the first driving voltage or the second driving voltage to every three sub-pixels along the direction of a scanning line; alternately loading the first driving voltage or the second driving voltage to each sub-pixel along the direction of a data line; wherein the aspect ratio of the sub-pixel is 3/4 ≤ a: b is less than or equal to 4/3.
2. The pixel matrix display method of claim 1, wherein the aspect ratio of the sub-pixels is 1.5: 2.
3. The pixel matrix display method of claim 1, wherein the aspect ratio of the sub-pixels is 2: 1.5.
4. The pixel matrix display method according to claim 1, wherein an ITO common electrode material is used, wherein the opening area width of the sub-pixel S = X-2X D-G, where X is the sub-pixel length, D is the data line width, and G is the two data line spacing between adjacent sub-pixels.
5. A pixel matrix display device comprises a time schedule controller, a data driving unit, a scanning driving unit and a pixel matrix, wherein the pixel matrix comprises a plurality of sub-pixels arranged in a matrix,
the time sequence controller is used for acquiring original pixel data and converting the original pixel data into first input data and second input data;
the scanning driving unit is used for loading scanning signals to the pixel matrix;
in one frame, the data driving unit is used for loading a first driving voltage corresponding to the first input data or a second driving voltage corresponding to the second input data to the pixel matrix along the direction of a data line;
wherein the aspect ratio of the sub-pixel is 3/4 ≤ a: b is less than or equal to 4/3;
the data driving unit is further configured to control the data line polarity column inversion,
the scanning driving unit is used for controlling the input of scanning signals of the sub-pixels of each scanning line loaded with the scanning signals of the sub-pixels on two sides of the scanning line;
the data driving unit is further used for loading the first driving voltage or the second driving voltage to every three sub-pixels along the direction of a scanning line alternately; and alternately loading the first driving voltage or the second driving voltage to each sub-pixel along the direction of the data line.
6. A pixel matrix display device according to claim 5, wherein the sub-pixels have an aspect ratio of 1.5: 2.
7. A pixel matrix display device according to claim 5, wherein the sub-pixels have an aspect ratio of 2: 1.5.
8. The device of claim 5, wherein the opening area width of the sub-pixel is S = X-2 XD-G, where X is the sub-pixel length, D is the data line width, and G is the two data line spacing between adjacent sub-pixels.
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| KR102659276B1 (en) * | 2018-09-04 | 2024-04-19 | 삼성디스플레이 주식회사 | Liquid crystal display device |
| US10747070B2 (en) * | 2018-09-04 | 2020-08-18 | Samsung Display Co., Ltd. | Liquid crystal display device |
| CN111292692B (en) * | 2018-12-06 | 2022-07-29 | 咸阳彩虹光电科技有限公司 | Pixel matrix driving device, pixel matrix driving method and display thereof |
| CN113380204B (en) * | 2020-03-10 | 2022-08-12 | 咸阳彩虹光电科技有限公司 | Method and device for improving visual angle color cast and display panel |
| CN112180630B (en) * | 2020-10-16 | 2021-12-03 | Tcl华星光电技术有限公司 | Display panel |
| CN114299865B (en) * | 2021-12-31 | 2023-06-16 | 湖北长江新型显示产业创新中心有限公司 | Display panel and display device |
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| KR101441395B1 (en) * | 2012-07-05 | 2014-09-17 | 엘지디스플레이 주식회사 | Liquid crystal display device and driving method the same |
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