CN110599968A - Low color cast pixel matrix display method and device - Google Patents
Low color cast pixel matrix display method and device Download PDFInfo
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- CN110599968A CN110599968A CN201810606052.1A CN201810606052A CN110599968A CN 110599968 A CN110599968 A CN 110599968A CN 201810606052 A CN201810606052 A CN 201810606052A CN 110599968 A CN110599968 A CN 110599968A
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
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Abstract
The invention discloses a display method of a low color cast pixel matrix, wherein the pixel matrix comprises a plurality of pixel units which are arranged in a preset rule, and the method comprises the following steps: acquiring an original signal input time sequence; converting the original signal input time sequence into an arranged signal input time sequence according to the pixel units arranged according to the preset rule; generating a first gray scale driving voltage and a second gray scale driving voltage according to the arranged signal input timing sequence; and in one frame, loading the first gray scale driving voltage or the second gray scale driving voltage to the pixel matrix along the direction of a data line. According to the pixel matrix display method provided by the embodiment of the invention, through the architecture design, the penetration rate is enhanced, the pixel charging time is prolonged, the display effect is enhanced, and the user experience is improved in the UD panel design.
Description
Technical Field
The invention belongs to the technical field of image display, and particularly relates to a low-color-cast pixel matrix display method and device.
Background
In recent years, as LCD (Liquid Crystal Display) technology has been developed, UD (4K2K) high-resolution Liquid Crystal Display panels have become popular in the market, and a 4-Domain low color shift design is often used for UD panels.
However, in the conventional 4-domain VA technology, the VA-mode lcd panel is configured to easily generate color shift (color washout) at a large viewing angle as the viewing angle is adjusted, so that the displayed image is easily distorted, and particularly, the appearance of the skin color of a person tends to be bluish or bright white, and referring to fig. 1, the color shift is more serious as the viewing angle is increased (0 °, 45 °, and 60 °), and the arrangement of the 4-domain is affected by the polarity of the sub-pixels, thereby causing the problems of crosstalk and bright and dark lines, and the display effect is poor.
Disclosure of Invention
In order to solve the above problems in the prior art, the present invention provides a method and an apparatus for displaying a low color shift pixel matrix.
One embodiment of the present invention provides a method for displaying a low color shift pixel matrix, wherein the pixel matrix comprises a plurality of pixel units arranged in a predetermined rule, and the method comprises the following steps:
acquiring an original signal input time sequence;
converting the original signal input time sequence into an arranged signal input time sequence according to the pixel units arranged according to the preset rule;
generating a first gray scale driving voltage and a second gray scale driving voltage according to the arranged signal input timing sequence;
and in one frame, loading the first gray scale driving voltage or the second gray scale driving voltage to the pixel matrix along the direction of a data line.
In one embodiment, the pixel units arranged in a predetermined regular manner include:
a first sub-pixel having a first color filter;
a second sub-pixel having a second color filter adjacent to the first sub-pixel in a first direction;
a third sub-pixel having a third color filter adjacent to the second sub-pixel in the first direction;
a fourth sub-pixel having a third color filter adjacent to the first sub-pixel in the second direction;
a fifth sub-pixel having a first color filter and adjacent to the fourth sub-pixel in a first direction;
a sixth sub-pixel having a second color filter adjacent to the fifth sub-pixel in the first direction;
a seventh sub-pixel having a second color filter adjacent to the fourth sub-pixel in a second direction;
an eighth subpixel having a third color filter adjacent to the seventh subpixel in the first direction;
and the ninth sub-pixel is provided with a first color filter and is adjacent to the eighth sub-pixel in the first direction.
In one embodiment, the aspect ratio of the sub-pixels is 1.5: 2.
In one embodiment, the generating the first and second grayscale driving voltages according to the arranged signal input timings includes:
obtaining first gray scale data and second gray scale data according to the arranged signal input time sequence;
and generating a first gray scale driving voltage corresponding to the first gray scale data and a second gray scale driving voltage corresponding to the second gray scale data according to the first gray scale data and the second gray scale data.
In one embodiment, obtaining the first gray scale data and the second gray scale data according to the signal input timing of the arrangement includes:
and obtaining an original pixel value of each pixel position according to the arranged signal input time sequence, and converting the original pixel value of each pixel position into the first gray scale data or the second gray scale data according to a preset conversion mode.
An embodiment of the present invention further provides a low color shift pixel matrix display device, including a timing controller, a data driving unit, a scan driving unit, and a pixel matrix, where the pixel matrix includes a plurality of pixel units arranged in a predetermined rule, and further includes:
the time sequence controller is used for acquiring an original signal input time sequence, converting the original signal input time sequence into a arranged signal input time sequence according to the pixel units arranged according to the preset rule, obtaining first gray scale data and second gray scale data according to the arranged signal input time sequence, and outputting the first gray scale data and the second gray scale data to the data driving unit;
the data driving unit is used for generating a first gray scale driving voltage according to the first gray scale data and generating a second gray scale driving voltage according to the second gray scale data;
and loading the first gray scale driving voltage or the second gray scale driving voltage to the pixel matrix along the direction of a data line in one frame.
In one embodiment, the pixel units arranged in a predetermined regular manner include:
a first sub-pixel having a first color filter;
a second sub-pixel having a second color filter adjacent to the first sub-pixel in a first direction;
a third sub-pixel having a third color filter adjacent to the second sub-pixel in the first direction;
a fourth sub-pixel having a third color filter adjacent to the first sub-pixel in the second direction;
a fifth sub-pixel having a first color filter and adjacent to the fourth sub-pixel in a first direction;
a sixth sub-pixel having a second color filter adjacent to the fifth sub-pixel in the first direction;
a seventh sub-pixel having a second color filter adjacent to the fourth sub-pixel in a second direction;
an eighth subpixel having a third color filter adjacent to the seventh subpixel in the first direction;
and the ninth sub-pixel is provided with a first color filter and is adjacent to the eighth sub-pixel in the first direction.
In one embodiment, the aspect ratio of the sub-pixels is 1.5: 2.
In one embodiment, the timing controller is specifically configured to obtain an original pixel value of each pixel position according to the arranged signal input timing, and convert the original pixel value of each pixel position into the first grayscale data or the second grayscale data according to a predetermined conversion manner.
According to the low color cast pixel matrix display method provided by the embodiment of the invention, through the architecture design, the penetration rate is enhanced, the pixel charging time is prolonged, the display effect is enhanced, and the user experience is improved in the UD panel design.
Drawings
FIG. 1 is a flowchart of a method for displaying a low color shift pixel matrix according to an embodiment of the present invention;
FIG. 2 is a diagram of a conventional pixel design ratio and arrangement;
FIG. 3 is a schematic diagram of a low color shift pixel matrix according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of gray scale collocation of a low color shift pixel matrix according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a low color shift pixel matrix display device according to an embodiment of the invention.
Detailed Description
The present invention will be described in further detail with reference to specific embodiments. It should be understood that the scope of the above-described subject matter is not limited to the following examples, and any techniques implemented based on the disclosure of the present invention are within the scope of the present invention.
Example one
Referring to fig. 1, fig. 1 is a flow chart of a low color shift pixel matrix display method according to an embodiment of the present invention, which is applied to display driving of display panels of different display devices,
the pixel matrix comprises a plurality of pixel units which are arranged in a preset rule, and the method comprises the following steps:
acquiring an original signal input time sequence;
converting the original signal input time sequence into an arranged signal input time sequence according to the pixel units arranged according to the preset rule;
generating a first gray scale driving voltage and a second gray scale driving voltage according to the arranged signal input timing sequence;
and in one frame, loading the first gray scale driving voltage or the second gray scale driving voltage to the pixel matrix along the direction of a data line.
In a specific embodiment, the pixel units arranged in a predetermined regular manner include:
a first sub-pixel having a first color filter;
a second sub-pixel having a second color filter adjacent to the first sub-pixel in a first direction;
a third sub-pixel having a third color filter adjacent to the second sub-pixel in the first direction;
a fourth sub-pixel having a third color filter adjacent to the first sub-pixel in the second direction;
a fifth sub-pixel having a first color filter and adjacent to the fourth sub-pixel in a first direction;
a sixth sub-pixel having a second color filter adjacent to the fifth sub-pixel in the first direction;
a seventh sub-pixel having a second color filter adjacent to the fourth sub-pixel in a second direction;
an eighth subpixel having a third color filter adjacent to the seventh subpixel in the first direction;
and the ninth sub-pixel is provided with a first color filter and is adjacent to the eighth sub-pixel in the first direction.
The display method of the invention can be applied to displays with various resolution requirements, but is mainly applied to high-resolution display. For example, the resolution requirement of 4K2K is 3840 × 2160, i.e., the resolution requirement in the X direction is 3840 and the resolution requirement in the Y direction is 2160.
Taking a conventional RGB pixel matrix as an example, please refer to fig. 2, fig. 2 is a schematic diagram of a conventional pixel design ratio and arrangement, an aspect ratio of one sub-pixel is 1:3, and a complete pixel is composed of three RGB sub-pixels arranged in sequence, the pixels are sequentially a red sub-pixel, a green sub-pixel, and a blue sub-pixel along a scan line direction, and are sequentially cycled, so that if a 3840 resolution requirement is reached in an X direction, the required number of pixels is 3840 × 3, and is 2160 × 1 in a Y direction.
For the pixel matrix of this embodiment, a complete RGB pixel is composed of three sub-pixels arranged regularly, for example, three R, G, B transverse sub-pixels, three B, R, G transverse sub-pixels, or three G, B, R transverse sub-pixels, and a complete pixel unit is a matrix formed by six sub-pixels along the data line direction and three sub-pixels along the scan line direction, and constitutes a 6 × 3 pixel unit. For example, the first row of 6 sub-pixels are RGBRGB, the second row of 6 sub-pixels are BRGBRG, and the third row of 6 sub-pixels are GBRGBR, wherein the first direction is along the data line direction and the second direction is along the scan line direction.
Specifically, an example is described, in which the physical position relationship is expressed in the upper, lower, left and right directions, the direction in which the display panel is displayed in the forward direction is taken as an example,
the first color filter, the second color filter and the third color filter are respectively a red filter, a green filter and a blue filter, a first sub-pixel, a fourth sub-pixel and a seventh sub-pixel are sequentially arranged in a first row along the direction of the data line, and the first sub-pixel, the fourth sub-pixel and the seventh sub-pixel are respectively a red sub-pixel, a blue sub-pixel and a green sub-pixel; the second sub-pixel, the fifth sub-pixel and the eighth sub-pixel are sequentially arranged along the second row of the data line direction and are respectively a green sub-pixel, a red sub-pixel and a blue sub-pixel, and the third row of the data line direction is sequentially arranged with the third sub-pixel, the sixth sub-pixel and the ninth sub-pixel and are respectively a blue sub-pixel, a green sub-pixel and a red sub-pixel. Of course, there is a transformation corresponding to the specific sub-pixel colors of different columns, and the specific transformation manner is determined according to the manner of the embodiment.
Since the arrangement structure of the sub-pixels is changed in the scheme of the embodiment, the number of pixels required to achieve 3840 resolution in the X direction is 3840 × 2, and 2160 × 1.5 in the Y direction. In order to implement the present embodiment better, the driving method and the driving structure of the pixel matrix need to be changed correspondingly. Therefore, the present embodiment uses pixel sharing to achieve the design with the same resolution, and under the same resolution of 4K2K, the number of pixels in the X direction is 3840X2, the number of pixels in the Y direction is 2160X 1.5, and the design using 2 pixels to share 3 sub-pixels in the Y direction completes the present embodiment.
Correspondingly, in the design of data lines and scanning lines of the panel, 7680 subpixels are in total along the scanning line direction, and 3240 subpixels are in total along the data line direction, so that the number of channels required by the Source side is 7680, the number of channels required by the Gate side is 3240, that is, 7680 data lines are required, 3240 scanning lines are required, the corresponding COFs on the Source side are 6, and the COFs on the Gate side are 6.
In a specific embodiment, the aspect ratio of the sub-pixels is 1.5: 2. Specifically, if the conventional sub-pixel has a length of a and a width of 3a, the sub-pixel of this embodiment has a length of 1.5a and a width of 2 a.
To better explain the driving architecture and driving method of the present embodiment, please refer to fig. 3, fig. 3 is a schematic diagram of a low color shift pixel matrix architecture provided by the present embodiment, where R11, G11, B11, R12, G12, B12, R13, and G13 are 8 adjacent subpixels in a first row, R11, B21, G31, R41, B51, and G61 are 6 adjacent subpixels in a first column, where R represents a red subpixel, G represents a green subpixel, and B represents a blue subpixel, where a complete pixel is composed of 3 subpixels, such as R11, G11, and B21, to display a complete pixel in an image. And one pixel unit is 18 sub-pixels, for example, 6 sub-pixels R11, G11, G11, R12, G12, B12 in the first column, 6 sub-pixels B21, R21, G21, B22, R22, G22 in the second column, and sub-pixels G31, B31, R31, G32, B32, R32 in the third column constitute one pixel unit.
Wherein, the data line D1 is connected with a sub-pixel R11, a sub-pixel B21, a sub-pixel G31, a sub-pixel R41, a sub-pixel B51 and a sub-pixel G61,
the data line D2 is connected with the sub-pixel G11, the sub-pixel R21, the sub-pixel B31, the sub-pixel G41, the sub-pixel R51 and the sub-pixel B61,
the data line D3 is connected with the sub-pixel B11, the sub-pixel G21, the sub-pixel R31, the sub-pixel B41, the sub-pixel G51 and the sub-pixel R61; and so on.
The scanning line G1 is connected with the sub-pixel R11, the sub-pixel G11, the sub-pixel B11, the sub-pixel R12, the sub-pixel G12, the sub-pixel B12, the sub-pixel R13 and the sub-pixel G13,
the scanning line G2 is connected with the sub-pixel B21, the sub-pixel R21, the sub-pixel G21, the sub-pixel B22, the sub-pixel R22, the sub-pixel G22, the sub-pixel B23 and the sub-pixel R23,
the scanning line G3 is connected with the sub-pixel G31, the sub-pixel B31, the sub-pixel R31, the sub-pixel G32, the sub-pixel B32, the sub-pixel R32, the sub-pixel G33 and the sub-pixel B33; and so on.
In the driving sequence, at the first time of a certain frame, the scanning line G1 is turned on, and the data line D1, the data line D2, the data line D3, the data line D4, the data line D5, the data line D6, the data line D7 and the data line D8 charge voltages to the sub-pixel R11, the sub-pixel G11, the sub-pixel B11, the sub-pixel R12, the sub-pixel G12, the sub-pixel B12, the sub-pixel R13 and the sub-pixel G13 respectively;
at the second time of the frame, the scan line G2 is turned on, and the data line D1, the data line D2, the data line D3, the data line D4, the data line D5, the data line D6, the data line D7 and the data line D8 charge voltages to the B21, the sub-pixel R21, the sub-pixel G12, the sub-pixel B22, the sub-pixel R22, the sub-pixel G22, the sub-pixel B23 and the sub-pixel R23 respectively;
at the third time of the frame, the scan line G3 is turned on, and the data line D1, the data line D2, the data line D3, the data line D4, the data line D5, the data line D6, the data line D7 and the data line D8 charge voltages to the sub-pixel G31, the sub-pixel B31, the sub-pixel R31, the sub-pixel G32, the sub-pixel B32, the sub-pixel R32, the sub-pixel G33 and the sub-pixel B33 respectively;
at the fourth time of the frame, the scan line G4 is turned on, and the data line D1, the data line D2, the data line D3, the data line D4, the data line D5, the data line D6, the data line D7 and the data line D8 charge voltages to the sub-pixel R41, the sub-pixel G41, the sub-pixel B41, the sub-pixel R42, the sub-pixel G42, the sub-pixel B42, the sub-pixel R43 and the sub-pixel G43 respectively;
at the fifth time of the frame, the scan line G5 is turned on, and the data line D1, the data line D2, the data line D3, the data line D4, the data line D5, the data line D6, the data line D7 and the data line D8 charge voltages to the sub-pixel B51, the sub-pixel R51, the sub-pixel G51, the sub-pixel B52, the sub-pixel R52, the sub-pixel G52, the sub-pixel B53 and the sub-pixel R53 respectively;
at the sixth time of the frame, the scan line G6 is turned on, and the data line D1, the data line D2, the data line D3, the data line D4, the data line D5, the data line D6, the data line D7, and the data line D8 charge voltages to the subpixel G61, the subpixel B61, the subpixel R61, the subpixel G62, the subpixel B62, the subpixel R62, the subpixel G63, and the subpixel B63, respectively. And after one corresponding frame is finished, continuing to charge the sub-pixels of the next frame according to the principle.
In the conventional Normal Gate design, the number of pixels in the Y direction is 2160 × 1, the number of scan lines corresponding to the number of pixels in the Y direction is 2160, and the charging time of each sub-pixel is 7.7us, taking the scan frequency of 60Hz as an example.
In the conventional Dual Gate design, the number of pixels in the Y direction is 2160 × 1 to 2160, the number of scan lines corresponds to the number of pixels in the Y direction is 2160 × 1 to 4320, and the charging time per sub-pixel is 3.86us, taking the scan frequency of 60Hz as an example.
In the design of this embodiment, please refer to table 1, the number of pixels in the Y direction is 2160 × 1.5 — 3240, while according to the architecture of this embodiment, the number of scan lines is 3240, and since the total scan time of one frame is fixed, the charging time of each sub-pixel is 5.14us for the same scan time.
Although the design cost is reduced in the Dual Gate design, the charging time of the sub-pixels is greatly reduced, the charging time of the sub-pixels of the Dual Gate is only half of that of the conventional Normal Gate design, so that the problem of insufficient charging is easily caused, although the charging time of the sub-pixels is increased to 3240 by the framework of the invention, the charging time of the sub-pixels still has 66.6% of that of the conventional Normal Gate design, in addition, if the UD panel adopts the Dual Gate design, the penetration rate loss is 20% compared with the conventional design, the pixel penetration rate of the UD panel is not lost, and the display quality can be improved.
According to the pixel matrix display method provided by the embodiment of the invention, through the architecture design, the penetration rate is enhanced, the pixel charging time is prolonged, the display effect is enhanced, and the user experience is improved in the UD panel design.
In one embodiment, obtaining the first gray scale data and the second gray scale data according to the signal input timing of the arrangement includes:
and obtaining an original pixel value of each pixel position according to the arranged signal input time sequence, and converting the original pixel value of each pixel position into the first gray scale data or the second gray scale data according to a preset conversion mode.
The original pixel values are processed to obtain further first gray scale data and second gray scale data, the gray scales of the pixels of the first gray scale data and the second gray scale data are different, and the first gray scale data and the second gray scale data are loaded on corresponding sub-pixels at certain arrangement intervals between different pixels or different frames.
In a specific example, the first gray scale data is regarded as high gray scale data, the second gray scale data is regarded as low gray scale data, and correspondingly, the voltage magnitude input to the sub-pixel is determined by the gray scale, and a high gray scale voltage corresponding to the high gray scale data, namely, a first gray scale driving voltage is generated; it should be noted that the low gray scale voltage corresponding to the low gray scale data, i.e., the second gray scale driving voltage, represents the relative values of the two gray scales, and the values are not limited separately.
After the gray scale to be displayed at each pixel position is correspondingly determined according to the rule of the invention, the time schedule controller correspondingly adjusts the original gray scale of the pixel position into a high gray scale or a low gray scale and sends the adjusted gray scale value to the data driving unit, and the data driving unit outputs corresponding voltage according to the gray scale value.
For example, if the original pixel value at the a position is 128 gray, and the a position should output a high gray, i.e. H, according to the above rule of the present invention, after calculation, in this example, H of 128 is 138 gray, 138 gray is output to the a position, the data driving unit receives 138 gray, and according to the predetermined conversion rule, the voltage corresponding to 138 gray is 10V, and finally the voltage signal of 10V is output to the a position. Generally, the high-low gray scale adjustment range is determined according to the material of the liquid crystal or the like.
For example, if the original pixel value at the B position is 128 gray, and the B position should output a low gray, i.e., L, according to the above rule of the present invention, the calculation is performed, in this example, if L of 128 is 118 gray, 118 gray is output to the B position, the data driving unit receives 118 gray, and according to the predetermined conversion rule, the voltage corresponding to 118 gray is 8V, and finally the voltage signal of 8V is output to the B position.
In one frame, please refer to fig. 4, fig. 4 is a schematic diagram illustrating gray scale collocation of a low color shift pixel matrix according to an embodiment of the present invention, in which for a certain column along a data line direction, gray scales of each sub-pixel are all H or all L, and for a certain row along a scan line direction, H, L are sequentially alternated, it should be noted that, in the prior art, H/L of a same color layer is generally designed to adjacent left and right positions or upper and lower positions, while in this embodiment, the same color layer is disposed at an obliquely adjacent diagonal position, that is, if R11 is currently H, the sub-pixel of L corresponding to R11 is R21, and so on, and a dashed oblique line in the diagram indicates the gray scale collocation direction of this embodiment.
In a specific implementation, the original pixel value of each pixel position is obtained according to the arranged signal input timing sequence, and the original pixel value of each pixel position is converted into the first gray scale data or the second gray scale data according to a predetermined conversion manner, specifically, the timing controller takes a sub-pixel with a coordinate position of P (i, j) and a sub-pixel with a coordinate position of P (i +1, j +1) as pixels of the same color layer, converts the P (i, j) sub-pixel corresponding to the original pixel value into high gray scale data, and converts the P (i +1, j +1) sub-pixel into low gray scale data. To implement H/L collocation.
For the sub-pixel design mode of the implementation framework, the oblique H/L collocation is adopted, so that the side visibility can be better improved, pixels in a pixel matrix are not influenced by polarity, the problems of crosstalk, bright and dark lines and the like are solved, and the display effect is improved.
Example two
Fig. 5 is a schematic diagram of a low color shift pixel matrix display device according to an embodiment of the present invention, which includes a timing controller 41, a data driving unit 42, a scan driving unit 43, and a pixel matrix 44, where the pixel matrix 44 includes a plurality of pixel units 45 arranged in a predetermined rule, and further includes:
the timing controller 41 is configured to obtain an original signal input timing sequence, convert the original signal input timing sequence into a arranged signal input timing sequence according to the pixel units 45 arranged according to the predetermined rule, obtain first gray scale data and second gray scale data according to the arranged signal input timing sequence, and output the first gray scale data and the second gray scale data to the data driving unit 42;
the data driving unit 42 is configured to generate a first gray scale driving voltage according to the first gray scale data, and generate a second gray scale driving voltage according to the second gray scale data;
and in one frame, the data driving unit 42 is further configured to load the first gray scale driving voltage or the second gray scale driving voltage to the pixel matrix along a data line direction.
In one embodiment, the pixel units 42 arranged in a predetermined regular manner include:
a first sub-pixel having a first color filter;
a second sub-pixel having a second color filter adjacent to the first sub-pixel in a first direction;
a third sub-pixel having a third color filter adjacent to the second sub-pixel in the first direction;
a fourth sub-pixel having a third color filter adjacent to the first sub-pixel in the second direction;
a fifth sub-pixel having a first color filter and adjacent to the fourth sub-pixel in a first direction;
a sixth sub-pixel having a second color filter adjacent to the fifth sub-pixel in the first direction;
a seventh sub-pixel having a second color filter adjacent to the fourth sub-pixel in a second direction;
an eighth subpixel having a third color filter adjacent to the seventh subpixel in the first direction;
and the ninth sub-pixel is provided with a first color filter and is adjacent to the eighth sub-pixel in the first direction.
In one embodiment, the aspect ratio of the sub-pixels is 1.5: 2.
In one embodiment, the timing controller 41 is specifically configured to obtain an original pixel value of each pixel position according to the arranged signal input timing, and convert the original pixel value of each pixel position into the first gray-scale data or the second gray-scale data according to a predetermined conversion manner.
According to the pixel matrix display method provided by the embodiment of the invention, through the architecture design, the penetration rate is enhanced, the pixel charging time is prolonged, the display effect is enhanced, and the user experience is improved in the UD panel design.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (9)
1. A low color cast pixel matrix display method is characterized in that the pixel matrix comprises a plurality of pixel units which are arranged in a preset rule, and the method comprises the following steps:
acquiring an original signal input time sequence;
converting the original signal input time sequence into an arranged signal input time sequence according to the pixel units arranged according to the preset rule;
generating a first gray scale driving voltage and a second gray scale driving voltage according to the arranged signal input timing sequence;
and in one frame, loading the first gray scale driving voltage or the second gray scale driving voltage to the pixel matrix along the direction of a data line.
2. The method as claimed in claim 1, wherein the pixel units arranged in a predetermined rule comprise:
a first sub-pixel having a first color filter;
a second sub-pixel having a second color filter adjacent to the first sub-pixel in a first direction;
a third sub-pixel having a third color filter adjacent to the second sub-pixel in the first direction;
a fourth sub-pixel having a third color filter adjacent to the first sub-pixel in the second direction;
a fifth sub-pixel having a first color filter and adjacent to the fourth sub-pixel in a first direction;
a sixth sub-pixel having a second color filter adjacent to the fifth sub-pixel in the first direction;
a seventh sub-pixel having a second color filter adjacent to the fourth sub-pixel in a second direction;
an eighth subpixel having a third color filter adjacent to the seventh subpixel in the first direction;
and the ninth sub-pixel is provided with a first color filter and is adjacent to the eighth sub-pixel in the first direction.
3. A method as claimed in claim 2, wherein the sub-pixels have an aspect ratio of 1.5: 2.
4. The method of claim 2, wherein generating the first and second grayscale driving voltages according to the signal input timing of the arrangement comprises:
obtaining first gray scale data and second gray scale data according to the arranged signal input time sequence;
and generating a first gray scale driving voltage corresponding to the first gray scale data and a second gray scale driving voltage corresponding to the second gray scale data according to the first gray scale data and the second gray scale data.
5. The method as claimed in claim 4, wherein obtaining the first gray scale data and the second gray scale data according to the signal input timing of the arrangement comprises:
and obtaining an original pixel value of each pixel position according to the arranged signal input time sequence, and converting the original pixel value of each pixel position into the first gray scale data or the second gray scale data according to a preset conversion mode.
6. A low color cast pixel matrix display device comprises a time schedule controller, a data driving unit, a scanning driving unit and a pixel matrix, and is characterized in that the pixel matrix comprises a plurality of pixel units which are arranged in a preset rule, and the low color cast pixel matrix display device also comprises:
the time sequence controller is used for acquiring an original signal input time sequence, converting the original signal input time sequence into a arranged signal input time sequence according to the pixel units arranged according to the preset rule, obtaining first gray scale data and second gray scale data according to the arranged signal input time sequence, and outputting the first gray scale data and the second gray scale data to the data driving unit;
the data driving unit is used for generating a first gray scale driving voltage according to the first gray scale data and generating a second gray scale driving voltage according to the second gray scale data;
and loading the first gray scale driving voltage or the second gray scale driving voltage to the pixel matrix along the direction of a data line in one frame.
7. A low color shift pixel matrix display device according to claim 6, wherein said pixel cells in a predetermined regular arrangement comprise:
a first sub-pixel having a first color filter;
a second sub-pixel having a second color filter adjacent to the first sub-pixel in a first direction;
a third sub-pixel having a third color filter adjacent to the second sub-pixel in the first direction;
a fourth sub-pixel having a third color filter adjacent to the first sub-pixel in the second direction;
a fifth sub-pixel having a first color filter and adjacent to the fourth sub-pixel in a first direction;
a sixth sub-pixel having a second color filter adjacent to the fifth sub-pixel in the first direction;
a seventh sub-pixel having a second color filter adjacent to the fourth sub-pixel in a second direction;
an eighth subpixel having a third color filter adjacent to the seventh subpixel in the first direction;
and the ninth sub-pixel is provided with a first color filter and is adjacent to the eighth sub-pixel in the first direction.
8. A low color shift pixel matrix display device according to claim 6, wherein said sub-pixels have an aspect ratio of 1.5: 2.
9. The device of claim 6, wherein the timing controller is specifically configured to obtain an original pixel value of each pixel position according to the arranged signal input timing, and convert the original pixel value of each pixel position into the first gray scale data or the second gray scale data according to a predetermined conversion manner.
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| CN201810606052.1A CN110599968A (en) | 2018-06-13 | 2018-06-13 | Low color cast pixel matrix display method and device |
| US16/291,636 US10789875B2 (en) | 2018-03-02 | 2019-03-04 | Pixel matrix display device |
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| CN201810606052.1A CN110599968A (en) | 2018-06-13 | 2018-06-13 | Low color cast pixel matrix display method and device |
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