CN108364611A - Bilateral scanning circuit, bilateral scanning method and display device - Google Patents
Bilateral scanning circuit, bilateral scanning method and display device Download PDFInfo
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- CN108364611A CN108364611A CN201810082660.7A CN201810082660A CN108364611A CN 108364611 A CN108364611 A CN 108364611A CN 201810082660 A CN201810082660 A CN 201810082660A CN 108364611 A CN108364611 A CN 108364611A
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- 238000000034 method Methods 0.000 title claims abstract description 13
- 230000002146 bilateral effect Effects 0.000 title abstract 8
- 230000002457 bidirectional effect Effects 0.000 claims description 42
- 238000005516 engineering process Methods 0.000 abstract description 4
- NCGICGYLBXGBGN-UHFFFAOYSA-N 3-morpholin-4-yl-1-oxa-3-azonia-2-azanidacyclopent-3-en-5-imine;hydrochloride Chemical compound Cl.[N-]1OC(=N)C=[N+]1N1CCOCC1 NCGICGYLBXGBGN-UHFFFAOYSA-N 0.000 description 4
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- 239000003990 capacitor Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3266—Details of drivers for scan electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
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Abstract
The present invention relates to display technology field, a kind of bilateral scanning circuit, bilateral scanning method and display device are disclosed.Bilateral scanning circuit includes：The first signal element, switching transistor and the pixel unit that multistage is correspondingly arranged, wherein switching transistor is separately connected line trigger signal and the first signal element, for receiving trigger signal and sending drive signal to the first signal element；First signal element is separately connected switching transistor and pixel unit, for receiving drive signal, and sends out scanning signal to corresponding pixel unit and sends trigger signal to next stage switching transistor；Pixel unit is connect with the first signal element, the scanning signal for receiving the first signal element；By adjusting the trigger signal of line trigger signal, the scanning direction of bilateral scanning circuit can be adjusted.The bilateral scanning circuit can realize the bilateral scanning to pixel unit, and circuit structure is relatively simple, and easily implement.
Description
Technical Field
The invention relates to the technical field of display, in particular to a bidirectional scanning circuit, a bidirectional scanning method and a display device.
Background
With the development of information technology, organic electroluminescent devices have become one of the most interesting technologies in flat panel display technology due to their advantages of high contrast, wide viewing angle, low power consumption, thin size, etc.
When the organic electroluminescent device is powered on to display, a driving circuit generally outputs signals, and each pixel unit is scanned line by line to achieve the purpose of displaying. The driving circuit comprises a gate driving circuit and a data driving circuit, the data driving circuit latches the input display data in sequence at regular time, converts the input display data into analog signals and then inputs the analog signals to the data lines of the display panel, and the gate driving circuit converts the input clock signals into on/off voltages through a shift register and applies the on/off voltages to the gate lines of the display panel in sequence. Meanwhile, the shift register of the gate driving circuit is also used to generate a scan signal in scanning the gate lines.
At present, the conventional gate driving circuit can realize the forward and reverse scanning of the display unit by switching the high and low levels input from the forward and reverse scanning voltage port, but a switch array formed by a plurality of bidirectional control switches needs to be added in the driving circuit, so that the cost is high, and the structure of the driving circuit is further complicated.
Disclosure of Invention
Therefore, the technical problem to be solved by the invention is that the bidirectional scanning circuit has a complex structure.
In order to solve the technical problems, the technical scheme adopted by the invention is as follows:
the invention provides a bidirectional scanning circuit, which comprises a plurality of stages of first signal units, switching transistors and pixel units which are correspondingly arranged, wherein,
the switch transistor is respectively connected with a trigger signal line and the first signal unit and used for receiving a trigger signal and sending a driving signal to the first signal unit;
the first signal unit is respectively connected with the switch transistor and the pixel unit and is used for receiving the driving signal, sending a scanning signal to the corresponding pixel unit and sending a trigger signal to the next stage of switch transistor;
the pixel unit is connected with the first signal unit and used for receiving the scanning signal of the first signal unit;
the scanning direction of the bidirectional scanning circuit can be adjusted by adjusting the trigger signal of the trigger signal line.
Optionally, each stage the first signal unit corresponds to a first switch transistor and a second switch transistor, the trigger signal line includes a forward scanning control line, a reverse scanning control line and a start pulse control line, the forward scanning control line and the reverse scanning control line are respectively connected to the gates of the first switch transistor and the second switch transistor, the start pulse control line is respectively connected to the first stage the source or drain of the first switch transistor and the last stage the source or drain of the second switch transistor.
Optionally, the scan signals include a first scan signal, a second scan signal, and a third scan signal;
the first signal unit is used for sending the first scanning signal to the corresponding pixel unit and sending the third scanning signal to the pixel unit at the previous stage in the forward scanning direction at the same time when the first signal unit is used for sending the first scanning signal to the corresponding pixel unit in forward scanning;
the first signal unit is further configured to send the first scanning signal to the corresponding pixel unit and send the third scanning signal to the pixel unit at the next stage in the reverse scanning direction at the same time when performing reverse scanning;
the bidirectional scanning circuit further comprises a second signal unit, and the second signal unit is used for sending out the second scanning signal to the corresponding pixel unit.
Optionally, the number of the first signal units and the number of the second signal units are equal and are both one more than the number of the pixel units;
and during reverse scanning, the scanning signal output end of the second signal unit positioned at the first stage in the reverse scanning direction is grounded.
Optionally, the first signal unit and the second signal unit are shift registers.
Optionally, the shift registers are connected to a first clock signal line and a second clock signal line, and the logic levels of the first clock signal and the second clock signal are opposite.
The invention also provides a bidirectional scanning method, which comprises the following steps:
inputting control signals to a first clock signal line, a second clock signal line, a starting pulse control line and a forward scanning control line, conducting a first switch transistor corresponding to a first-stage signal unit positioned in the forward scanning direction, and sending a driving signal to the signal unit;
after receiving the driving signal, the first signal unit sends a scanning signal to the corresponding pixel unit, and simultaneously sends a trigger signal to the first switching transistor at the next stage in the forward scanning direction, and so on, thereby realizing the forward scanning of the pixel unit;
inputting a control signal to the reverse scanning control line, enabling a second switching transistor corresponding to a first-stage signal unit positioned in the reverse scanning direction to be switched on, and sending a driving signal to a corresponding first signal unit;
and after receiving the driving signal, the first signal unit sends a scanning signal to the corresponding pixel unit, simultaneously sends a trigger signal to the second switching transistor at the next stage in the reverse scanning direction, and so on, thereby realizing the reverse scanning of the pixel unit.
Optionally, the scan signals include a first scan signal, a second scan signal, and a third scan signal;
when scanning in the forward direction, the first signal unit sends out the first scanning signal to the corresponding pixel unit, and simultaneously sends out a third scanning signal to the pixel unit at the previous stage in the forward scanning direction;
during reverse scanning, the first signal unit sends out the first scanning signal to the corresponding pixel unit, and simultaneously sends out a third scanning signal to the pixel unit at the next stage in the reverse scanning direction;
the second signal unit is used for sending the second scanning signal to the corresponding pixel unit.
Optionally, the number of the first signal units and the number of the second signal units are equal and are both one more than the number of the pixel units;
and during reverse scanning, the scanning signal output end of the second signal unit positioned at the first stage in the reverse scanning direction is grounded.
The invention also provides a display device which comprises the bidirectional scanning circuit.
The technical scheme of the invention has the following advantages:
according to the bidirectional scanning circuit provided by the invention, the switching transistor sends the driving signal to the first signal unit after receiving the triggering signal sent by the triggering signal line, and the first signal unit sends the scanning signal to the corresponding pixel unit after receiving the driving signal, so that the scanning of the corresponding pixel unit is realized. And the trigger signal is also sent to the next-stage switching transistor while the scanning signal is sent, so that the next-stage first signal unit can be driven to send the scanning signal to the next-stage pixel unit, and by analogy, the sequential scanning of the multi-stage pixel units is realized. In addition, the scanning direction can be adjusted by adjusting the trigger signal of the trigger signal line. The bidirectional scanning circuit can realize bidirectional scanning of the pixel units by configuring the corresponding first signal units and the corresponding switch transistors in the pixel units at all levels, and has the advantages of simple circuit structure and easy implementation.
The bidirectional scanning circuit provided by the invention has the advantages that the forward scanning control line is connected with the first switch transistor in each stage, the reverse scanning control line is connected with the second switch transistor in each stage, and the start pulse control line is respectively connected with the source electrodes or the drain electrodes of the first switch transistor and the second switch transistor at the head end and the tail end. Under the mutual cooperation of the start pulse control line and the forward scanning control line, the first switching transistors of each stage are sequentially conducted, and then the corresponding first signal units are driven to send scanning signals to the pixel units, so that forward scanning is realized; under the mutual cooperation of the opening pulse control line and the reverse scanning control line, the second switching transistors of each stage are sequentially switched on, and then the corresponding first signal units are driven to send scanning signals to the pixel units, so that reverse scanning is realized. The forward scanning and the reverse scanning are respectively controlled by different switching transistors, so that the circuit design and the signal control are convenient.
The scanning signals of the bidirectional scanning circuit comprise a first scanning signal, a second scanning signal and a third scanning signal. When the pixel unit scans in the forward direction, the first signal unit sends a first scanning signal and simultaneously sends a third scanning signal to the upper-stage pixel unit in the forward scanning direction, and the second signal unit is used for sending a second scanning signal to the corresponding pixel unit; and during reverse scanning, the first signal unit sends a first scanning signal and simultaneously sends a third scanning signal to the next-stage pixel unit in the reverse scanning direction, and the second signal unit is used for sending a second scanning signal to the corresponding pixel unit.
That is, the first signal unit of each stage may simultaneously emit the first scan signal and the third scan signal of the pixel units of two adjacent stages regardless of the forward scan or the reverse scan, that is, the first scan signal and the third scan signal belong to the same signal. Therefore, when the pixel unit is connected with a plurality of scanning signal lines, the circuit structure and the scanning control mode are effectively simplified.
According to the bidirectional scanning circuit provided by the invention, the number of the first signal units is one more than that of the pixel units, namely, the third scanning signal of the last-stage pixel unit can be sent out by the added first signal unit under the condition that the first signal unit simultaneously controls the first scanning signal and the second scanning signal of the adjacent two-stage pixel units, so that the pixel units can normally work. The number of the second signal units is one more than that of the pixel units, and during reverse scanning, the scanning signal output end of the first-stage second signal unit positioned in the reverse scanning direction is grounded, so that forward and reverse scanning can be realized by switching the forward scanning control signal and the reverse scanning control signal under the condition of not changing a time sequence signal, the circuit structure is simplified, and debugging of a screen body is facilitated.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a schematic diagram of a bidirectional scanning circuit according to the present invention;
FIG. 2 is a timing diagram of the forward scanning of the bidirectional scanning circuit provided in the present invention;
FIG. 3 is a timing diagram illustrating the reverse scan of the bidirectional scan circuit according to the present invention;
reference numerals:
1-a first signal unit; 2-a second signal unit; 31-a first switching transistor; 32-a second switching transistor; 4-pixel cells; 51-forward scan control line; 52-reverse scan control line; 53-open pulse control line; 54-a first clock signal line; 55-second clock signal line.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "first", "second", and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In addition, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
It should be noted that, in the embodiment of the present invention, the forward scanning direction is from top to bottom in fig. 1, and the reverse scanning direction is from bottom to top in fig. 1.
Example 1
The embodiment of the invention provides a bidirectional scanning circuit which is used for scanning pixel units 4 line by line. As shown in fig. 1, the liquid crystal display device includes a plurality of stages of correspondingly arranged first signal units 1, switching transistors, and pixel units 4. Wherein,
the switching transistors are respectively connected with the trigger signal line and the first signal unit 1, and are used for receiving the trigger signal and sending a driving signal to the first signal unit 1.
The first signal unit 1 is respectively connected to the switching transistor and the pixel unit 4, and is configured to receive a driving signal, send a scanning signal to the corresponding pixel unit 4, and send a trigger signal to the next stage of switching transistor.
The pixel unit 4 is connected to the first signal unit 1 for receiving the scanning signal of the first signal unit 1.
The scanning direction of the bidirectional scanning circuit can be adjusted by adjusting the trigger signal of the trigger signal line.
In the bidirectional scanning circuit provided in the embodiment of the present invention, the switching transistor sends the driving signal to the first signal unit 1 after receiving the trigger signal sent by the trigger signal line, and the first signal unit 1 sends the scanning signal to the corresponding pixel unit 4 after receiving the driving signal, so as to implement scanning of the corresponding pixel unit 4. And the trigger signal is sent to the next-stage switching transistor while the scanning signal is sent, so that the next-stage first signal unit 1 can be driven to send the scanning signal to the next-stage pixel unit 4, and by analogy, the sequential scanning of the multi-stage pixel units 4 is realized. In addition, the turn-on sequence of the switching transistors can be adjusted by adjusting the trigger signal of the trigger signal line, and then the scanning signals are sequentially sent to the pixel units 4 of each stage according to the sequence, so that the adjustment of the scanning direction is realized. In summary, the bidirectional scanning circuit can realize bidirectional scanning of the pixel units 4 by configuring the corresponding first signal units 1 and the corresponding switch transistors in the pixel units 4 at each stage and adjusting the trigger signals of the trigger signal lines connected with the switch transistors, and the circuit structure is simple and easy to implement.
As an optional implementation manner, in this embodiment, each stage of the first signal unit 1 corresponds to the first switching transistor 31 and the second switching transistor 32, the trigger signal line includes a forward direction scan control line 51, a reverse direction scan control line 52, and a start pulse control line 53, the forward direction scan control line 51 and the reverse direction scan control line 52 are respectively connected to gates of the first switching transistor 31 and the second switching transistor 32, and the start pulse control line 53 is respectively connected to a source or a drain of the first stage of the first switching transistor 31 and a source or a drain of the last stage of the second switching transistor 32.
Thus, the forward direction scanning control line 51 is connected to the first switching transistor 31 in each stage, the reverse direction scanning control line 52 is connected to the second switching transistor 32 in each stage, and the turn-on pulse control line 53 is connected to the sources or drains of the first switching transistor 31 and the second switching transistor 32 at the head and tail ends, respectively. That is, the on pulse control line 53 and the forward scanning control line 51 cooperate with each other to sequentially turn on the first switching transistors 31 of each stage from top to bottom in fig. 1, and then drive the corresponding first signal units 1 to transmit scanning signals to the pixel units 4, so as to implement forward scanning from top to bottom; under the mutual cooperation of the start pulse control line 53 and the reverse scanning control line 52, the second switching transistor 32 of each stage is sequentially turned on from bottom to top in fig. 1, and then drives the corresponding first signal unit 1 to transmit a scanning signal to the pixel unit 4, thereby realizing reverse scanning from bottom to top. The forward scanning and the reverse scanning are respectively controlled by different switching transistors, so that the circuit design and the signal control are convenient.
As an alternative implementation, in the present embodiment, the scan signals include a first scan signal, a second scan signal and a third scan signal. Specifically, the first scan signal may be an initialization signal for a storage capacitor in the pixel unit 4, the second scan signal may be a data write signal, and the third scan signal may be an initialization signal for a light emitting diode.
The first signal unit 1 is used for sending a first scanning signal to the corresponding pixel unit 4 and sending a third scanning signal to the pixel unit 4 at the previous stage in the forward scanning direction at the same time when the forward scanning is carried out; the first signal unit 1 is further configured to, during the reverse scanning, send a first scanning signal to the corresponding pixel unit 4 and send a third scanning signal to the pixel unit 4 at the next stage in the reverse scanning direction. Meanwhile, the bidirectional scanning circuit further includes a second signal unit 2, and the second signal unit 2 is configured to send a second scanning signal to the corresponding pixel unit 4.
Therefore, during forward scanning, the first signal unit 1 sends out a first scanning signal and simultaneously sends out a third scanning signal to the upper-stage pixel unit 4, and the second signal unit 2 is used for sending out a second scanning signal to the corresponding pixel unit 4; during the reverse scanning, the first signal unit 1 sends a first scanning signal and simultaneously sends a third scanning signal to the next-stage pixel unit 4, and the second signal unit 2 is used for sending a second scanning signal to the corresponding pixel unit 4. That is, the first signal unit 1 of each stage may simultaneously emit the first scan signal and the third scan signal of the pixel units 4 of two adjacent stages regardless of the forward scanning or the reverse scanning, that is, the first scan signal and the third scan signal belong to the same signal. Therefore, when the pixel unit 4 is connected with a plurality of scanning signal lines, the circuit structure and the scanning control mode are effectively simplified.
As an alternative implementation, in the present embodiment, the number of the first signal units 1 and the second signal units 2 is equal, and is one more than the number of the pixel units 4; in the reverse scanning, the scanning signal output terminal of the second signal unit 2 located at the first stage in the reverse scanning direction is grounded.
Therefore, in the scanning circuit, the number of the first signal units 1 is one more than that of the pixel units 4, that is, under the condition that the first signal units 1 simultaneously control the first scanning signals and the second scanning signals of the adjacent two stages of pixel units 4, the third scanning signal of the last stage of pixel unit 4 can be sent by the added first signal unit 1, and the pixel units 4 can be ensured to normally work. The number of the second signal units 2 is one more than that of the pixel units 4, and during reverse scanning, the scanning signal output end of the first-stage second signal unit 2 in the reverse scanning direction is grounded, so that forward and reverse scanning can be realized by switching the forward scanning control signal and the reverse scanning control signal under the condition of not changing the time sequence signal, the circuit structure is simplified, and debugging of the screen body is facilitated.
As an alternative, in this embodiment, the switching transistor may be a P-channel fet or an N-channel fet. Therefore, the good switching characteristic of the switching transistor is ensured, and the scanning efficiency of the scanning circuit is improved. The particular choice of which type of switching transistor is chosen may depend on the actual circumstances.
As an alternative, in this embodiment, the first signal unit 1 may be a shift register.
As an alternative, in this embodiment, the shift register is connected to the first clock signal line 54 and the second clock signal line 55, and the logic levels of the first clock signal and the second clock signal are opposite, that is, when the first clock signal is at a high level, the second clock signal is at a low level, and when the first clock signal is at a low level, the second clock signal is at a high level.
In addition, the present embodiment further provides a display device, which includes the bidirectional scanning circuit structure. The display device provided by the embodiment provides the scanning signals to each pixel unit through the bidirectional scanning circuit, and provides the data signals to each pixel unit through the data driving circuit, so as to realize display.
In this embodiment, the display device may be any type of display device such as a mobile phone, a PC, a tablet PC, a notebook, a vehicle-mounted device, an AR display device, and a VR display device.
Example 2
The embodiment of the invention provides a bidirectional scanning method, which is used for carrying out progressive scanning on pixel units 4. The method comprises the following steps:
in step S21, control signals are input to the first clock signal line 54, the second clock signal line 55, the start pulse control line 53, and the forward scanning control line 51, the first switching transistor 31 corresponding to the first-stage signal unit located in the forward scanning direction is turned on, and a driving signal is sent to the signal unit.
Specifically, the logic levels of the first clock signal and the second clock signal are opposite, the first switching transistor 31 is a P-channel fet, the start pulse control line 53 inputs a high level, and the forward direction scan control line 51 is connected to the gate of the first switching transistor 31 and inputs a low level, so that the first switching transistor 31 of the first stage is turned on, and transmits a driving signal to the first signal unit 1 of the first stage. At this time, the reverse scan control signal is at a high level, and thus the second switching transistor 32 is not turned on.
Step S22, after receiving the driving signal, the first signal unit 1 sends a scanning signal to the corresponding pixel unit 4, and simultaneously sends a trigger signal to the next stage of the first switching transistor 31 in the forward scanning direction, and so on, thereby implementing the forward scanning of the pixel unit 4.
Specifically, after receiving the driving signal, the first signal unit 1 of the first stage sends a scanning signal to the pixel unit 4 of the first stage, and performs scanning on the pixel unit 4 of the first stage. And meanwhile, a trigger signal is sent to the source or the drain of the first switch transistor 31 of the second stage, because the gate of the first switch transistor 31 of the second stage is connected to the forward scanning control line 51, and the forward scanning control line 51 is at a low level, the first switch transistor 31 of the second stage is turned on to send a driving signal to the first signal unit 1 of the second stage, and the first signal unit 1 of the second stage sends a scanning signal to the pixel unit 4 of the second stage to scan the pixel unit 4 of the second stage. By analogy, the pixel unit 4 is scanned in the forward direction.
In step S23, a control signal is input to the reverse scanning control line 52, the second switching transistor 32 corresponding to the first-stage signal unit located in the reverse scanning direction is turned on, and a driving signal is sent to the corresponding first signal unit 1.
Unlike the forward scanning, at this time, the reverse scanning control signal is at a low level, the second switching transistor 32 is turned on, the forward scanning control signal is at a high level, and the first switching transistor 31 is turned off.
In step S24, after receiving the driving signal, the first signal unit 1 sends a scanning signal to the corresponding pixel unit 4, and simultaneously sends a trigger signal to the next-stage second switching transistor 32 in the reverse scanning direction, and so on, thereby implementing the reverse scanning of the pixel unit 4.
This step is similar to the forward scan described above and will not be described further herein.
As a preferred embodiment, the scan signals include a first scan signal, a second scan signal, and a third scan signal.
When scanning in the forward direction, the first signal unit 1 sends a first scanning signal to the corresponding pixel unit 4, and simultaneously sends a third scanning signal to the pixel unit 4 at the previous stage in the forward scanning direction; in the reverse scanning, the first signal unit 1 sends a first scanning signal to the corresponding pixel unit 4, and also sends a third scanning signal to the next-stage pixel unit 4 in the reverse scanning direction. That is, the first scan signal and the third scan signal of the pixel unit 4 of two adjacent stages belong to the same scan signal.
The second signal unit 2 is used for sending out a second scanning signal to the corresponding pixel unit 4.
As an alternative implementation, in the present embodiment, the number of the first signal units 1 and the second signal units 2 is equal, and is one more than the number of the pixel units 4; in the reverse scanning, the scanning signal output terminal of the second signal unit 2 located at the first stage in the reverse scanning direction is grounded.
That is, in the case where the first signal unit 1 simultaneously controls the first scan signal and the second scan signal of the two adjacent stages of pixel units 4, the third scan signal of the last stage of pixel unit 4 can be sent by the added first signal unit 1, and it is ensured that the pixel unit 4 can normally operate. The number of the second signal units 2 is one more than that of the pixel units 4, and during reverse scanning, the scanning signal output end of the first-stage second signal unit 2 in the reverse scanning direction is grounded, so that forward and reverse scanning can be realized by switching the forward scanning control signal and the reverse scanning control signal under the condition of not changing the time sequence signal, the circuit structure is simplified, and debugging of the screen body is facilitated.
Example 3
An embodiment of the present invention provides a specific example of the bidirectional scanning circuit and the bidirectional scanning method provided in embodiments 1 and 2 described above.
As shown in fig. 1, the bidirectional scanning circuit includes 1920-stage pixel units 4, each stage of pixel unit 4 having three scanning signal pins S1, S2, S3 for receiving a first scanning signal, a second scanning signal and a third scanning signal. Each stage of pixel unit 4 is correspondingly provided with a first signal unit 1 and a second signal unit 2, the first signal unit 1 is used for sending a first scanning signal and a third scanning signal to the pixel unit 4, and the second signal unit 2 is used for sending a second scanning signal to the pixel unit 4. The first signal unit 1 and the second signal unit 2 are shift registers, and the number of the first signal unit 1 and the number of the second signal unit 2 are 1921.
Each shift register is provided with a first switching transistor 31 and a second switching transistor 32 correspondingly. The first switching transistor 31 and the second switching transistor 32 are both P-channel fets. As shown in the figure, the first switching transistor 31 is M1, M3, M5 … M19, and the second switching transistor 32 is M2, M4, M6 … M20.
Taking the first signal unit 1 as an example, the following description is made: the gates of the first switching transistors 31 are all connected to the forward direction scan control line D2, wherein the drain of the first transistor M1 is connected to the turn-on pulse signal line SIN1, and the source of the first transistor M1 is connected to the shift register.
The output end of the shift register is connected to the pin S1 of the corresponding pixel unit 4, and is also connected to the drain of the first switch transistor M3 of the second stage, the source of the first switch transistor M3 is connected to the shift register of the second stage, the output end of the shift register of the second stage is connected to the pin S1 of the pixel unit 4 of the second stage, and the output end of the shift register of the second stage is also connected to the pin S3 of the pixel unit 4 of the first stage. And so on, which are not described in detail herein.
The gates of the second switch transistors M10 are connected to a reverse scan control line D1, wherein the drains of the second switch transistors M10 are connected to a turn-on pulse signal line SIN1, and the sources of the second switch transistors M10 are connected to 1921 row shift registers.
The 1921 th row shift register has an output end connected to the S3 pin of the 1920 th row pixel unit 4, and also connected to the drain of the second switch transistor M8, the source of the second switch transistor M8 is connected to the 1920 th row shift register, the output end of the 1920 th row shift register is connected to the S1 pin of the 1920 th row pixel unit 4, and meanwhile, the output end of the 1920 th row shift register is also connected to the drain of the second switch transistor M6 and the S3 pin of the 1919 th row pixel unit 4. And so on, which are not described in detail herein.
The shift register is also connected to first clock signal lines SCK1 and SCK 2.
The circuit configuration at the second signal unit 2 is similar to the above-described circuit configuration of the first signal unit 1, with the only difference being: the shift register outputs only the second scan signal, and the shift register of the 1921 th row belongs to a dummy scan cell, that is, its output terminal is connected to the second transistor M18 in the 1920 th row while being grounded or not connected to any pin of the pixel unit 4.
The bidirectional scanning process of the bidirectional scanning circuit comprises the following steps:
in forward scanning: the forward direction scan control line D2 inputs a low level to the gates of all the first switching transistors 31, the reverse direction scan control line D1 inputs a high level to the gates of all the second switching transistors 32, the on pulse control lines SIN1 and SIN2 input a high level to the drains of the first switching transistors M1 and M11 and the drains of the first switching transistor M10 and the second switching transistor M20, and the first clock signal line 54 and the second clock signal line 55 input opposite logic levels to the shift register.
The first switching transistor M1 is turned on and outputs a driving signal to the first row shift register, the output terminal of the first row shift register outputs a first scanning signal to the S1 pin of the first row of pixel units 4, meanwhile, the output signal of the output terminal triggers the first switching transistor M3 to be turned on, the first switching transistor M3 outputs a driving signal to the second row shift register, the output terminal of the second row shift register outputs a first scanning signal to the S1 pin of the second row of pixel units 4, and the output terminal is connected to the S3 pin of the first row of pixel units 4, namely, the first switching transistor M3 outputs a third scanning signal of the first row of pixel units 4. At this time, the output terminal of the shift register on the other side outputs the second scan signal to the pin S2 of the pixel unit 4 on the first row, as in the above-mentioned operation principle. Thereby, scanning of the first row of pixel units 4 is achieved. And analogizing in turn, and realizing the scanning process of the pixel units 4 in the following rows in turn.
And during reverse scanning: the forward direction scan control line D2 inputs a high level to the gates of all the first switching transistors 31, the reverse direction scan control line D1 inputs a low level to the gates of all the second switching transistors 32, the on pulse control lines SIN1 and SIN2 input a high level to the drains of the first switching transistors M1 and M11 and the drains of the first switching transistor M10 and the second switching transistor M20, and the first clock signal line 54 and the second clock signal line 55 input opposite logic levels to the shift register.
The second switch transistor M10 is turned on, and outputs a driving signal to the 1921 th row shift register, the 1921 th row shift register output terminal outputs a third scan signal to the S3 pin of the 1920 th row pixel units 4, meanwhile, the output signal of the output terminal also triggers the second switch transistor M8 to be turned on, the second switch transistor M8 outputs a driving signal to the 1920 th row shift register, the 1920 th row shift register output terminal outputs a first scan signal to the S1 pin of the 1920 th row pixel units 4, and meanwhile, the output terminal is also connected to the S3 pin of the 1919 th row pixel units 4, namely, the output terminal is used as a third scan signal of the 1919 th row pixel units 4. At this time, the output end of the shift register on the other side outputs the second scan signal to the S2 pin of the 1920 th row, similarly to the above operation principle. It should be noted that the output terminal of the shift register of the 1921 th row on the side is connected to the drain of the second switching transistor 32, and at the same time, the S2 pin of any pixel unit 4 is grounded or not connected, so that, as can be seen from the timing charts shown in fig. 2 and 3, the forward and reverse scanning of the pixel unit 4 can be normally completed without changing the timing signal.
It should be noted that the dummy unit in fig. 1 and 3 actually refers to the shift register of the 1921 th row for outputting the second scan signal.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are within the scope of the invention.
Claims (10)
1. A bidirectional scanning circuit, comprising a plurality of stages of correspondingly arranged first signal units (1), switching transistors, and pixel units (4),
the switching transistor is respectively connected with a trigger signal line and the first signal unit (1) and used for receiving a trigger signal and sending a driving signal to the first signal unit (1);
the first signal unit (1) is respectively connected with the switching transistor and the pixel unit (4) and is used for receiving the driving signal, sending a scanning signal to the corresponding pixel unit (4) and sending a trigger signal to the switching transistor of the next stage;
the pixel unit (4) is connected with the first signal unit (1) and used for receiving the scanning signal of the first signal unit (1);
the scanning direction of the bidirectional scanning circuit can be adjusted by adjusting the trigger signal of the trigger signal line.
2. A bidirectional scanning circuit according to claim 1, wherein each stage of the first signal unit (1) corresponds to a first switch transistor (31) and a second switch transistor (32), the trigger signal line includes a forward scanning control line (51), a reverse scanning control line (52), and a start pulse control line (53), the forward scanning control line (51) and the reverse scanning control line (52) are respectively connected to gates of the first switch transistor (31) and the second switch transistor (32), and the start pulse control line (53) is respectively connected to a source or a drain of the first stage of the first switch transistor (31) and a source or a drain of the last stage of the second switch transistor (32).
3. The bidirectional scanning circuit according to claim 1 or 2, wherein the scanning signal includes a first scanning signal, a second scanning signal, and a third scanning signal;
the first signal unit (1) is used for sending the first scanning signal to the corresponding pixel unit (4) and sending the third scanning signal to the pixel unit (4) at the previous stage in the forward scanning direction at the same time when the forward scanning is carried out;
the first signal unit (1) is further configured to send the first scanning signal to the corresponding pixel unit (4) and send the third scanning signal to the pixel unit (4) at a next stage in the reverse scanning direction at the same time when performing reverse scanning;
the bidirectional scanning circuit further comprises a second signal unit (2), and the second signal unit (2) is used for sending out the second scanning signal to the corresponding pixel unit (4).
4. A bi-directional scanning circuit according to claim 3, characterized in that the number of the first signal units (1) and the second signal units (2) is equal and each is one more than the number of the pixel units (4);
and during reverse scanning, the scanning signal output end of the second signal unit (2) positioned at the first stage in the reverse scanning direction is grounded.
5. A bidirectional scanning circuit as claimed in any one of claims 1 to 4, characterized in that the first signal unit (1) and the second signal unit (2) are shift registers.
6. The bidirectional scanning circuit according to claim 5, wherein a first clock signal line (54) and a second clock signal line (55) are connected to each of the shift registers, and the logic levels of the first clock signal (54) and the second clock signal (55) are opposite.
7. A bi-directional scanning method, comprising the steps of:
inputting control signals to a first clock signal line (54), a second clock signal line (55), a starting pulse control line (53) and a forward scanning control line (51), conducting a first switching transistor (31) corresponding to a first-stage signal unit positioned in the forward scanning direction, and sending a driving signal to the signal unit;
after receiving the driving signal, the first signal unit (1) sends a scanning signal to the corresponding pixel unit (4), and simultaneously sends a trigger signal to the first switching transistor (31) at the next stage in the forward scanning direction, and so on, thereby realizing the forward scanning of the pixel unit (4);
inputting a control signal to the reverse scanning control line (52), enabling a second switching transistor (32) corresponding to a first-stage signal unit positioned in the reverse scanning direction to be conducted, and sending a driving signal to a corresponding first signal unit (1);
after receiving the driving signal, the first signal unit (1) sends a scanning signal to the corresponding pixel unit (4), and simultaneously sends a trigger signal to the second switching transistor (32) at the next stage in the reverse scanning direction, and so on, thereby realizing the reverse scanning of the pixel unit (4).
8. The bi-directional scanning method of claim 7, wherein the scan signals include a first scan signal, a second scan signal, and a third scan signal;
when scanning in the forward direction, the first signal unit (1) sends out the first scanning signal to the corresponding pixel unit (4), and simultaneously sends out a third scanning signal to the pixel unit (4) at the previous stage in the forward scanning direction;
during reverse scanning, the first signal unit (1) sends out the first scanning signal to the corresponding pixel unit (4), and simultaneously sends out a third scanning signal to the pixel unit (4) at the next stage in the reverse scanning direction;
the second signal unit (2) is used for sending out the second scanning signal to the corresponding pixel unit (4).
9. A bi-directional scanning method according to claim 8, characterized in that the number of said first signal units (1) and said second signal units (2) is equal and each is one more than the number of said pixel units (4);
and during reverse scanning, the scanning signal output end of the second signal unit (2) positioned at the first stage in the reverse scanning direction is grounded.
10. A display device comprising the bidirectional scanning circuit according to any one of claims 1 to 6.
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