CN108335682B - Display panel, test method and display device - Google Patents
Display panel, test method and display device Download PDFInfo
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- CN108335682B CN108335682B CN201810148887.7A CN201810148887A CN108335682B CN 108335682 B CN108335682 B CN 108335682B CN 201810148887 A CN201810148887 A CN 201810148887A CN 108335682 B CN108335682 B CN 108335682B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
Abstract
The invention provides a display panel, a test method and a display device, relates to the technical field of display, and aims to narrow a frame of the display panel. The polarities of the sub-pixels with the same color in one row of sub-pixels are the same; the sub-pixels of the same color are arranged in any two adjacent rows, and the polarity of the sub-pixels in one row is opposite to that of the sub-pixels in the other row; the test circuit of the display panel comprises a first test signal line, a second test signal line, a switch control signal end, a first test switch element and a second test switch element, wherein the polarities of the first test signal line and the second test signal line are opposite; the control ends of the first test switch element and the second test switch element are connected to the switch control signal end, and the first end of the first test switch element is connected with the first test signal line; the second end is connected with the first sub-pixel column; the first end of the second test switch element is connected with the second test signal line, and the second end of the second test switch element is connected with the second sub-pixel column. The polarities of the first sub-pixel column and the second sub-pixel column are different. The display panel is used for realizing picture display.
Description
[ technical field ] A method for producing a semiconductor device
The invention relates to the technical field of display, in particular to a display panel, a test method and a display device.
[ background of the invention ]
In the field of liquid crystal display, it is generally necessary to drive a liquid crystal material in a polarity inversion manner in order to prevent the liquid crystal material from being permanently broken due to polarization. Before the display panel is put into use, a Visual Test (hereinafter referred to as VT Test) is usually performed on the display panel, and when the VT Test is performed, because the charging voltages of the sub-pixels of different colors are different and the problem of polarization prevention of the liquid crystal material is considered, a larger number of Test signal lines are usually required to be provided, as shown in fig. 1, fig. 1 is an enlarged schematic view of a partial region of a display panel in the prior art, wherein for the sub-pixel 1 located in the first row, the sub-pixel 1 with positive polarity is connected to the Test signal line X1, and the sub-pixel 1 with negative polarity is connected to the Test signal line X2, that is, for any one sub-pixel, at least two Test signal lines need to be provided with Test signals with different polarities, resulting in a larger number of Test signal lines, the frame of the display panel becomes wider, which is not favorable for realizing the narrow frame of the display panel.
[ summary of the invention ]
In view of the above, embodiments of the present invention provide a display panel, a test method and a display apparatus, which are used to narrow a frame of the display panel.
In one aspect, an embodiment of the present invention provides a display panel, where the display panel includes a plurality of sub-pixels with different colors; the sub-pixels of the plurality of different colors comprise a first sub-pixel column and a second sub-pixel column, and the polarities of the first sub-pixel column and the second sub-pixel column are different; in any row of the sub-pixels, the polarities of the sub-pixels of the same color are the same; for the sub-pixels of the same color, in any two adjacent rows, the polarity of the sub-pixels positioned in one row is opposite to that of the sub-pixels positioned in the other row;
the display panel further comprises a test circuit; the test circuit comprises a first test signal line, a second test signal line, a switch control signal end and a plurality of groups of test switch units; each group of the test switch units comprises a first test switch element and a second test switch element; the polarities of the output signals of the first test signal line and the second test signal line are opposite;
the number of the first test signal lines is the same as that of the first test switch elements in each group of the test switch units, and the number of the second test signal lines is the same as that of the second test switch elements in each group of the test switch units; the sum of the number of the first test signal lines and the number of the second test signal lines is equal to the number of the types of the colors of the sub-pixels;
in each group of test switch units, the control end of the first test switch element is connected to the switch control signal end, and the first end of the first test switch element is connected with the first test signal line in a one-to-one correspondence manner; a second end of the first test switch element is connected with the first sub-pixel column;
the control end of the second test switch element is connected to the switch control signal end, the first end of the second test switch element is connected with the second test signal line in a one-to-one correspondence mode, and the second end of the second test switch element is connected with the second sub-pixel column.
On the other hand, an embodiment of the present invention provides a test method, where the test method is applied to the display panel, and the test method includes:
providing a test signal of a first polarity to the first test signal line and a second polarity signal to the second test signal line during a first test period;
and in a second test time period, providing a test signal of a second polarity to the first test signal line and providing a test signal of a first polarity to the second test signal line.
In another aspect, an embodiment of the present invention provides a display device, which includes the above display panel.
One of the above technical solutions has the following beneficial effects:
with the technical solution provided by this embodiment, in the working process of performing VT test on the display panel, because this embodiment sets the polarities of the sub-pixels with the same color in any row of sub-pixels to be the same, for the sub-pixels with one color, this embodiment can only set one test signal line, and provide the test signal to the sub-pixels with the same color in any row of sub-pixels through this test signal line, whereas in the prior art, for the sub-pixels with one color, at least two sub-pixels with one color with different polarities exist in any row of sub-pixels, and therefore, in the prior art, at least two test signal lines are required to provide different polarity signals to the sub-pixels with the color respectively, and compared with the prior art, the technical solution provided by this embodiment can reduce the number of test signal lines by at least half, the frame of the display panel is narrowed.
In addition, for the sub-pixels of the same color, in any two adjacent rows, the polarity of the sub-pixels in one of the rows is set to be opposite to the polarity of the sub-pixels in the other row, so that on the premise of reducing the number of the test signal lines, the sub-pixels of any one color are not all in the same polarity at any time, and therefore, when the polarities are inverted, for the sub-pixels of the color, the flicker phenomenon occurring when all the sub-pixels of one polarity are changed into the sub-pixels of the other polarity is avoided, and further, the influence on the test result of the display panel is avoided.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is an enlarged schematic view of a partial area of a display panel in the prior art;
FIG. 2 is a schematic diagram of a display panel according to an embodiment of the present invention;
FIG. 3 is an enlarged schematic view of a portion of the area of the display panel provided in FIG. 2;
FIG. 4 is a timing diagram illustrating polarity inversion of test signals in a display panel according to an embodiment of the present invention;
FIG. 5 is an enlarged schematic view of a partial region of the display panel provided in FIG. 3 during a second test period;
FIG. 6 is another enlarged schematic view of a portion of the area of the display panel provided in FIG. 2;
fig. 7 is an operation timing diagram of the data driving circuit in fig. 6;
FIG. 8 is a further enlarged schematic view of a portion of the area of the display panel provided in FIG. 2;
FIG. 9 is a further enlarged schematic view of a portion of the area of the display panel provided in FIG. 2;
FIG. 10 is a further enlarged schematic view of a portion of the area of the display panel provided in FIG. 2;
FIG. 11 is a further enlarged schematic view of a portion of the area of the display panel provided in FIG. 2;
FIG. 12 is a flow chart of a testing method provided by an embodiment of the invention;
fig. 13 is a schematic structural diagram of a display device according to an embodiment of the present invention.
[ detailed description ] embodiments
For better understanding of the technical solutions of the present invention, the following detailed descriptions of the embodiments of the present invention are provided with reference to the accompanying drawings.
It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be understood that although the terms first, second, and the like may be used to describe the pixel columns and the test switching elements in the embodiments of the present invention, these structures should not be limited to these terms. For example, the first sub-pixel column may also be referred to as a second sub-pixel column, and similarly, the second sub-pixel column may also be referred to as a first sub-pixel column without departing from the scope of embodiments of the present invention.
The embodiment of the invention provides a display panel. As shown in fig. 2 and fig. 3, fig. 2 is a schematic diagram of a display panel according to an embodiment of the present invention. Fig. 3 is an enlarged schematic view of a partial area of the display panel provided in fig. 2. Wherein, the display panel 10 includes a plurality of sub-pixels with different colors (the sub-pixels with different fillings in fig. 3 represent the sub-pixels with different colors); the plurality of different color sub-pixels includes a first sub-pixel column L1 and a second sub-pixel column L2, wherein the polarities of the first sub-pixel column L1 and the second sub-pixel column L2 are different (in fig. 2, the polarity of the first sub-pixel column L1 is positive, and the polarity of the second sub-pixel column L2 is negative), in any row of sub-pixels, the polarities of the same color sub-pixels are the same, and for the same color sub-pixels, in any two adjacent rows, the polarity of the sub-pixels in one of the rows is opposite to the polarity of the sub-pixels in the other row.
Referring to fig. 3, the display panel 10 further includes a test circuit 20, where the test circuit 20 includes a first test signal line 21, a second test signal line 22, a switch control signal terminal 23, and a plurality of sets of test switch units 24, each set of test switch unit 24 includes a first test switch element 241 and a second test switch element 242, where polarities of test signals output by the first test signal line 21 and the second test signal line 22 are opposite (in fig. 3, the polarity of the test signal output by the first test signal line 21 is positive, and the polarity of the test signal output by the second test signal line 22 is negative).
As shown in fig. 3, the number of the first test signal lines 21 is the same as the number of the first test switch elements 241 in each group of the test switch units 24, the number of the second test signal lines 22 is the same as the number of the second test switch elements 242 in each group of the test switch units 24, and the sum of the numbers of the first test signal lines 21 and the second test signal lines 22 is the same as the number of the types of the colors of the subpixels.
With continued reference to fig. 3, in each group of test switch units 24, the control terminal of the first test switch element 241 is connected to the switch control signal terminal 23, the first terminal of the first test switch element 241 is connected to the first test signal line 21 in a one-to-one correspondence, and the second terminal of the first test switch element 241 is connected to the first sub-pixel column L1; the control terminal of the second test switch element 242 is connected to the switch control signal terminal 23, the first terminal of the second test switch element 242 is connected to the second test signal line 22 in a one-to-one correspondence, and the second terminal of the second test switch element 242 is connected to the second sub-pixel column L2.
It is understood that, in fig. 3, the display panel 10 includes four sub-pixels with different colors, and the test circuit 20 includes the same number of the first test signal lines 21 and the second test signal lines 22, but in fact, the display panel 10 may include other sub-pixels with different colors, and the number of the first test signal lines 21 and the second test signal lines 22 may also be different. As shown in fig. 3, when the number of the first test signal lines 21 and the number of the second test signal lines 22 are the same, the number of the first test switch elements 241 and the number of the second test switch elements 242 included in each group of the test switch units 24 are also the same, that is, the number of the first test signal lines 21 and the number of the second test signal lines 22 are both two, and the number of the first test switch elements 241 and the number of the second test switch elements 242 are both two. When the display panel 10 includes sub-pixels of other numbers of colors, and the numbers of the first sub-pixel columns L1 and the second sub-pixel columns L2 are set to be different, accordingly, the number of first test signal lines 21 and the number of second test signal lines 22 in the test circuit 20 may be different, for example, taking the case where the display panel includes three different color sub-pixels, the number of the first test signal lines 21 may be set to one, the number of the second test signal lines 22 may be set to two, the operation principle is the same as that described above, in which the display panel 10 includes four sub-pixels of different colors, and the number of the first sub-pixel columns L1 is the same as that of the second sub-pixel columns L2, the following describes the operation of the display panel in detail by taking an example that the display panel includes four different color sub-pixels and the number of the first sub-pixel columns L1 and the second sub-pixel columns L2 is the same.
When the VT test is performed on the display panel 10, the switch control signal terminal 23 sends a control signal to turn on the first test switch element 241 and the second test switch element 242 included in each set of test switch units 24. Then, as shown in fig. 4, fig. 4 is a polarity inversion timing diagram of the test signals in the display panel provided by the present embodiment, and in the first test period T1, the test signal U1 of the first polarity is provided to the first test signal line 21, and the test signal U2 of the second polarity is provided to the second test signal line 22; this allows the test signal U1 of the first polarity to be transmitted to the first subpixel column L1 through the first test signal line 21, and the test signal U2 of the second polarity to be transmitted to the second subpixel column L2 through the second test signal line 22, such that the polarity of the first subpixel column L1 is the first polarity and the polarity of the second subpixel column L2 is the second polarity. Then, in the second test period T2, the test signal U2 of the second polarity is supplied to the first test signal line 21, and the test signal U1 of the first polarity is supplied to the second test signal line 22; this allows the test signal U2 of the second polarity to be transmitted to the first subpixel column L1 through the first test signal line 21, and the test signal U1 of the first polarity to be transmitted to the second subpixel column L2 through the second test signal line 22, such that the polarity of the first subpixel column L1 is the second polarity and the polarity of the second subpixel column L2 is the first polarity. In this process, whether the display panel 10 has a defect is determined by observing whether each of the sub-pixels of different colors located in the display panel 10 emits light normally.
In the display panel 10 provided in the present embodiment, since the present embodiment sets the polarities of the sub-pixels of the same color to be the same in any row of sub-pixels, therefore, for the sub-pixels of one color, only one test signal line may be provided in this embodiment, and the test signal is provided to the sub-pixels of the same color in any row through this test signal line, as shown in fig. 3, taking the sub-pixels 100 of one color in the first row of sub-pixels as an example, the present embodiment can connect all the sub-pixels 100 in the row to the first test signal line 21, thereby avoiding the problems of the prior art, in the case where at least two test signal lines need to be provided for the same-color sub-pixels due to the different polarities of the same-color sub-pixels, therefore, the phenomenon that the frame of the display panel is too wide due to the fact that the number of the test signal lines is too large is avoided. Therefore, the display panel 10 provided in this embodiment can reduce the number of test signal lines by at least half, which is beneficial to the frame narrowing of the display panel 10.
In addition, for the sub-pixels of the same color, as shown in fig. 3, in any two adjacent rows, the present embodiment may also make the sub-pixels of any one color not be the same polarity at the same time by making the polarity of the sub-pixels of one row opposite to the polarity of the sub-pixels of the other row, and take the sub-pixels 100 of one color as an example, as shown in fig. 3, at the time of the first test time period T1, the polarity of the sub-pixels 100 of the one color in the first sub-pixel column L1 is the first polarity, and the polarity of the sub-pixels 100 of the one color in the second sub-pixel column L2 is the second polarity; then, when a second test period T2 is entered, the test signal U2 of the second polarity is provided to the first test signal line 21, and the test signal U1 of the first polarity is provided to the second test signal line 22, at this time, as shown in fig. 5, fig. 5 is an enlarged schematic diagram of a partial region of the display panel provided in fig. 3 in the second test period; wherein the polarity of the sub-pixel 100 of the color in the first sub-pixel column L1 is the second polarity, and the polarity of the sub-pixel 100 of the color in the second sub-pixel column L2 is the first polarity, that is, at the moment of polarity inversion, the polarity of the portion of the sub-pixel 100 of that color located in the first sub-pixel column L1 is changed from the first polarity to the second polarity, the polarity of the portion of the sub-pixel 100 of that color located in the second sub-pixel column L2 is changed from the second polarity to the first polarity, thereby avoiding the occurrence of flicker phenomena which occurs when sub-pixels of the same color are all changed from one polarity to the other, that is, by using the display panel provided in this embodiment, when performing VT test, not only the frame of the display panel 10 can be narrowed, but also the flicker phenomenon can be avoided, thereby avoiding influencing the judgment of the detection result.
For example, in the present embodiment, when testing the display panel 10, two frames of pictures may be used as a polarity inversion cycle, that is, the first test time period T1 and the second test time period T2 are respectively the display time of two adjacent frames of pictures, for example, when the first frame of pictures is displayed, the first test signal line 21 transmits the test signal U1 of the first polarity, and the second test signal line 22 transmits the test signal U2 of the second polarity; in the second frame display, the first test signal line 21 transmits the test signal U2 of the second polarity, and the second test signal line 22 transmits the test signal U1 of the first polarity. And then the above process is circulated.
It should be noted that the first test signal line 21 and the second test signal line 22 are both connected to a test terminal (VT Pad) (not shown in the figure), and the test signal transmitted on the first test signal line 21 and the second test signal line 22 is provided by the VT Pad. By adopting the scheme provided by the embodiment, by reducing the number of the test signal lines, correspondingly, the number of the VT pads can be correspondingly reduced, and the frame of the display panel 10 can be further narrowed.
Illustratively, as shown in fig. 6, fig. 6 is another enlarged schematic view of a partial area of the display panel provided in fig. 2, where the display panel 10 includes a display area 101 and a non-display area 102 surrounding the display area 101, a plurality of sub-pixels of different colors are located in the display area 101, and the test circuit 20 is located in the non-display area 102. The display panel 10 further includes a driving chip IC and a data driving circuit 30 located in the non-display region 102. After the VT test indicates that there is no defect problem in the sub-pixels of different colors in the display area 101, the present embodiment binds the driving chip IC in the non-display area 102, and uses the driving chip IC to provide data signals to the data driving circuit 30, so that the display area 101 performs normal display operation. With the arrangement, the problem that the sub-pixel is found to be faulty after the driver chip IC is bound can be avoided, so that unnecessary waste of the driver chip IC is reduced. In addition, the data driving circuit 30 and the test circuit 20 are disposed in the non-display area 102 in the present embodiment to avoid affecting the normal display of the display area 101, thereby ensuring the display effect.
Illustratively, as shown in fig. 6, the non-display area 102 includes a first non-display area 1021 on one side of the display area 101 along the column direction y, and the driving chip IC and the data driving circuit 30 are located in the first non-display area 1021.
Optionally, as shown in fig. 6, along the column direction y, the non-display area 102 further includes a second non-display area 1022 located at the other side of the display area 101, the first non-display area 1021 or the second non-display area 1022 is further provided with a gate switch 4 (in fig. 6, the gate switch 4 is provided in the first non-display area 1021 as an example), and the gate switch 4 is connected to the switch control signal terminal 23 and the data driving circuit 30, and is used for controlling the test circuit 20 and the data driving circuit 30 to operate in a time-sharing manner. In the embodiment, the gate switch 4 for controlling the test circuit 20 and the data driving circuit 30 to operate in a time-sharing manner is provided, so as to avoid the situation that the test circuit 20 and the data driving circuit 30 operate simultaneously, and further avoid the phenomenon that the sub-pixels in the display region 101 are short-circuited due to the simultaneous operation of the test circuit 20 and the data driving circuit 30. For example, as shown in fig. 6, if the data driving circuit 30 and the testing circuit 20 operate simultaneously, the two ends of the sub-pixels located in the display area 101 are short-circuited together, which affects the normal light emission of the sub-pixels.
In addition, the present embodiment avoids the problem that the single-sided frame of the display panel 10 is too wide when the test circuit 20 and the data driving circuit 30 are disposed together by disposing the test circuit 20 and the data driving circuit 30 separately. In other words, the present embodiment can make the widths of the frames on both sides of the display area 101 uniform by disposing the data driving circuit 30 and the test circuit 20 in the first non-display area 1021 and the second non-display area 1022, respectively, so that the data driving circuit 30 and the test circuit 20 are separately disposed on both sides of the display area 101.
Specifically, as shown in fig. 6, the data driving circuit 30 includes a plurality of demultiplexing units 301, each demultiplexing unit 301 includes a first driving switching element 3011 and a second driving switching element 3012, a control terminal of the gate switch 4 is connected to the switching control signal terminal 23, a first terminal of the gate switch 4 is connected to the fixed-level terminal 5, and a signal of the fixed-level terminal 5 is the same as the off signal of the first driving switching element 3011 and the second driving switching element 3012; the gate switch 4 has a second terminal connected to a control terminal of the first driving switch element 3011 and a control terminal of the second driving switch element 3012, a first terminal of the first driving switch element 3011 is connected to the first sub-pixel column L1, and a first terminal of the second driving switch element 3012 is connected to the second sub-pixel column L2.
In the operation of the test circuit 20, taking the conducting signals of the first test switch element 241, the second test switch element 242, the first drive switch element 3011, the second drive switch element 3012 and the gate switch 4 as an example, for example, when all the conducting signals are high level, the switch control signal terminal 23 is made to send out a high level signal, at this time, the first test switch element 241 and the second test switch element 242 are turned on, and the signals on the first test signal line 21 and the second test signal line 22 are transmitted to the first subpixel column L1 and the second subpixel column L2, so as to test the subpixels of the above various colors. At this time, since the first end of the gate switch 4 is connected to the fixed-level end 5, and the signal of the fixed-level end 5 is the same as the turn-off signal of the first driving switch component 3011 and the second driving switch component 3012, under the action of the high-level signal sent from the switch control signal end 23, the gate switch 4 is turned on, so that the signal sent from the fixed-level end 5 is transmitted to the control ends of the first driving switch component 3011 and the second driving switch component 3012, and the first driving switch component 3011 and the second driving switch component 3012 are turned off, thereby avoiding the phenomenon that the data driving circuit 30 and the test circuit 20 short-circuit the sub-pixels located in the display area 101.
When the data driving circuit 30 is in operation, taking the same blocking signals of the first test switch element 241 and the second test switch element 242 as an example, for example, when the blocking signals are all at low level, the switch control signal terminal 23 is enabled to send out a low level signal, so that the first test switch element 241 and the second test switch element 242 in the test circuit 20 are disabled, and the signals on the first test signal line 21 and the second test signal line 22 cannot be transmitted to the display area 101; at this time, the driving chip IC supplies the data voltage to the data driving circuit 30, so that the display panel displays normally. Thereby also preventing the occurrence of a phenomenon in which the data driving circuit 30 and the test circuit 20 short-circuit the sub-pixels located in the display area 101.
It should be noted that, as described above, although the driving chip IC is not bound to the display panel during the VT test, the control terminals of the first driving switch component 3011 and the second driving switch component 3012 are connected to the second terminal of the gate switch 4 in this embodiment, so as to avoid the unstable state of the first driving switch component 3011 and the second driving switch component 3012 caused by the suspension of the one ends of the first driving switch component 3011 and the second driving switch component 3012, thereby avoiding the influence on the normal light emission of the sub-pixels located in the display area 101 during the VT test and avoiding the influence on the test result.
Optionally, as shown in fig. 6, the data driving circuit 30 further includes clock signal lines CKH1-CKH4, a control terminal of the first driving switch component 3011 is connected to one of the clock signal lines except the second terminal of the gate switch 4, and a control terminal of the second driving switch component 3012 is connected to the other clock signal line except the second terminal of the gate switch 4. Illustratively, the number of clock signal lines may be the same as or greater than the number of kinds of colors of the sub-pixels. Taking the same number of clock signal lines as the number of kinds of colors of the sub-pixels as an example, as shown in fig. 6, the clock signal line CKH1 and the clock signal line CKH2 are connected to the control terminals of the first driving switch element 3011 and the second first driving switch element 3011, respectively, and the clock signal line CKH3 and the clock signal line CKH4 are connected to the first second driving switch element 3012 and the second driving switch element 3012, respectively. When the data driving circuit 30 is in operation, taking the same blocking signals of the first test switch element 241 and the second test switch element 242 as an example, for example, when the blocking signals are all at low level, the switch control signal terminal 23 is enabled to send out a low level signal, so that the first test switch element 241 and the second test switch element 242 in the test circuit 20 are disabled, and the signals on the first test signal line 21 and the second test signal line 22 cannot be transmitted to the display area 101; at this time, the clock signal line is controlled by the driving chip IC to conduct time-sharing according to the timing sequence shown in fig. 7, for example, fig. 7 is an operation timing sequence diagram of the data driving circuit 30 in fig. 6, so that the data signal of the first polarity and the data signal of the second polarity sent by the driving chip IC are respectively charged to the first sub-pixel column L1 and the second sub-pixel column L2 through the first driving switch element 3011 and the second driving switch element 3012, so as to enable the display panel 10 to display normally, and to avoid the phenomenon that the data driving circuit 30 and the test circuit 20 short-circuit the sub-pixels located in the display region 101.
The following describes a driving method of the data driving circuit 30 of the display panel 10 with reference to fig. 6 and 7:
when the data driving circuit 30 is operating, taking the same example as the off signals of the first test switch element 241 and the second test switch element 242, for example, when the off signals are all at low level, the switch control signal terminal 23 is enabled to send out a low level signal, and the first test switch element 241 and the second test switch element 242 in the test circuit 20 are enabled to be turned off, so that the signals on the first test signal line 21 and the second test signal line 22 cannot be transmitted to the display area 101; still taking the polarity inversion period of the display panel 10 as two frames of pictures, and the display panel 10 is in the first test time period as an example, the first polarity signal terminal S1 of the driver IC outputs the data signal of the first polarity, the second polarity signal terminal S2 outputs the data signal of the second polarity, and any gate line G is connected to the first polarity signal terminal S2iTake the first demultiplexing unit 301 as an example:
in the 1 st period t1, under the action of the control signal output from the clock signal line CKH1, the first and third first driving switch elements 3011 and 3011 connected to the clock signal line CKH1 are turned on, so that the data signal of the first polarity output from the first polarity signal terminal S1 is transmitted to the first column first sub-pixel column L1 and the third column first sub-pixel column L1, i.e., to the first column first sub-pixel column L1 and the gate line G1 mentioned aboveiThe corresponding sub-pixel is charged with the data signal of the first polarity, and the gate line G is connected to the third row, the first sub-pixel row L1iCharging the corresponding sub-pixel with a data signal of a first polarity;
in the 2 nd period t2, under the action of the control signal output from the clock signal line CKH2, the second first driving switch 3011 and the fourth first driving switch 3011 connected to the clock signal line CKH2 are turned on, so that the data signal of the first polarity output from the first polarity signal terminal S1 is transmitted to the second column, the first pixel column L1 and the fourth column, the first sub-pixel column L1, i.e., the second column, the first sub-pixel column L1 and the gate line G1iThe corresponding sub-pixel is charged with the data signal of the first polarity, and the gate line G is connected to the fourth row of the first sub-pixel column L1iCharging the corresponding sub-pixel with a data signal of a first polarity;
in the 3 rd period t3, under the action of the control signal output from the clock signal line CKH3, the first second drive switch 3012 and the third second drive switch 3012 connected to the clock signal line CKH3 are turned on, so that the data signal of the second polarity output from the second polarity signal terminal S2 is transmitted to the first column second sub-pixel column L2 and the third column second sub-pixel column L2, i.e., to the first column second sub-pixel column L2 and the gate line G mentioned aboveiThe corresponding sub-pixel is charged with the data signal of the second polarity, and the gate line G is connected to the third row and the second sub-pixel row L2iCharging the corresponding sub-pixel with a data signal of a second polarity;
in the 4 th period t4, under the action of the control signal output from the clock signal line CKH4, the second drive switch 3012 and the fourth second drive switch 3012 connected to the clock signal line CKH4 are turned on, so that the data signal of the second polarity output from the second polarity signal terminal S2 is transmitted to the second column-second sub-pixel column L2 and the fourth column-second sub-pixel column L2, i.e., to the second column-second sub-pixel column L2 and the gate line G mentioned aboveiThe corresponding sub-pixel is charged with the data signal of the second polarity, and the gate line G is connected to the fourth row, the second sub-pixel row L2iThe corresponding sub-pixel is charged with the data signal of the second polarity.
Then, the gate line G of the next row is scannedi+1The CKH1, CKH2, CKH3 and CKH4 sequentially output control signals in the above order. Until the frame image is displayed. Then, in the second test period T2, the first polarity signal terminal S1 outputs the data signal of the second polarity, and the second polarity signal terminal S2 outputs the data signal of the second polarity, and then, the scanning is continued from the first gate line to the last gate line, and during the on time of each gate line, the operation is continued according to the above timing sequence.
It should be noted that, the above description is only given by taking one demultiplexing unit 301 as an example to describe the operation process of the data driving circuit 30, actually, the clock signal lines CKH1-CKH4 are all connected to a plurality of demultiplexing units 301, and when the data driving circuit 30 operates, the first driving switch component 3011 and the second driving switch component 3012 included in each demultiplexing unit 301 perform corresponding on/off operations according to the above process, which is not described herein again.
In addition, it is understood that the above description is only given by taking the example of including one switch control signal terminal 23, and when there is one switch control signal terminal 23, the types of the first test switch element 241 and the second test switch element 242 need to be consistent, that is, the on signal and the off signal need to be consistent. For example, the first test switching element 241 and the second test switching element 242 are both P-type transistors or N-type transistors. However, in actual setting, the number of the switch control signal terminals 23 may also be set to be multiple, and correspondingly, the types of the first test switch element 241 and the second test switch element 242 may be different, that is, the first test switch element 241 and the second test switch element 242 are respectively controlled by the different switch control signal terminals 23, so as to implement the independent operation of the first test switch element 241 and the second test switch element 242, the principle of which is the same as that of the above-mentioned scheme, and is not described here again.
Similarly, the number of the gate switches 4 may be one or more, and when the number of the gate switches 4 is one, the off signals of the first driving switch element 3011 and the second driving switch element 3012 need to be consistent.
Alternatively, when the number of the pass switches 4 is plural, for example, as shown in fig. 8, fig. 8 is a further enlarged schematic view of a partial area of the display panel provided in fig. 2; the gate switch 4 includes a first gate switch 41 and a second gate switch 42, and the fixed level terminals include a first fixed level terminal 51 and a second fixed level terminal 52, wherein the control terminals of the first gate switch 41 and the second gate switch 42 are both connected to the switch control signal terminal 23, the first terminal of the first gate switch 41 is connected to the first fixed level terminal 51, and the second terminal of the first gate switch 41 is connected to the control terminal of the first driving switch element 3011; the first end of the second gate switch 42 is connected to the second fixed-level end 52, and the second end of the second gate switch 42 is connected to the control end of the second driving switch component 3012, at this time, the conduction signals of the first driving switch 3011 and the second driving switch 3012 may be identical or not.
Specifically, when the on signals of the first drive switch 3011 and the second drive switch 3012 are identical, the level signals of the first fixed-level terminal 51 and the second fixed-level terminal 52 are also kept identical.
When the on signals of the first and second driving switches 3011 and 3012 do not coincide, the level signals of the first and second fixed- level terminals 51 and 52 do not coincide. In this case, the signal from the first fixed-level terminal 51 needs to be the same as the off signal of the first driving switch 3011, and the signal from the second fixed-level terminal 52 needs to be the same as the off signal of the second driving switch 3012, so as to implement the function of time-sharing operation of the test circuit 20 and the data driving circuit 30.
Alternatively, as shown in fig. 9, fig. 9 is another enlarged schematic view of a partial area of the display panel provided in fig. 2. The test circuit 20 may also be located in the first non-display area 1021, and the test circuit 20 is located on a side of the data driving circuit 30 away from the display area 101, at this time, because the test circuit 20 and the data driving circuit 30 are located on the same side of the display area 101, there is no risk that the sub-pixels located in the display area 101 are short-circuited at this time, and with this connection, the VT test circuit 20 may also be used to test whether the data driving circuit 30 can work normally.
Illustratively, as shown in fig. 10, the plurality of different color sub-pixels include a red sub-pixel R, a green sub-pixel G, a blue sub-pixel B, and a highlight sub-pixel X. In this embodiment, the high-brightness sub-pixel X is selected to improve the light transmittance of the display panel 10, so that the power consumption of the display panel is lower when the same brightness image is displayed. Alternatively, the highlight sub-pixel may be a white sub-pixel W or a yellow sub-pixel Y.
As shown in fig. 10, the display panel 10 includes a plurality of pixel units 1, and each pixel unit 1 includes N rows and four columns of sub-pixels, where N is a positive integer greater than or equal to 2. In each pixel unit 1, the first column of sub-pixels comprises a red sub-pixel R and a blue sub-pixel B which are sequentially arranged, and the second column of sub-pixels comprises a green sub-pixel G and a high-brightness sub-pixel X which are sequentially arranged; the third column of sub-pixels includes a blue sub-pixel B and a red sub-pixel R arranged sequentially, and the fourth column of sub-pixels includes a highlight sub-pixel X and a green sub-pixel G arranged sequentially. Therefore, the colors of the four sub-pixels at the intersection points of the sub-pixels of two adjacent rows and two adjacent columns are different from each other, so that the color mixing uniformity of the sub-pixels can be improved, and the display effect is improved.
On this basis, the present embodiment may adopt different polarity arrangements, for example, as shown in fig. 10, in each pixel unit 1, the first column of sub-pixels and the second column of sub-pixels are the first sub-pixel column L1; the third column of subpixels and the fourth column of subpixels are the second subpixel column L2. At this time, the first column of sub-pixels is connected to the first test signal line 21, the second column of sub-pixels is connected to the second first test signal line 21, the third column of sub-pixels is connected to the first second test signal line 22, and the fourth column of sub-pixels is connected to the second test signal line 22.
Alternatively, as shown in fig. 11, fig. 11 is a further enlarged schematic view of a partial area of the display panel provided in fig. 2; the first and fourth columns of sub-pixels are the first sub-pixel column L1, and the second and third columns of sub-pixels are the second sub-pixel column L2. At this time, the sub-pixels of each column and the test signal lines are still connected in the connection manner shown in fig. 10.
The present embodiment further provides a testing method, which is applied to the display panel 10, as shown in fig. 4 and 12, fig. 12 is a schematic flow chart of the testing method, and the testing method includes:
s1: supplying a test signal of a first polarity to the first test signal line 21 and a test signal of a second polarity to the second test signal line 22 for a first test period T1;
s2: in the second test period T2, the test signal of the second polarity is supplied to the first test signal line 21, and the test signal of the first polarity is supplied to the second test signal line 22.
When the testing method provided by this embodiment is used, when testing the sub-pixels located in the display area 101 of the display panel 10, the testing signal of the first polarity may be provided to the first testing signal line 21 and the testing signal of the second polarity may be provided to the second testing signal line 22 in the first testing time period T1, and the testing signal of the second polarity may be provided to the first testing signal line 21 and the testing signal of the first polarity may be provided to the second testing signal line 22 in the second testing time period T2. For the sub-pixels of the same color, as shown in fig. 3, in any two adjacent rows, the present embodiment may also make the sub-pixels of any one color not be the same polarity at the same time by making the polarity of the sub-pixels of one row opposite to the polarity of the sub-pixels of the other row, and take the sub-pixels 100 of one color as an example, for example, as shown in fig. 3, during the first test period T35 1, at this time, the polarity of the sub-pixels 100 of the one color in the first sub-pixel column L1 is the first polarity, and the polarity of the sub-pixels 100 of the one color in the second sub-pixel column L2 is the second polarity; then, when a second test period T2 is entered, the test signal U2 of the second polarity is provided to the first test signal line 21, and the test signal U1 of the first polarity is provided to the second test signal line 22, at this time, as shown in fig. 5, fig. 5 is an enlarged schematic diagram of a partial region of the display panel provided in fig. 3 in the second test period; the polarity of the sub-pixel 100 of the color in the first sub-pixel column L1 is the second polarity, the polarity of the sub-pixel 100 of the color in the second sub-pixel column L2 is the first polarity, that is, at the moment of polarity inversion, the polarity of the portion of the sub-pixel 100 of the color in the first sub-pixel column L1 is changed from the first polarity to the second polarity, and the polarity of the portion of the sub-pixel 100 of the color in the second sub-pixel column L2 is changed from the second polarity to the first polarity, so that the occurrence of the flicker phenomenon caused by the fact that all the sub-pixels of the same color are changed from one polarity to another polarity is avoided.
Illustratively, the first polarity is opposite to the second polarity, so that the sub-pixels respectively operate at opposite polarities to prevent polarization of the liquid crystal material constituting the sub-pixels.
In addition, the specific implementation of the method for testing the display panel has been described in detail in the foregoing embodiments, and is not described herein again.
As shown in fig. 12, fig. 12 is a schematic structural diagram of a display device provided in the embodiment of the present invention, and the display device 500 includes the display panel 10. The specific structure, the driving method and the testing method of the display panel 10 have been described in detail in the above embodiments, and are not described herein again. Of course, the display device shown in fig. 12 is only a schematic illustration, and the display device may be any electronic device with a display function, such as a mobile phone, a tablet computer, a notebook computer, an electronic book, or a television.
Since the display apparatus 500 provided by the present embodiment includes the display panel 10 as shown above, also, the present embodiment sets the polarities of the same color sub-pixels to be the same in any row of sub-pixels, and therefore, for the sub-pixels of one color, only one test signal line may be provided in this embodiment, and the test signal is provided to the sub-pixels of the same color in any row through this test signal line, as shown in fig. 3, taking the sub-pixels 100 of one color in the first row of sub-pixels as an example, the present embodiment can connect all the sub-pixels 100 in the row to the first test signal line 21, thereby avoiding the problems of the prior art, in the case where at least two test signal lines need to be provided for the same-color sub-pixels due to the different polarities of the same-color sub-pixels, therefore, the phenomenon that the frame of the display panel is too wide due to the fact that the number of the test signal lines is too large is avoided. Therefore, the display panel 10 provided in this embodiment can reduce the number of the test signal lines by at least half, which is beneficial to the frame narrowing of the display panel 10, and is beneficial to the frame narrowing of the display device 500.
In addition, for the sub-pixels of the same color, as shown in fig. 3, in any two adjacent rows, the present embodiment may also make the sub-pixels of any one color not be the same polarity at the same time by making the polarity of the sub-pixels of one row opposite to the polarity of the sub-pixels of the other row, and take the sub-pixels 100 of one color as an example, as shown in fig. 3, at the time of the first test time period T1, the polarity of the sub-pixels 100 of the one color in the first sub-pixel column L1 is the first polarity, and the polarity of the sub-pixels 100 of the one color in the second sub-pixel column L2 is the second polarity; then, when a second test period T2 is entered, the test signal U2 of the second polarity is provided to the first test signal line 21, and the test signal U1 of the first polarity is provided to the second test signal line 22, at this time, as shown in fig. 5, fig. 5 is an enlarged schematic diagram of a partial region of the display panel provided in fig. 3 in the second test period; wherein the polarity of the sub-pixel 100 of the color in the first sub-pixel column L1 is the second polarity, and the polarity of the sub-pixel 100 of the color in the second sub-pixel column L2 is the first polarity, that is, at the moment of polarity inversion, the polarity of the portion of the sub-pixel 100 of that color located in the first sub-pixel column L1 is changed from the first polarity to the second polarity, the polarity of the portion of the sub-pixel 100 of that color located in the second sub-pixel column L2 is changed from the second polarity to the first polarity, thereby avoiding the occurrence of flicker phenomena which occurs when sub-pixels of the same color are all changed from one polarity to the other, that is, the display panel provided in this embodiment is adopted, when the VT test is performed, not only the frame of the display device 500 can be narrowed, but also the flicker phenomenon can be avoided, thereby avoiding influencing the judgment of the detection result.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (15)
1. A display panel, comprising a plurality of different color sub-pixels; the sub-pixels of the plurality of different colors comprise a first sub-pixel column and a second sub-pixel column, and the polarities of the first sub-pixel column and the second sub-pixel column are different; in any row of the sub-pixels, the polarities of the sub-pixels of the same color are the same; for the sub-pixels of the same color, in any two adjacent rows, the polarity of the sub-pixels positioned in one row is opposite to that of the sub-pixels positioned in the other row;
the display panel further comprises a test circuit; the test circuit comprises a first test signal line, a second test signal line, a switch control signal end and a plurality of groups of test switch units; each group of the test switch units comprises a first test switch element and a second test switch element; the polarities of the output signals of the first test signal line and the second test signal line are opposite;
the number of the first test signal lines is the same as that of the first test switch elements in each group of the test switch units, and the number of the second test signal lines is the same as that of the second test switch elements in each group of the test switch units; the sum of the number of the first test signal lines and the number of the second test signal lines is equal to the number of the types of the colors of the sub-pixels;
in each group of test switch units, the control end of the first test switch element is connected to the switch control signal end, and the first end of the first test switch element is connected with the first test signal line in a one-to-one correspondence manner; a second end of the first test switch element is connected with the first sub-pixel column;
the control end of the second test switch element is connected to the switch control signal end, the first end of the second test switch element is connected with the second test signal line in a one-to-one correspondence manner, and the second end of the second test switch element is connected with the second sub-pixel column;
the display panel comprises a plurality of pixel units, and each pixel unit comprises N rows and four columns of the sub-pixels; wherein N is a positive integer greater than or equal to 2; in any row of the sub-pixels, the four sub-pixels belonging to the same pixel unit have different colors; a group of the test switch units are electrically connected with one pixel unit; in one group of the test switch units, the number of the first test switch elements is two, and the number of the second test switch elements is two.
2. The display panel according to claim 1, wherein the display panel comprises a display area and a non-display area surrounding the display area; the sub-pixels of a plurality of different colors are positioned in the display area; the test circuit is positioned in the non-display area; the display panel further comprises a driving chip and a data driving circuit which are positioned in the non-display area.
3. The display panel according to claim 2, wherein the non-display region includes a first non-display region on a side of the display region in a column direction; the driving chip and the data driving circuit are located in the first non-display area.
4. The display panel according to claim 3, wherein the non-display area further includes a second non-display area on the other side of the display area in the column direction, the test circuit being located in the second non-display area;
and the first non-display area or the second non-display area is also provided with a gating switch, and the gating switch is connected with the switch control signal end and the data driving circuit and is used for controlling the test circuit and the data driving circuit to work in a time-sharing manner.
5. The display panel according to claim 4, wherein the data driving circuit includes a plurality of demultiplexing units; each of the branching units includes a first driving switching element and a second driving switching element;
the control end of the gating switch is connected to the switch control signal end; the first end of the gating switch is connected to the fixed level end; a signal of the fixed level terminal is the same as a turn-off signal of the first driving switching element and the second driving switching element; a second terminal of the gate switch is connected to a control terminal of the first driving switching element and a control terminal of the second driving switching element;
the first end of the first driving switch element is connected to the first sub-pixel column, and the first end of the second driving switch element is connected to the second sub-pixel column.
6. The display panel according to claim 5, wherein the data driving circuit further comprises a clock signal line; the control end of the first driving switch element is also connected to the clock signal line, and the control end of the second driving switch element is also connected to the clock signal line.
7. The display panel according to claim 3, wherein the test circuit is located in the first non-display area, and the test circuit is located on a side of the data driving circuit away from the display area.
8. The display panel of claim 1, wherein the plurality of different colored subpixels comprise a red subpixel, a green subpixel, a blue subpixel, and a highlight subpixel.
9. The display panel according to claim 8, wherein in each of the pixel units, a first column of the sub-pixels comprises the red sub-pixel and the blue sub-pixel arranged sequentially; the second column of the sub-pixels comprises the green sub-pixels and the high-brightness sub-pixels which are sequentially arranged; a third column of the subpixels comprising the blue subpixels and the red subpixels arranged sequentially; and the fourth column of the sub-pixels comprises the high-brightness sub-pixel and the green sub-pixel which are sequentially arranged.
10. The display panel according to claim 9, wherein in each of the pixel units, a first column of the sub-pixels and a second column of the sub-pixels are the first column of sub-pixels; the third column of the subpixels and the fourth column of the subpixels are the second subpixel column.
11. The display panel according to claim 9, wherein in each of the pixel units, a first column of the sub-pixels and a fourth column of the sub-pixels are the first sub-pixel column; a second column of the subpixels and a third column of the subpixels are the second subpixel column.
12. The display panel of claim 8, wherein the highlight sub-pixel is a white sub-pixel or a yellow sub-pixel.
13. A testing method applied to the display panel according to any one of claims 1 to 12, comprising:
providing a test signal of a first polarity to the first test signal line and a second polarity signal to the second test signal line during a first test period;
and in a second test time period, providing a test signal of a second polarity to the first test signal line and providing a test signal of a first polarity to the second test signal line.
14. The method of claim 13, wherein the first polarity signal is opposite in polarity to the second polarity signal.
15. A display device comprising the display panel according to any one of claims 1 to 12.
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| CN109192115B (en) * | 2018-09-12 | 2021-09-21 | 昆山龙腾光电股份有限公司 | Detection circuit and liquid crystal display device |
| CN109727563B (en) * | 2019-01-30 | 2021-06-25 | 武汉华星光电半导体显示技术有限公司 | Lower narrow frame display panel |
| CN209199077U (en) | 2019-02-14 | 2019-08-02 | 京东方科技集团股份有限公司 | A kind of touch-control display panel and display device |
| CN110246444B (en) * | 2019-06-19 | 2023-05-30 | 京东方科技集团股份有限公司 | Pixel circuit, testing method thereof and display device |
| CN110910803B (en) * | 2019-12-24 | 2022-11-22 | 厦门天马微电子有限公司 | Display panel, detection method thereof and display device |
| WO2021134753A1 (en) * | 2020-01-02 | 2021-07-08 | 京东方科技集团股份有限公司 | Display apparatus and driving method therefor |
| CN111627367B (en) * | 2020-06-30 | 2023-03-10 | 武汉天马微电子有限公司 | Detection circuit and method of display panel and display panel |
| CN112289243A (en) * | 2020-11-30 | 2021-01-29 | 上海天马有机发光显示技术有限公司 | Display panel, preparation method thereof and display device |
| CN113109955B (en) * | 2021-04-14 | 2023-03-31 | 京东方科技集团股份有限公司 | Display substrate, display device and detection method |
| CN113223433A (en) * | 2021-05-19 | 2021-08-06 | Oppo广东移动通信有限公司 | Display panel, test method and test system thereof and display equipment |
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| JP2014032322A (en) * | 2012-08-03 | 2014-02-20 | Kyocera Display Corp | Liquid crystal display device and wiring inspection method |
| CN102944945B (en) * | 2012-11-22 | 2015-05-27 | 深圳市华星光电技术有限公司 | Detection method for liquid crystal display panel |
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