CN108321206A - LDMOS device and its manufacturing method - Google Patents
LDMOS device and its manufacturing method Download PDFInfo
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- CN108321206A CN108321206A CN201810178634.4A CN201810178634A CN108321206A CN 108321206 A CN108321206 A CN 108321206A CN 201810178634 A CN201810178634 A CN 201810178634A CN 108321206 A CN108321206 A CN 108321206A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 112
- 229920005591 polysilicon Polymers 0.000 claims abstract description 110
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 107
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 107
- 239000001301 oxygen Substances 0.000 claims abstract description 107
- 230000003647 oxidation Effects 0.000 claims abstract description 39
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 39
- 238000000034 method Methods 0.000 claims abstract description 26
- 210000003323 beak Anatomy 0.000 claims abstract description 21
- 230000005684 electric field Effects 0.000 claims abstract description 11
- 230000008569 process Effects 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims description 22
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 19
- 239000004065 semiconductor Substances 0.000 claims description 19
- 229910052710 silicon Inorganic materials 0.000 claims description 19
- 239000010703 silicon Substances 0.000 claims description 19
- 238000006396 nitration reaction Methods 0.000 claims description 12
- 238000002347 injection Methods 0.000 claims description 11
- 239000007924 injection Substances 0.000 claims description 11
- 238000000407 epitaxy Methods 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 7
- 230000015572 biosynthetic process Effects 0.000 claims description 6
- 239000000126 substance Substances 0.000 claims description 4
- 238000011049 filling Methods 0.000 claims description 3
- 238000002955 isolation Methods 0.000 claims description 3
- 238000000137 annealing Methods 0.000 claims description 2
- 238000003701 mechanical milling Methods 0.000 claims description 2
- 230000002035 prolonged effect Effects 0.000 claims 1
- 230000015556 catabolic process Effects 0.000 abstract description 13
- 230000009467 reduction Effects 0.000 abstract description 2
- 230000006872 improvement Effects 0.000 description 14
- 238000010586 diagram Methods 0.000 description 8
- 239000002184 metal Substances 0.000 description 6
- 229920002120 photoresistant polymer Polymers 0.000 description 5
- 238000000926 separation method Methods 0.000 description 4
- 241000293849 Cordylanthus Species 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66681—Lateral DMOS transistors, i.e. LDMOS transistors
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
The invention discloses a kind of LDMOS devices, drift region oxygen is the integrally formed structure being formed by stacking by main part and bottom part, in drift region, the first epi-layer surface of the forming region of oxygen is formed with the second epitaxial layer or the second polysilicon layer, carries out oxidation to the second epitaxial layer or the second polysilicon layer and form main part and carry out oxidation to the first epitaxial layer of main part bottom simultaneously to form bottom part；Bottom part can form a beak to reduce the electric field strength of gate dielectric layer and the drift region contact positions Chang Yang；Main part can guarantee the overall thickness of drift region oxygen and the thickness of reduction bottom part made to reduce.The invention also discloses a kind of manufacturing methods of LDMOS device.The present invention can improve the breakdown voltage of device, reduce the conducting resistance and OFF leakage current of device, also have the advantages that simple for process.
Description
Technical field
The present invention relates to semiconductor integrated circuit manufacturing fields, more particularly to a kind of LDMOS device；The invention further relates to
A kind of manufacturing method of LDMOS device.
Background technology
Double-diffusion metal-oxide-semiconductor field effect transistor (Double-diffused MOS) is due to having pressure-resistant original text, greatly
It the features such as current driving ability and extremely low power dissipation, is widely adopted in electric power management circuit at present.DMOS includes vertical double expansions
Dispersed metallic oxide semiconductor field effect pipe (VDMOS) and LDMOS (LDMOS), in LDMOS device, conducting resistance is one
Important index.In BCD techniques, although LDMOS and CMOS is integrated in same chip, due to high voltage and low feature electricity
The requirement of resistance and conducting resistance, LDMOS is before the condition of background device area and drift region and the existing process conditions of CMOS are shared
It puts, there are contradictions and compromise with breakdown voltage (BV) for conducting resistance, often cannot be satisfied the requirement of switching tube application, conducting
Resistance generally use featured resistance (Rsp) indicates.Therefore identical breakdown voltage (offBV) is being obtained, should reduced as possible
Rsp is to improve the competitiveness of product.
As shown in Figure 1, being the structural schematic diagram of the first existing LDMOS device；By taking N-type device as an example, it is existing the first
LDMOS device includes：
First epitaxial layer 2 of N-type is formed with drift region 4 and the N of p-type in the selection area of first epitaxial layer 2
The areas Xing Ti 5；The drift region 4 and 5 lateral isolation of body area have distance.
It is formed with the first buried layer 1 of p-type heavy doping in the bottom of first epitaxial layer 2；First buried layer 1 is formed in
Semiconductor substrate surface.In general, the semiconductor substrate is silicon substrate, first epitaxial layer 2 is silicon epitaxy layer.
It is formed in the selection area of the drift region 4 by drift region oxygen 3.
The grid being formed by stacking by gate dielectric layer such as gate oxide 6 and polysilicon gate 7 is formed on the surface in the body area 5
Structure is used to form raceway groove by 5 surface of body area that the polysilicon gate 7 covers.
First side of the second side of the gate dielectric layer 6 and the drift region oxygen 3 is in contact, the polysilicon gate 7
The second side extends on the surface of the drift region oxygen 3.
Source region 8a is formed in 5 surface of body area and the second side of the source region 8a and the first side of the polysilicon gate 7
Autoregistration.
Drain region 8b is formed in the second of in the drift region 4 and the first side of the drain region 8b and the drift region oxygen 3
Side autoregistration.
It is also formed with the body draw-out area 9 of N-type heavy doping, the body draw-out area 9 and the source region on the surface in the body area 5
The side of the first side of 8a is in contact.The body draw-out area 9 and the source region 8a can be connected to by identical contact hole by just
The source electrode of face metal layer composition.
Drain region 8b can then be connected to the drain electrode being made of front metal layer by contact hole, and polysilicon gate 7 then can be by connecing
Contact hole is connected to the grid being made of front metal layer.
In Fig. 1, the drift region oxygen 3 is the structure for the certain depth for being recessed into the first epitaxial layer 2, in general, the drift
Area oxygen 3 is moved to be formed using shallow ditch groove separation process (STI) or using location oxidation of silicon process (LOCOS).Wherein, using STI works
Skill forms the step of drift region oxygen 3 and includes：A) silicon is performed etching to form shallow trench, b) thermal oxide is carried out in shallow ridges
Rooved face forms oxide layer, c) oxide layer filling, d are carried out to groove) form the drift region oxygen 3 through chemical mechanical grinding.
And LOCOS techniques are to carry out oxidation by the silicon to part to form the drift region oxygen 3.In STI and LOCOS techniques, institute
It is thicker to state drift region field oxygen 3, is more conducive to the OffBV for improving device and reduces OFF leakage current (Ioff), but be more unfavorable for
The reduction of the Rsp of device.On the contrary, the drift region oxygen 3 is thinner, Rsp is more advantageously reduced, but OffBV can be caused to reduce
And electric leakage Ioff increases.
Fig. 2 is the structural schematic diagram of existing second of LDMOS device；With the difference of the first existing structure shown in FIG. 1
Place is to have following feature in existing second of LDMOS device：
In Fig. 2, drift region oxygen 3a is formed in the structure of the surface of the first epitaxial layer 2, the drift region oxygen 3a
It is formed using oxide layer deposit plus lithographic etch process.When the shortcomings that existing second of LDMOS is high voltage, it is easy to be situated between in grid
Matter layer 6 and the drift region junctions Chang Yang3a form high electric field, therefore breakdown is frequently experienced in the junction.In order to avoid this existing
As, it has to widen the lateral dimension of device.But widening lateral dimension can cause the Rsp of device to increase rapidly.
Invention content
Technical problem to be solved by the invention is to provide a kind of LDMOS devices, can improve the breakdown voltage of device, reduce
The conducting resistance and OFF leakage current of device.For this purpose, the present invention also provides a kind of manufacturing methods of LDMOS device.
In order to solve the above technical problems, LDMOS device provided by the invention includes：
First epitaxial layer of the second conduction type is formed with the first conductive-type in the selection area of first epitaxial layer
The body area of the drift region of type and the second conduction type；Laterally contact or isolation have distance for the drift region and the body area.
It is formed in the selection area of the drift region by drift region oxygen.
It is formed with the gate structure being formed by stacking by gate dielectric layer and polysilicon gate on the surface in the body area, by described more
The body surface of crystal silicon grid covering is used to form raceway groove.
First side of the second side of the gate dielectric layer and the drift region oxygen is in contact, and the second of the polysilicon gate
Side extends on the surface of the drift region oxygen.
Source region is formed in the second side of the body surface and the source region and the first side autoregistration of the polysilicon gate.
Drain region is formed in first side in the drift region and drain region and the second side of the drift region oxygen from right
It is accurate.
The drift region oxygen is the integrally formed structure being formed by stacking by main part and bottom part, in the drift
First epi-layer surface of the forming region of area oxygen is formed with the second epitaxial layer or the second polysilicon layer, the main part
Divide and formed by carrying out local oxidation to second epitaxial layer or the second polysilicon layer, the bottom part is then right simultaneously
Second epitaxial layer or first epitaxial layer of the second polysilicon layer bottom carry out local oxidation and are formed.
The bottom part forms a beak in the first side of the drift region oxygen and makes the gate dielectric layer and institute
The beak contact for stating the first side of drift region oxygen, reduces the electric-field strength of the gate dielectric layer and the contact positions the drift region Chang Yang
Degree.
Described in the main part is used to reduce under conditions of ensureing that the overall thickness of the drift region oxygen remains unchanged
The thickness of bottom part is used to the distance between the bottom for reducing the drift region oxygen and first epi-layer surface
To reduce the conducting resistance of device.
A further improvement is that be formed with the first conduction type heavy doping in the bottom of first epitaxial layer first buries
Layer；First buried layer is formed in semiconductor substrate surface.
A further improvement is that the semiconductor substrate is silicon substrate, first epitaxial layer is silicon epitaxy layer.
A further improvement is that the corresponding local oxidation technique of the bottom part is to first epitaxial layer
Consumption is
A further improvement is that the thickness of the main part is
A further improvement is that the gate dielectric layer is gate oxide.
A further improvement is that it is also formed with the body draw-out area of the second conduction type heavy doping on the surface in the body area,
The side of the body draw-out area and the first side of the source region is in contact.
A further improvement is that LDMOS is N-type device, the first conduction type is N-type, and the second conduction type is P types；Or
Person, LDMOS are P-type device, and the first conduction type is p-type, and the second conduction type is N-type.
In order to solve the above technical problems, the manufacturing method of LDMOS device provided by the invention includes the following steps：
Step 1: providing the first epitaxial layer of the second conduction type.
Step 2: sequentially forming the first oxide layer and the second nitration case, lithographic definition on the surface of first epitaxial layer
The forming region for going out drift region oxygen, by second nitration case of the forming region of the drift region oxygen and first oxygen
Change layer to remove and form the first opening for exposing first epi-layer surface.
Step 3: filling the second epitaxial layer or the second polysilicon layer in first opening；To carrying out local oxidation
Second epitaxial layer or the second polysilicon layer are aoxidized to the main part to form the drift region oxygen, the local oxidation
First epitaxial layer of second epitaxial layer or the second polysilicon layer bottom is aoxidized simultaneously to form the drift region oxygen
Bottom part.
Step 4: drift is formed in the selection area of first epitaxial layer using the first conductive type ion injection technology
Area is moved, the drift region oxygen is located in the subregion of the drift region.
Step 5: sequentially forming gate dielectric layer and the first polysilicon layer.
Step 6: the lateral location that first time lithographic definition goes out the first side of polysilicon gate is carried out, successively to described first
Polysilicon layer and the gate dielectric layer perform etching the side for the first side to form the polysilicon gate and by the polysilicon gates
The first side side outside first epi-layer surface expose.
Step 7: carrying out forming body area using the second conductive type ion injection technology, the body area is located at the polycrystalline
In first epitaxial layer outside the side of first side of Si-gate, the body area extends to the of the polysilicon gate after annealing
The bottom of side is used to form raceway groove by the body surface that the polysilicon gate covers.
Step 8: the lateral location that second of lithographic definition goes out the second side of polysilicon gate is carried out, to first polycrystalline
Silicon layer performs etching the side for the second side to form the polysilicon gate and forms the polysilicon gate, by the gate dielectric layer and
The polysilicon gate is superimposed to form gate structure；First side of the second side of the gate dielectric layer and the drift region oxygen connects
It touches, the second side of the polysilicon gate extends on the surface of the drift region oxygen.
Step 9: carrying out the injection of the first conduction type heavy doping ion is formed simultaneously source region and drain region, source region is formed in institute
State the second side of body surface and the source region and the first side autoregistration of the polysilicon gate；Drain region is formed in the drift region
In and first side and the drift region oxygen in the drain region the second side autoregistration.
The bottom part forms a beak in the first side of the drift region oxygen and makes the gate dielectric layer and institute
The beak contact for stating the first side of drift region oxygen, reduces the electric-field strength of the gate dielectric layer and the contact positions the drift region Chang Yang
Degree.
Described in the main part is used to reduce under conditions of ensureing that the overall thickness of the drift region oxygen remains unchanged
The thickness of bottom part is used to the distance between the bottom for reducing the drift region oxygen and first epi-layer surface
To reduce the conducting resistance of device.
A further improvement is that being formed with the first conduction type heavy doping in the bottom of first epitaxial layer in step 1
The first buried layer；First buried layer is formed in semiconductor substrate surface.
A further improvement is that the semiconductor substrate is silicon substrate, first epitaxial layer is silicon epitaxy layer.
A further improvement is that the corresponding local oxidation technique of bottom part described in step 2 is to described first
The consumption of epitaxial layer is
A further improvement is that when the second epitaxial layer described in step 3 or the second polysilicon layer are entirely epitaxial layer, lead to
It crosses selective epitaxial process second epitaxial layer or the second polysilicon layer are filled in first opening.
When second epitaxial layer described in step 3 or the second polysilicon layer include polysilicon, formed outside described second in deposit
After prolonging layer or the second polysilicon layer, first opening is filled and is extended to by second epitaxial layer or the second polysilicon layer
The surface of second nitration case outside first opening, chemical mechanical grinding is carried out by stop-layer of second nitration case
Technique by it is described first opening outside second epitaxial layer or the second polysilicon layer grind away and make second epitaxial layer or
Second polysilicon layer is ground to equal with the top surface of the first opening.
A further improvement is that the thickness of the main part is
A further improvement is that further including step after step 9：
Step 10: the surface formation body draw-out area that the second conduction type heavy doping ion is infused in the body area is carried out, institute
The side for stating body draw-out area and the first side of the source region is in contact.
The present invention has done the structure of drift region oxygen and has targetedly designed, and predominantly drift region oxygen is by the present invention
It integrally formed structure and is improved on the basis of existing local oxidation layer, drift region of the invention oxygen is not
Completely by carrying out oxidation formation to corresponding first epitaxial layer in drift region, but the present invention is in the forming region of drift region oxygen
The surface of the first epitaxial layer be initially formed the second epitaxial layer or the second polysilicon layer, carry out local oxidation later and formed, in this way
The main part of the drift region oxygen of formation is to be located on the first epitaxial layer and be by the second epitaxial layer or the second polysilicon layer
It aoxidizes；And the first epitaxial layer is due to positioned at the bottom of the second epitaxial layer or the second polysilicon layer, therefore in the first epitaxial layer
The slow and only relatively thin thickness of oxidation rate is aoxidized and is formed the bottom part of drift region oxygen, passes through bottom part and main body
Partial superposition makes the present invention have following overall effect：
The bottom part of the present invention has beak structure, in the case of with bottom part, gate dielectric layer meeting and drift
The beak contact for moving the first side of area oxygen can reduce the electric field of the contact position of gate dielectric layer and drift region oxygen by beak
Intensity, so as to improve the breakdown voltage of device, namely relative to existing structure shown in Fig. 2, more one of the present invention has
The bottom part of beak can improve the breakdown voltage of device.
In addition, the thickness of the drift region oxygen of the present invention is mainly determined by main part, thicker drift region oxygen energy
The OFF leakage current of device can be reduced.
In addition, the oxidation rate of the bottom part of the present invention is relatively slow and recessed with relatively thin thickness namely drift region oxygen
The thickness entered to the part in the first epitaxial layer is smaller, and relative to existing structure shown in FIG. 1, the present invention can be so that drift region electricity
The path that stream passes through shortens, and can reduce the conducting resistance of device.
In addition, the main part and bottom part of the drift region oxygen of the present invention are using local oxidation technique while shape
At, it is only necessary to increase to increase in the regional area of field oxidation before field oxidation and forms the second epitaxial layer or the second polysilicon layer
Step, therefore the present invention's is simple for process, cost is relatively low.
So the present invention can improve the breakdown voltage of device, device can be reduced under conditions of breakdown voltage is guaranteed
Conducting resistance and OFF leakage current, also have the advantages that simple for process.
Description of the drawings
The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments：
Fig. 1 is the structural schematic diagram of the first existing LDMOS device；
Fig. 2 is the structural schematic diagram of existing second of LDMOS device；
Fig. 3 is the structural schematic diagram of LDMOS device of the embodiment of the present invention；
Fig. 4 A- Fig. 4 E are the device architecture schematic diagrames in each step of the manufacturing method of LDMOS device of the embodiment of the present invention.
Specific implementation mode
As shown in figure 3, being the structural schematic diagram of LDMOS device of the embodiment of the present invention；LDMOS device packet of the embodiment of the present invention
It includes：
First epitaxial layer 102 of the second conduction type, first is formed in the selection area of first epitaxial layer 102
The drift region 104 of conduction type and the body area 105 of the second conduction type；The drift region 104 and the body area 105 laterally every
With a distance from having.Also can be in other embodiments：The drift region 104 and the laterally contact of the body area 105.
In the embodiment of the present invention, the of the first conduction type heavy doping is formed in the bottom of first epitaxial layer 102
One buried layer 101；First buried layer 101 is formed in semiconductor substrate surface.Preferably, the semiconductor substrate is silicon substrate,
First epitaxial layer 102 is silicon epitaxy layer.
It is formed in the selection area of the drift region 104 by drift region oxygen 103.
The grid knot being formed by stacking by gate dielectric layer 106 and polysilicon gate 107 is formed on the surface in the body area 105
Structure is used to form raceway groove by 105 surface of body area that the polysilicon gate 107 covers.Preferably, the gate dielectric layer 106
For gate oxide.
First side of the second side of the gate dielectric layer 106 and the drift region oxygen 103 is in contact, the polysilicon gate
107 the second side extends on the surface of the drift region oxygen 103.
Source region 108a is formed in 105 surface of body area and the second side and the polysilicon gate 107 of the source region 108a
The first side autoregistration.
Drain region 108b is formed in the drift region 104 and the first side of the drain region 108b and the drift region oxygen
103 the second side autoregistration.
It is also formed with the body draw-out area 109 of the second conduction type heavy doping on the surface in the body area 105, the body is drawn
The side of area 109 and the first side of the source region 108a is in contact.The body draw-out area 109 and the source region 108a can pass through
Identical contact hole is connected to the source electrode being made of front metal layer.
Drain region 108b can then be connected to the drain electrode being made of front metal layer by contact hole, and polysilicon gate 107 can then lead to
It crosses contact hole and is connected to the grid being made of front metal layer.
The drift region oxygen 103 is the integrally formed knot being formed by stacking by main part 1031 and bottom part 1032
Structure, in the drift region, 102 surface of the first epitaxial layer of the forming region of oxygen 103 is formed with the second epitaxial layer or second
Polysilicon layer 112, the main part 1031 to second epitaxial layer or the second polysilicon layer 112 by carrying out local field
Oxidation is formed, and the bottom part 1032 is simultaneously then to described in 112 bottom of second epitaxial layer or the second polysilicon layer
First epitaxial layer 102 carries out local oxidation and is formed.Second epitaxial layer or the second polysilicon layer 112 please refer to Fig.4 B institutes
Show.
The bottom part 1032 forms a beak in the first side of the drift region oxygen 103 and makes the gate medium
The beak contact of first side of layer 106 and the drift region oxygen 103, reduces the gate dielectric layer 106 and the drift region
The electric field strength of 103 contact position of oxygen.
The main part 1031 is used to subtract under conditions of ensureing that the overall thickness of the drift region oxygen 103 remains unchanged
The thickness of few bottom part 1032, to the bottom for reducing the drift region oxygen 103 and 102 table of the first epitaxial layer
The distance between face, to reduce the conducting resistance of device.
Preferably, the corresponding local oxidation technique of the bottom part 1032 is to first epitaxial layer 102
Consumption isNamely the bottom part can be obtained by the consumption to first epitaxial layer 102
1032 thickness.
The bottom part 1032 in the embodiment of the present invention is used for relative in other regions every the field for going out active area
The thickness of oxygen greatly reduces, and is the local field oxygen (Mini-LOCOS) of a scaled down version.
The thickness of the main part 1031 is
In the embodiment of the present invention, LDMOS is N-type device, and the first conduction type is N-type, and the second conduction type is P types, institute
Semiconductor substrate is stated to adulterate for p-type.Also can be in other embodiments：LDMOS is P-type device, and the first conduction type is p-type,
Second conduction type is N-type.
LDMOS device of the embodiment of the present invention can be integrated in BCD techniques.From the foregoing, it will be observed that, drift different from existing technique
Shifting area oxygen 103 is one by upper and lower structure dimerous.Bottom part 1032 is by the table to the first epitaxial layer 102
The implementation partial thermal oxidation in face forms a very shallow Mini-LOCOS, and meetings of the Mini-LOCOS at both ends forms small and short
Beak (bird ' s beak), short beak does not interfere with the thickness of gate dielectric layer 106.Shallow Mini-LOCOS can shorten
Current path, that is, be substantially reduced the Rsp of device, and 106 He of gate dielectric layer under high voltage state can be obviously reduced in the beak of LOCOS
The electric field of the drift region junctions Chang Yang103, therefore the breakdown voltage of device can be improved.Main part 1031 is then arranged in bottom
On part 1032 and it is also to be formed by local field oxygen, that is, partial thermal oxidation, but main part 1031 is not to outside first
The oxidation for prolonging layer 102 is formed, but second epitaxial layer or the second polysilicon to being formed positioned at 102 surface of the first epitaxial layer
The oxidation of layer 112 is formed, and the purpose of main part 1031 is to thicken the thickness of entire drift region oxygen 103 to improve device
The thickness of breakdown voltage (OffBV), the field oxygen zone that wherein Mini-LOCOS is formed cannot be too thick, too thick to obviously increase
Rsp, but the thickness of drift region oxygen 103 cannot be too thin, it is too thin to reduce OffBV, so the embodiment of the present invention passes through main body
The setting of part 1031 can form thicker drift region oxygen 103 under conditions of ensureing that bottom part 1032 is relatively thin.As before
Described, the effect of Mini-LOCOS is to form a bird ' s beak in gate dielectric layer 106 and the drift region junctions Chang Yang103
To reduce the electric field of junction, the breakdown voltage (BV) of device is improved, which wants compared to the existing LOCOS beaks formed
It is small and short, therefore energy device architecture of the embodiment of the present invention can reduce the Rsp of device, improve the performance of device；It is emulated also really
It can prove that the embodiment of the present invention can reduce the Rsp of device under the premise of ensureing breakdown voltage in fact.
As shown in Fig. 4 A to Fig. 4 E, be the manufacturing method of LDMOS device of the embodiment of the present invention each step in device junction
The manufacturing method of structure schematic diagram, LDMOS device of the embodiment of the present invention includes the following steps：
Step 1: as shown in Figure 4 A, providing the first epitaxial layer 102 of the second conduction type.
In present invention method, the first conduction type heavy doping is formed in the bottom of first epitaxial layer 102
The first buried layer 101；First buried layer 101 is formed in semiconductor substrate surface.
Preferably, the semiconductor substrate is silicon substrate, and first epitaxial layer 102 is silicon epitaxy layer.
Step 2: as shown in Figure 4 A, the first oxide layer 110 and the are sequentially formed on the surface of first epitaxial layer 102
Nitride layer 111, lithographic definition go out the forming region of drift region oxygen 103, by the forming region of the drift region oxygen 103
Second nitration case 111 and first oxide layer 110 remove and formed and expose 102 surface of the first epitaxial layer
First opening.
Step 3: as shown in Figure 4 B, the second epitaxial layer or the second polysilicon layer 112 are filled in first opening.
In the embodiment of the present invention, second epitaxial layer or the second polysilicon layer 112 are only made of polysilicon, need include
As follows step by step：
As shown in Figure 4 A, deposit forms second epitaxial layer or the second polysilicon layer 112, second epitaxial layer or the
First opening is filled and extends to the table of second nitration case 111 outside first opening by two polysilicon layers 112
Face.
As shown in Figure 4 B, it is that stop-layer carries out chemical mechanical milling tech by described first with second nitration case 111
Second epitaxial layer or the second polysilicon layer 112 outside opening grind away and make second epitaxial layer or the second polysilicon layer
112 be ground to it is described first opening top surface it is equal.
Also can be in other embodiments：Second epitaxial layer described in step 3 or the second polysilicon layer 112 are completely by outer
Prolong layer composition, as shown in Figure 4 B, is directly filled out second epitaxial layer or the second polysilicon layer 112 by selective epitaxial process
It fills in first opening；Since selective epitaxial layer will not be in second silicon nitride layer 111 outside first opening
Surface form second epitaxial layer or the second polysilicon layer 112, therefore CMP process need not be carried out.
As shown in Figure 4 C, second epitaxial layer or the oxidation of the second polysilicon layer 112 are formed to carrying out local oxidation
The main part 1031 of the drift region oxygen 103, the local oxidation is simultaneously by second epitaxial layer or the second polycrystalline
First epitaxial layer 102 oxidation of 112 bottom of silicon layer forms the bottom part 1032 of the drift region oxygen 103.The office
Portion's field oxidation is to carry out thermal oxide to selected regional area, further includes by described second after the local oxidation is formed
The step of nitration case 111 removes.
In present invention method, the corresponding local oxidation technique of the bottom part 1032 is to described first
The consumption of epitaxial layer 102 isThe thickness of the main part 1031 formed is
Step 4: as shown in Figure 4 D, using the first conductive type ion injection technology in first epitaxial layer 102
Drift region 104 is formed in selection area, the drift region oxygen 103 is located in the subregion of the drift region 104.The drift
Move area 104 ion implantation technology it is total described in the first oxide layer 110 retain, injection complete after remove first oxide layer
110。
Step 5: as shown in Figure 4 E, sequentially forming gate dielectric layer 106 and the first polysilicon layer 107.Preferably, the grid
Dielectric layer 106 is gate oxide, is formed using thermal oxidation technology.
Step 6: as shown in Figure 4 E, the lateral location that first time lithographic definition goes out the first side of polysilicon gate 107 is carried out,
Successively first polysilicon layer 107 and the gate dielectric layer 106 are performed etching to form the first of the polysilicon gate 107
Simultaneously 102 surface of the first epitaxial layer outside the side of the first side of the polysilicon gate 107 is exposed the side of side.
Step 7: as shown in Figure 4 E, carrying out forming body area 105, the body using the second conductive type ion injection technology
Area 105 is located in first epitaxial layer 102 outside the side of the first side of the polysilicon gate 107, and the body area 105 is being moved back
The bottom that the first side of the polysilicon gate 107 is extended to after fire, 105 table of body area covered by the polysilicon gate 107
Face is used to form raceway groove.
Preferably, it carries out needing to inject using band photoresist when the ion implanting in the body area 105, photoresist is step
The photoresist of the lateral location of first side of the polysilicon gate 107 defined in six.
Step 8: as shown in figure 3, carry out second of lithographic definition go out polysilicon gate 107 the second side lateral location, it is right
First polysilicon layer 107 performs etching the side for the second side to form the polysilicon gate 107 and forms the polysilicon
Grid 107 form gate structure by the gate dielectric layer 106 and the superposition of the polysilicon gate 107；The of the gate dielectric layer 106
Two sides and the first side of the drift region oxygen 103 are in contact, and the second side of the polysilicon gate 107 extends to the drift region
On the surface of field oxygen 103.
Step 9: as shown in figure 3, carrying out the injection of the first conduction type heavy doping ion is formed simultaneously source region 108a and drain region
108b, source region 108a be formed in 105 surface of body area and the source region 108a the second side and the polysilicon gate 107
Side autoregistration；Drain region 108b is formed in the drift region 104 and the first side of the drain region 108b and the drift region
The second side autoregistration of oxygen 103.
Preferably, the body area 105 of adjacent LDMOS device shares, and to be formed the source region 108a and described
The region when ion implanting of drain region 108b between the two neighboring source region 108a in the same body area 105 hinders with photoresist
Gear.The drain region 108b of adjacent LDMOS device is shared, and the both sides of the drain region 108b are all the drift region oxygen 103,
The position of the drain region 108b is directly defined by the drift region of both sides 103 autoregistration of oxygen.
The bottom part 1032 forms a beak in the first side of the drift region oxygen 103 and makes the gate medium
The beak contact of first side of layer 106 and the drift region oxygen 103, reduces the gate dielectric layer 106 and the drift region
The electric field strength of 103 contact position of oxygen.
The main part 1031 is used to subtract under conditions of ensureing that the overall thickness of the drift region oxygen 103 remains unchanged
The thickness of few bottom part 1032, to the bottom for reducing the drift region oxygen 103 and 102 table of the first epitaxial layer
The distance between face, to reduce the conducting resistance of device.
Step 10: carrying out the surface formation body draw-out area that the second conduction type heavy doping ion is infused in the body area 105
109, the side of the first side of the body draw-out area 109 and the source region 108a is in contact.When carrying out the body draw-out area 109
The forming region opening first by the body draw-out area 109 is needed, other regions stop with photoresist, are carrying out injection formation later
The body draw-out area 109.
In present invention method, LDMOS is N-type device, and the first conduction type is N-type, and the second conduction type is P
Type, the semiconductor substrate are adulterated for p-type.Also can be in other embodiments：LDMOS is P-type device, and the first conduction type is
P-type, the second conduction type are N-type.
The present invention has been described in detail through specific embodiments, but these not constitute the limit to the present invention
System.Without departing from the principles of the present invention, those skilled in the art can also make many modification and improvement, these are also answered
It is considered as protection scope of the present invention.
Claims (15)
1. a kind of LDMOS device, which is characterized in that including：
First epitaxial layer of the second conduction type is formed with the first conduction type in the selection area of first epitaxial layer
The body area of drift region and the second conduction type；Laterally contact or isolation have distance for the drift region and the body area；
It is formed in the selection area of the drift region by drift region oxygen；
It is formed with the gate structure being formed by stacking by gate dielectric layer and polysilicon gate on the surface in the body area, by the polysilicon
The body surface of grid covering is used to form raceway groove；
First side of the second side of the gate dielectric layer and the drift region oxygen is in contact, and the second side of the polysilicon gate is prolonged
On the surface for reaching the drift region oxygen；
Source region is formed in the second side of the body surface and the source region and the first side autoregistration of the polysilicon gate；
Drain region is formed in the second side autoregistration of first side and the drift region oxygen in the drift region and drain region；
The drift region oxygen is the integrally formed structure being formed by stacking by main part and bottom part, in the drift region
First epi-layer surface of the forming region of oxygen is formed with the second epitaxial layer or the second polysilicon layer, and the main part is logical
It crosses and second epitaxial layer or the second polysilicon layer progress local oxidation is formed, the bottom part is simultaneously then to described
Second epitaxial layer or first epitaxial layer of the second polysilicon layer bottom carry out local oxidation and are formed；
The bottom part forms a beak in the first side of the drift region oxygen and makes the gate dielectric layer and the drift
The beak contact for moving the first side of area oxygen, reduces the electric field strength of the gate dielectric layer and the contact positions the drift region Chang Yang；
The main part is used to reduce the bottom under conditions of ensureing that the overall thickness of the drift region oxygen remains unchanged
Partial thickness, to the distance between the bottom for reducing the drift region oxygen and first epi-layer surface, to drop
The conducting resistance of low device.
2. LDMOS device as described in claim 1, it is characterised in that：It is formed with first in the bottom of first epitaxial layer
First buried layer of conduction type heavy doping；First buried layer is formed in semiconductor substrate surface.
3. LDMOS device as claimed in claim 2, it is characterised in that：The semiconductor substrate is silicon substrate, outside described first
It is silicon epitaxy layer to prolong layer.
4. LDMOS device as described in claim 1, it is characterised in that：The corresponding local oxidation of the bottom part
Technique is to the consumption of first epitaxial layer
5. LDMOS device as described in claim 1, it is characterised in that：The thickness of the main part is
6. LDMOS device as described in claim 1, it is characterised in that：The gate dielectric layer is gate oxide.
7. LDMOS device as described in claim 1, it is characterised in that：It is also formed with the second conduction on the surface in the body area
The side of first side of the body draw-out area of type heavy doping, the body draw-out area and the source region is in contact.
8. the LDMOS device as described in any claim in claim 1 to 7, it is characterised in that：LDMOS be N-type device, first
Conduction type is N-type, and the second conduction type is p-type；Alternatively, LDMOS is P-type device, the first conduction type is p-type, and second leads
Electric type is N-type.
9. a kind of manufacturing method of LDMOS device, which is characterized in that include the following steps：
Step 1: providing the first epitaxial layer of the second conduction type；
Step 2: sequentially forming the first oxide layer and the second nitration case on the surface of first epitaxial layer, lithographic definition goes out drift
The forming region for moving area oxygen, by second nitration case of the forming region of the drift region oxygen and first oxide layer
It removes and forms the first opening for exposing first epi-layer surface；
Step 3: filling the second epitaxial layer or the second polysilicon layer in first opening；To carrying out local oxidation by institute
It states the second epitaxial layer or the second polysilicon layer aoxidizes the main part to form the drift region oxygen, the local oxidation is simultaneously
First epitaxial layer of second epitaxial layer or the second polysilicon layer bottom is aoxidized to the bottom to form the drift region oxygen
Portion part；
Step 4: drift is formed in the selection area of first epitaxial layer using the first conductive type ion injection technology
Area, the drift region oxygen are located in the subregion of the drift region；
Step 5: sequentially forming gate dielectric layer and the first polysilicon layer；
Step 6: the lateral location that first time lithographic definition goes out the first side of polysilicon gate is carried out, successively to first polycrystalline
Silicon layer and the gate dielectric layer perform etching the side for the first side to form the polysilicon gate and by the of the polysilicon gate
First epi-layer surface outside the side of side is exposed；
Step 7: carrying out forming body area using the second conductive type ion injection technology, the body area is located at the polysilicon gate
The first side side outside first epitaxial layer in, the body area extends to the first side of the polysilicon gate after annealing
Bottom, raceway groove is used to form by the body surface that the polysilicon gate covers；
Step 8: the lateral location that second of lithographic definition goes out the second side of polysilicon gate is carried out, to first polysilicon layer
It performs etching the side for the second side to form the polysilicon gate and forms the polysilicon gate, by the gate dielectric layer and described
Polysilicon gate is superimposed to form gate structure；First side of the second side of the gate dielectric layer and the drift region oxygen is in contact,
The second side of the polysilicon gate extends on the surface of the drift region oxygen；
Step 9: carrying out the injection of the first conduction type heavy doping ion is formed simultaneously source region and drain region, source region is formed in the body
First side autoregistration of area surface and the second side of the source region and the polysilicon gate；Drain region be formed in the drift region and
The second side autoregistration of first side in the drain region and the drift region oxygen；
The bottom part forms a beak in the first side of the drift region oxygen and makes the gate dielectric layer and the drift
The beak contact for moving the first side of area oxygen, reduces the electric field strength of the gate dielectric layer and the contact positions the drift region Chang Yang；
The main part is used to reduce the bottom under conditions of ensureing that the overall thickness of the drift region oxygen remains unchanged
Partial thickness, to the distance between the bottom for reducing the drift region oxygen and first epi-layer surface, to drop
The conducting resistance of low device.
10. the manufacturing method of LDMOS device as claimed in claim 9, it is characterised in that：In first extension in step 1
The bottom of layer is formed with the first buried layer of the first conduction type heavy doping；First buried layer is formed in semiconductor substrate surface.
11. the manufacturing method of LDMOS device as claimed in claim 10, it is characterised in that：The semiconductor substrate serves as a contrast for silicon
Bottom, first epitaxial layer are silicon epitaxy layer.
12. the manufacturing method of LDMOS device as claimed in claim 9, it is characterised in that：Bottom part pair described in step 2
The local oxidation technique answered is to the consumption of first epitaxial layer
13. the manufacturing method of LDMOS device as claimed in claim 9, it is characterised in that：Second epitaxial layer described in step 3
Or second polysilicon layer when being entirely epitaxial layer, by selective epitaxial process by second epitaxial layer or the second polysilicon layer
It is filled in first opening；
When second epitaxial layer described in step 3 or the second polysilicon layer include polysilicon, second epitaxial layer is formed in deposit
Or second after polysilicon layer, first opening is filled and is extended to described by second epitaxial layer or the second polysilicon layer
The surface of second nitration case outside first opening carries out chemical mechanical milling tech by stop-layer of second nitration case
By outside first opening second epitaxial layer or the second polysilicon layer grind away and make second epitaxial layer or second
Polysilicon layer is ground to equal with the top surface of the first opening.
14. the manufacturing method of LDMOS device as claimed in claim 9, it is characterised in that：The thickness of the main part is
15. the manufacturing method of LDMOS device as claimed in claim 9, it is characterised in that：Further include step after step 9：
Step 10: the surface formation body draw-out area that the second conduction type heavy doping ion is infused in the body area is carried out, the body
The side of draw-out area and the first side of the source region is in contact.
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| US5652177A (en) * | 1996-08-22 | 1997-07-29 | Chartered Semiconductor Manufacturing Pte Ltd | Method for fabricating a planar field oxide region |
| US20080296669A1 (en) * | 2005-02-21 | 2008-12-04 | Texas Instruments Incorporated | System and method for making a ldmos device with electrostatic discharge protection |
| US20110079849A1 (en) * | 2009-10-06 | 2011-04-07 | Ting-Zhou Yan | Lateral-diffusion metal-oxide-semiconductor device |
| CN102891180A (en) * | 2011-08-23 | 2013-01-23 | 成都芯源系统有限公司 | Semiconductor device comprising MOSFET device and manufacturing method |
| CN104659093A (en) * | 2013-11-21 | 2015-05-27 | 上海华虹宏力半导体制造有限公司 | Nldmos device structure |
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| US5652177A (en) * | 1996-08-22 | 1997-07-29 | Chartered Semiconductor Manufacturing Pte Ltd | Method for fabricating a planar field oxide region |
| US20080296669A1 (en) * | 2005-02-21 | 2008-12-04 | Texas Instruments Incorporated | System and method for making a ldmos device with electrostatic discharge protection |
| US20110079849A1 (en) * | 2009-10-06 | 2011-04-07 | Ting-Zhou Yan | Lateral-diffusion metal-oxide-semiconductor device |
| CN102891180A (en) * | 2011-08-23 | 2013-01-23 | 成都芯源系统有限公司 | Semiconductor device comprising MOSFET device and manufacturing method |
| CN104659093A (en) * | 2013-11-21 | 2015-05-27 | 上海华虹宏力半导体制造有限公司 | Nldmos device structure |
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