CN108269515B - Circuit and method for detecting GOA circuit failure and display panel - Google Patents
Circuit and method for detecting GOA circuit failure and display panel Download PDFInfo
- Publication number
- CN108269515B CN108269515B CN201810140465.5A CN201810140465A CN108269515B CN 108269515 B CN108269515 B CN 108269515B CN 201810140465 A CN201810140465 A CN 201810140465A CN 108269515 B CN108269515 B CN 108269515B
- Authority
- CN
- China
- Prior art keywords
- thin film
- film transistor
- goa
- circuit
- film transistors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
The invention provides a circuit and a method for detecting the failure of a GOA circuit and a display panel, wherein the circuit comprises: the device comprises a plurality of first thin film transistors, a plurality of second thin film transistors and a plurality of unidirectional conducting modules which allow signals to flow in a unidirectional mode; the source electrode and the drain electrode of the first thin film transistor are respectively connected with the output end of the GOA circuit and the grid electrode of the second thin film transistor, and the grid electrode of the first thin film transistor is used for accessing a control signal for controlling the first thin film transistor to be turned on or turned off; the source electrode of the second thin film transistor is connected with a clock signal or an inverted clock signal, and the drain electrode of the second thin film transistor is connected to a box forming detection device for signal detection through a one-way conduction module; the drains of the first thin film transistors are connected with the grids of the second thin film transistors in a one-to-one correspondence mode, and the grids of the second thin film transistors are connected with the unidirectional conduction modules in a one-to-one correspondence mode. The method and the device can increase the abnormal detection rate of the GOA unit in the GOA circuit and reduce the repair difficulty of the GOA circuit.
Description
Technical Field
The invention relates to the technical field of display, in particular to a circuit and a method for detecting GOA circuit failure and a display panel.
Background
The GOA (Gate on Array, Array substrate line driver) technology integrates a Thin Film Transistor (TFT) as a Gate switching circuit on an Array substrate, thereby eliminating a Gate driver integrated circuit portion originally disposed outside the Array substrate and reducing the cost of the product from two aspects of material cost and process steps. The GOA technology is a grid drive circuit technology commonly used in the technical field of TFT-LCD (thin film transistor liquid crystal display) at present, and the manufacturing process is simple and has good application prospect. The GOA circuit comprises a plurality of cascaded GOA units, and the functions of the GOA circuit mainly comprise: and a high-level signal output by the last row of gate lines is used for charging a capacitor in the shift register unit, driving the pull-up thin film transistor of the current stage to be turned on, and transmitting a pulse of a clock signal to the gate line of the current stage so as to turn on a scanning line connected with the GOA unit of the current stage on the display panel. As shown in fig. 1, which is a schematic diagram of a level-by-level circuit module of an M-level GOA unit, CK is a clock signal, XCK is an inverted clock signal, Vgl is a low-level signal, and Vgh is a high-level signal; referring to fig. 2, a schematic diagram of a failure detection scheme for a prior art M-level GOA unit is shown, in fig. 2, the output of the last-level GOA unit (i.e. the M-th-level GOA unit) is connected to a terminal of the boxing detection device, so that the GOA circuit can be judged to be good or bad by detecting the output waveform of the last-level GOA unit during boxing detection. However, the currently designed GOA failure detection scheme can only detect the output of the last-stage GOA unit circuit, and the entire GOA circuit is formed by cascading M-stage GOA unit circuits, and if a certain intermediate-stage GOA unit of the GOA circuit fails, the output of the last-stage GOA unit is also abnormal, but we cannot judge which one of the two stages of GOA unit circuits fails. This increases the difficulty of repair of the GOA circuit.
Disclosure of Invention
In order to solve the above technical problems, the present invention provides a circuit and a method for detecting a failure of a GOA circuit, and a display panel, which can increase an abnormal detection rate of a GOA unit in the GOA circuit and reduce a repair difficulty of the GOA circuit.
The invention provides a circuit for detecting the failure of a GOA circuit, which comprises: the device comprises a plurality of first thin film transistors, a plurality of second thin film transistors and a plurality of unidirectional conducting modules which allow signals to flow in a unidirectional mode;
the source and the drain of the first thin film transistor are respectively connected with the output end of the GOA circuit and the gate of the second thin film transistor, and the gate of the first thin film transistor is used for accessing a control signal for controlling the first thin film transistor to be turned on or turned off;
the source electrode of the second thin film transistor is connected with a clock signal or an inverted clock signal, and the drain electrode of the second thin film transistor is connected to a box forming detection device for signal detection through the unidirectional conduction module;
the drains of the first thin film transistors are connected with the grids of the second thin film transistors in a one-to-one correspondence mode, and the grids of the second thin film transistors are connected with the unidirectional conduction modules in a one-to-one correspondence mode.
Preferably, the number of the first thin film transistors, the second thin film transistors and the unidirectional conducting modules is the same as the number of the stages of the GOA units in the GOA circuit.
Preferably, the unidirectional conducting module comprises a third thin film transistor;
the grid electrode and the source electrode of the third thin film transistor are connected, the source electrode of the third thin film transistor is connected with the drain electrode of the second thin film transistor, and the drain electrode of the third thin film transistor is connected with the box forming detection device.
Preferably, the thin film transistors in the circuit for detecting the failure of the GOA circuit are all P-channel thin film transistors or N-channel thin film transistors;
the control signal is a high potential voltage signal or a low potential voltage signal.
Preferably, the GOA circuit includes odd-level and even-level GOA cells, the plurality of first thin film transistors includes a first portion of the first thin film transistors connected to the odd-level GOA cell and a second portion of the first thin film transistors connected to the even-level GOA cell, and the plurality of second thin film transistors includes a first portion of the second thin film transistors connected to the first portion of the first thin film transistors and a second portion of the second thin film transistors connected to the second portion of the first thin film transistors;
the source electrode of the first part of the second thin film transistor is connected with a clock signal; and the source electrode of the second part of the second thin film transistors is connected with the inverted clock signal.
Preferably, when the second thin film transistor is connected with a GOA unit of an odd level in the GOA circuit through the first thin film transistor, a drain of the second thin film transistor is connected with the first terminal of the in-box detection apparatus through the unidirectional conducting module; when the second thin film transistor is connected with the even-level GOA unit in the GOA circuit through the first thin film transistor, the drain electrode of the second thin film transistor is connected with the second terminal of the box-forming detection device through the unidirectional conducting module.
The invention also provides a display panel which comprises the circuit for detecting the failure of the GOA circuit.
The invention also provides a method for detecting the failure of the GOA circuit, which is applied to the circuit for detecting the failure of the GOA circuit and comprises the following steps:
transmitting a control signal to a first thin film transistor to turn on the first thin film transistor;
transmitting a clock signal or an inverted clock signal to a source electrode of the second thin film transistor;
and detecting a signal output by the unidirectional conduction module, and if the waveform of the signal output by the unidirectional conduction module changes relative to the clock signal or the inverted clock signal, judging that the GOA unit connected with the first thin film transistor fails.
Preferably, the transmitting the clock signal or the inverted clock signal to the source of the second thin film transistor specifically includes:
when the second thin film transistor is connected to the GOA unit of the odd level through the first thin film transistor, transmitting a clock signal to a source electrode of the second thin film transistor;
and when the second thin film transistor is connected to the even-level GOA unit through the first thin film transistor, transmitting an inverted clock signal to a source electrode of the second thin film transistor.
Preferably, the method further comprises the following steps:
after the detection of the signal output by the unidirectional conduction module is finished, a control signal is transmitted to the first thin film transistor, and the first thin film transistor is closed; the control signal for controlling the first thin film transistor to be turned on is one of a high potential voltage signal and a low potential voltage signal, and the control signal for controlling the first thin film transistor to be turned off is the other one of the high potential voltage signal and the low potential voltage signal.
The implementation of the invention has the following beneficial effects: according to the invention, the second thin film transistor is controlled to be turned on and off through the gate driving signal output by the GOA unit, when the second thin film transistor is turned on, the second thin film transistor transmits a clock signal or an inverted clock signal to the box forming detection device, and the box forming detection device judges whether the received signal is abnormal or not. When the gate driving signal output by the unit is abnormal, the in-box detection device can detect that the signal received by the in-box detection device is also abnormal, so that which grade or which grades of the GOA units are abnormal in output can be judged, and whether the GOA units fail or not can be judged.
The gate driving circuit is provided with the plurality of first thin film transistors T1, the plurality of second thin film transistors T2 and the plurality of unidirectional conduction modules, and can detect the gate driving signals output by different GOA units respectively, so that the abnormal detection rate of the GOA units is increased, and the repair difficulty of the GOA circuit is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic diagram of a related art pass circuit of an M-level GOA unit.
Fig. 2 is a schematic diagram of a failure detection scheme of an M-level GOA unit in the background art provided by the present invention.
Fig. 3 is a schematic diagram of the odd-level GOA unit failure detection scheme provided in the present invention.
Fig. 4 is a schematic diagram illustrating an even level GOA unit failure detection scheme according to the present invention.
Fig. 5 is a schematic diagram of a waveform of a normal signal output by the GOA circuit provided by the present invention.
Fig. 6 is a schematic diagram of waveforms of abnormal signals output by the GOA circuit according to the present invention.
Detailed Description
The present invention provides a circuit for detecting a failure of a GOA circuit, as shown in fig. 3 and 4, the circuit includes: the first thin film transistors T1, the second thin film transistors T2, and the unidirectional conducting modules allow signals to flow in a single direction.
The source and the drain of the first thin film transistor T1 are respectively connected to the output terminal of the GOA unit in the GOA circuit and the gate of the second thin film transistor T2, and the gate of the first thin film transistor T1 is used for receiving a control signal for controlling the first thin film transistor T1 to turn on or off.
The source of the second thin film transistor T2 is connected to the clock signal CK or the inverted clock signal XCK, and the drain of the second thin film transistor T2 is connected to a cell detection (celltest) device for signal detection through a unidirectional conducting module.
The drains of the first tfts T1 are connected to the gates of the second tfts T2 in a one-to-one correspondence, and the gates of the second tfts T2 are connected to the unidirectional conducting modules in a one-to-one correspondence.
Further, the number of the first thin film transistor T1, the second thin film transistor T2, and the number of the unidirectional conductive modules are the same as the number of the stages of the GOA units in the GOA circuit. For example, the GOA circuit includes M-level GOA units, and the numbers of the first thin film transistor T1, the second thin film transistor T2 and the unidirectional conducting modules are all M.
Further, the unidirectional turn-on module includes a third thin film transistor T3; the gate and source of the third thin film transistor T3 are connected and the source of the third thin film transistor T3 is connected to the drain of the second thin film transistor T2, and the drain of the third thin film transistor T3 is connected to the in-box detection device.
Furthermore, the thin film transistors in the circuit for detecting the failure of the GOA circuit are all P-channel thin film transistors or N-channel thin film transistors. The gate of the P-channel thin film transistor is inputted with a low potential voltage signal VGL to turn on the P-channel thin film transistor, whereas the gate of the P-channel thin film transistor is inputted with a high potential voltage signal VGH to turn off the P-channel thin film transistor. Inputting a high-potential voltage signal VGH to the grid electrode of the N-channel thin film transistor, and turning on the high-potential voltage signal VGH, whereas inputting a low-potential voltage signal VGL to the grid electrode of the N-channel thin film transistor, and turning off the low-potential voltage signal VGL; therefore, the control signal is the high-level voltage signal VGH or the low-level voltage signal VGL.
Further, the GOA circuit includes odd-level GOA cells (e.g., a 1 st-level GOA cell and a 3 rd-level GOA cell) and even-level GOA cells (e.g., a 2 nd-level GOA cell), the plurality of first thin film transistors T1 includes a first portion of first thin film transistors T1 connected to the odd-level GOA cells and a second portion of first thin film transistors T1 connected to the even-level GOA cells, the plurality of second thin film transistors T2 includes a first portion of second thin film transistors T2 connected to the first portion of first thin film transistors T1 and a second portion of second thin film transistors T2 connected to the second portion of first thin film transistors T1; the source electrode of the first part of the second thin film transistor T2 is connected to the clock signal CK; the source of the second part of the second thin film transistor T2 is connected to the inverted clock signal XCK.
Further, when the second thin film transistor T2 is connected to the GOA cell of the odd stage in the GOA circuit through the source of the first thin film transistor T1, the drain of the second thin film transistor T2 is connected to the first terminal of the boxed detection apparatus through the unidirectional conducting module, and the second thin film transistor T2 outputs the incoming clock signal CK to the first terminal of the boxed detection apparatus through the unidirectional conducting module; when the second thin film transistor T2 is connected to the GOA cell of the even-numbered stage in the GOA circuit through the source of the first thin film transistor T1, the drain of the second thin film transistor T2 is connected to the second terminal of the boxed sensing apparatus through the unidirectional turn-on block, and the second thin film transistor T2 outputs the inputted inverted clock signal XCK to the second terminal of the boxed sensing apparatus through the unidirectional turn-on block.
Because the output of each odd-level GOA unit is in one-to-one correspondence with the low potential of the clock signal CK, if each odd-level GOA unit works normally, the same signal waveform as the clock signal CK can be detected on the first terminal of the boxed detection device; similarly, the output of each even-level GOA unit corresponds to the low potential of the inverted clock signal XCK one-to-one, and if each even-level GOA unit is operating normally, the same signal waveform as the inverted clock signal XCK can be detected at the second terminal of the boxing detection device.
As shown in fig. 5, the gate drive signals G (1) to G (6) output from the 1 st to 6 th GOA units are normal, the signal waveform detected at the first terminal of the blocking detection device matches the waveform of the clock signal CK, and the signal waveform detected at the second terminal of the blocking detection device matches the waveform of the inverted clock signal XCK.
Specifically, when the second thin film transistor T2 is turned on in sequence by the 1 st-level GOA unit, the 3 rd-level GOA unit, and the 5 th-level GOA unit, the clock signal CK applied to the source of the second thin film transistor T2 is a low potential voltage signal at this time, and the signal detected at the first terminal of the cartridge detector is also a low potential signal at this time.
When the second thin film transistor T2 is turned on in sequence by the second-level GOA unit, and the second-level GOA unit, the inverted clock signal XCK connected to the source of the second thin film transistor T2 is a low-potential voltage signal at this time, and the signal detected at the second terminal of the box-forming detection apparatus is a low-potential signal at this time.
If a GOA cell of an odd level fails, the waveform of the signal detected at the first terminal of the boxed detection device changes relative to the clock signal CK, and it can be determined from the specific waveforms of the signals detected at the first and second terminals of the boxed detection device which GOA cell or GOA cells of which level output an abnormality.
As shown in fig. 6, it can be seen from fig. 6 that the signal waveforms output by the GOA unit of the 6 th level and the GOA unit of the 9 th level are abnormal. When the gate driving signal G (6) output by the GOA unit of the 6 th stage is abnormal, the waveform of the signal detected at the second terminal of the corresponding box detection device is also abnormal.
Specifically, after the 6 th-stage GOA is turned on, the gate driving signal G (6) outputted by the 6 th-stage GOA is a continuous high-level voltage signal, and the corresponding second thin film transistor T2 is not turned on, and at this moment, the inverted clock signal XCK is a low-level voltage signal, and the low-level voltage signal is not detected by the binning detection apparatus, so that it can be determined that the corresponding 6 th-stage GOA unit is failed.
The invention also provides a display panel which comprises the circuit for detecting the failure of the GOA circuit.
The invention also provides a method for detecting the failure of the GOA circuit, which is applied to the circuit for detecting the failure of the GOA circuit, and the method comprises the following steps:
transmitting a control signal to the first thin film transistor T1 to turn on the first thin film transistor T1;
transmitting the clock signal CK or the inverted clock signal XCK to the source of the second TFT T2;
the blocking detection device detects the signal output from the unidirectional conductive module, and determines that the GOA cell connected to the first thin film transistor T1 is failed if the waveform of the signal output from the unidirectional conductive module changes with respect to the clock signal CK or the inverted clock signal XCK.
Further, the transmitting of the clock signal CK or the inverted clock signal XCK to the source of the second thin film transistor T2 specifically includes:
when the second thin film transistor T2 is connected to the GOA cells of the odd-numbered stages through the first thin film transistor T1, the clock signal CK is supplied to the source of the second thin film transistor T2;
when the second thin film transistor T2 is connected to the GOA cell of the even-numbered stage through the first thin film transistor T1, the inverted clock signal XCK is supplied to the source of the second thin film transistor T2.
Further, the method for detecting the failure of the GOA circuit further comprises the following steps:
after the detection of the signal output by the unidirectional conducting module is completed, a control signal is transmitted to the first thin film transistor T1, and the first thin film transistor T1 is turned off; the control signal for controlling the first thin film transistor T1 to turn on is one of the high potential voltage signal VGH and the low potential voltage signal VGL, and the control signal for controlling the first thin film transistor T1 to turn off is the other one of the high potential voltage signal VGH and the low potential voltage signal VGL.
In summary, the second tft T2 is controlled to be turned on and off by the gate driving signal output by the GOA unit, when the second tft T2 is turned on, the second tft T2 transmits the clock signal CK or the inverted clock signal CK to the box detector, and the box detector determines whether the received signal matches the waveform of the clock signal CK or the inverted clock signal XCK received by the second tft T2, thereby determining whether the signal received by the box detector is abnormal. When the gate driving signal output by the GOA unit is abnormal, the in-box detection device can detect that the signal received by the in-box detection device is also abnormal, so that which grade or which grades of GOA units are abnormal in output can be judged, and whether the GOA unit fails or not can be judged.
The gate driving circuit is provided with the plurality of first thin film transistors T1, the plurality of second thin film transistors T2 and the plurality of unidirectional conduction modules, and can detect the gate driving signals output by different GOA units respectively, so that the abnormal detection rate of the GOA units is increased, and the repair difficulty of the GOA circuit is reduced. In addition, after the detection is completed, the first thin film transistor T1 can be turned off through the control signal, so that the circuit for detecting the failure of the GOA circuit is isolated from the GOA circuit, and the normal operation of the GOA circuit is not affected.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (10)
1. A circuit for detecting a failure in a GOA circuit, comprising: the device comprises a plurality of first thin film transistors, a plurality of second thin film transistors and a plurality of unidirectional conducting modules which allow signals to flow in a unidirectional mode;
the source and the drain of the first thin film transistor are respectively connected with the output end of a GOA unit in the GOA circuit and the grid of the second thin film transistor, and the grid of the first thin film transistor is used for accessing a control signal for controlling the first thin film transistor to be turned on or turned off;
the source electrode of the second thin film transistor is connected with a clock signal or an inverted clock signal, and the drain electrode of the second thin film transistor is connected to a box forming detection device for signal detection through the unidirectional conduction module;
the drain electrodes of the first thin film transistors are connected with the grid electrodes of the second thin film transistors in a one-to-one correspondence mode, the drain electrodes of the second thin film transistors are connected with the unidirectional conduction modules in a one-to-one correspondence mode, and the source electrodes of the first thin film transistors are connected with the output ends of the GOA units in the GOA circuit in a one-to-one correspondence mode.
2. Circuit for detecting GOA circuit failure according to claim 1,
the number of the first thin film transistors, the second thin film transistors and the unidirectional conduction modules is the same as the number of GOA units in the GOA circuit.
3. The circuit for detecting a failure in a GOA circuit according to claim 1, wherein the unidirectional conducting module comprises a third thin film transistor;
the grid electrode and the source electrode of the third thin film transistor are connected, the source electrode of the third thin film transistor is connected with the drain electrode of the second thin film transistor, and the drain electrode of the third thin film transistor is connected with the box forming detection device.
4. The circuit for detecting the failure of the GOA circuit according to claim 1, wherein the thin film transistors in the circuit for detecting the failure of the GOA circuit are both P-channel thin film transistors or N-channel thin film transistors;
the control signal is a high potential voltage signal or a low potential voltage signal.
5. The circuit according to claim 1, wherein the GOA circuit comprises an odd GOA unit and an even GOA unit, the plurality of first thin film transistors includes a first portion of first thin film transistors connected to the odd GOA unit and a second portion of first thin film transistors connected to the even GOA unit, and the plurality of second thin film transistors includes a first portion of second thin film transistors connected to the first portion of first thin film transistors and a second portion of second thin film transistors connected to the second portion of first thin film transistors;
the source electrode of the first part of the second thin film transistor is connected with a clock signal; and the source electrode of the second part of the second thin film transistors is connected with the inverted clock signal.
6. The circuit for detecting the failure of the GOA circuit according to claim 1, wherein when the second thin film transistor is connected with the GOA unit of the odd level in the GOA circuit through the first thin film transistor, the drain of the second thin film transistor is connected with the first terminal of the in-box detection device through the unidirectional conducting module; when the second thin film transistor is connected with the even-level GOA unit in the GOA circuit through the first thin film transistor, the drain electrode of the second thin film transistor is connected with the second terminal of the box-forming detection device through the unidirectional conducting module.
7. A display panel comprising the circuit for detecting a failure of a GOA circuit as claimed in any one of claims 1 to 6.
8. A method for detecting a failure of a GOA circuit, applied to the circuit for detecting the failure of the GOA circuit as claimed in any one of claims 1 to 6, comprising the following steps:
transmitting a control signal to a first thin film transistor to turn on the first thin film transistor;
transmitting a clock signal or an inverted clock signal to a source electrode of the second thin film transistor;
and detecting a signal output by the unidirectional conduction module, and if the waveform of the signal output by the unidirectional conduction module changes relative to the clock signal or the inverted clock signal, judging that the GOA unit connected with the first thin film transistor fails.
9. The method according to claim 8, wherein the step of transmitting a clock signal or an inverted clock signal to the source of the second thin film transistor comprises:
when the second thin film transistor is connected to the GOA unit of the odd level through the first thin film transistor, transmitting a clock signal to a source electrode of the second thin film transistor;
and when the second thin film transistor is connected to the even-level GOA unit through the first thin film transistor, transmitting an inverted clock signal to a source electrode of the second thin film transistor.
10. The method for detecting a GOA circuit failure of claim 8, further comprising the steps of:
after the detection of the signal output by the unidirectional conduction module is finished, a control signal is transmitted to the first thin film transistor, and the first thin film transistor is closed; the control signal for controlling the first thin film transistor to be turned on is one of a high potential voltage signal and a low potential voltage signal, and the control signal for controlling the first thin film transistor to be turned off is the other one of the high potential voltage signal and the low potential voltage signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810140465.5A CN108269515B (en) | 2018-02-11 | 2018-02-11 | Circuit and method for detecting GOA circuit failure and display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810140465.5A CN108269515B (en) | 2018-02-11 | 2018-02-11 | Circuit and method for detecting GOA circuit failure and display panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108269515A CN108269515A (en) | 2018-07-10 |
| CN108269515B true CN108269515B (en) | 2021-05-28 |
Family
ID=62773976
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810140465.5A Active CN108269515B (en) | 2018-02-11 | 2018-02-11 | Circuit and method for detecting GOA circuit failure and display panel |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108269515B (en) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109036254A (en) * | 2018-09-14 | 2018-12-18 | 合肥鑫晟光电科技有限公司 | A kind of gate driving circuit and its driving method and display device |
| CN109147630A (en) * | 2018-09-25 | 2019-01-04 | 武汉华星光电半导体显示技术有限公司 | A kind of GOA detection circuit and its test method |
| CN109410809A (en) * | 2018-12-18 | 2019-03-01 | 武汉华星光电半导体显示技术有限公司 | GOA overhauls circuit |
| CN109448618B (en) * | 2018-12-25 | 2022-03-25 | 武汉天马微电子有限公司 | Display panel, display device and driving method of display device |
| CN109961729B (en) * | 2019-04-30 | 2022-11-08 | 深圳市华星光电半导体显示技术有限公司 | Display panel and test method thereof |
| CN110189666A (en) * | 2019-05-30 | 2019-08-30 | 京东方科技集团股份有限公司 | GOA tests circuit, array substrate, display panel and GOA test method |
| CN110517621B (en) * | 2019-09-03 | 2023-02-03 | 京东方科技集团股份有限公司 | GOA multiplexing unit, pixel circuit, driving circuit, display device and display panel thereof |
| CN111599297B (en) * | 2020-06-19 | 2023-12-15 | 京东方科技集团股份有限公司 | Test circuit, test method and display device |
| CN112331115A (en) * | 2020-11-05 | 2021-02-05 | 北海惠科光电技术有限公司 | Liquid crystal panel and GOA circuit detection method of liquid crystal panel |
| CN114360429A (en) * | 2022-01-21 | 2022-04-15 | 重庆京东方光电科技有限公司 | Drive circuit and display device |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20080035086A (en) * | 2006-10-18 | 2008-04-23 | 삼성전자주식회사 | Liquid crystal display |
| TWM357609U (en) * | 2008-12-08 | 2009-05-21 | Chunghwa Picture Tubes Ltd | LCD panels capable of testing cell defects, line defects and layout defects |
| CN104183225B (en) * | 2014-08-15 | 2017-08-15 | 上海天马微电子有限公司 | A kind of drive device, array base palte and display device |
| CN105096789B (en) * | 2015-09-25 | 2018-01-30 | 武汉华星光电技术有限公司 | GOA tests the common circuit with removing power-off ghost shadow |
| CN107068084A (en) * | 2017-03-20 | 2017-08-18 | 深圳市华星光电技术有限公司 | GOA drive circuits, array base palte, the method for detecting abnormality of display device and panel |
-
2018
- 2018-02-11 CN CN201810140465.5A patent/CN108269515B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN108269515A (en) | 2018-07-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108269515B (en) | Circuit and method for detecting GOA circuit failure and display panel | |
| US8248356B2 (en) | Driving circuit for detecting line short defects | |
| US10204580B2 (en) | Scan-driving device with detective-driving circuit | |
| KR101056375B1 (en) | Shift register, gate driving circuit and display panel using same | |
| US7310402B2 (en) | Gate line drivers for active matrix displays | |
| US20180080973A1 (en) | Gate driving circuit and method for detecting same, array substrate and display apparatus | |
| US20180211606A1 (en) | Shift register circuit and driving method therefor, gate line driving circuit and array substrate | |
| CN102855938B (en) | Shift register, gate drive circuit and display apparatus | |
| US20100067646A1 (en) | Shift register with embedded bidirectional scanning function | |
| TWI529682B (en) | A scanning signal line driving circuit, a display device including the same, and a driving method of a scanning signal line | |
| CN103247276B (en) | Gate drive circuit and array substrate | |
| US20080068326A1 (en) | Shift register, shift register array, and flat display apparatus | |
| US8605028B2 (en) | Scanning signal line drive circuit, shift register and display device | |
| CN106782282A (en) | Shift register, gate driving circuit, display panel and driving method | |
| WO2016106783A1 (en) | Liquid crystal display panel, and gate driving circuit and fault detection method therefor | |
| CN103165091A (en) | Liquid crystal display device having discharge circuit and method of driving thereof | |
| CN103700356A (en) | Shifting register unit, driving method thereof, shifting register and display device | |
| CN102598105A (en) | Liquid crystal display device and driving method therefor | |
| CN107980160B (en) | GOA circuit, array substrate and display device | |
| CN101800016A (en) | Discharge detection circuit and method, LCD drive g device and liquid crystal indicator | |
| CN104464645A (en) | Shifting register and display device | |
| US20160210927A1 (en) | Gate driving circuit and display apparatus including the same | |
| WO2020062336A1 (en) | Goa detection circuit and test method therefor | |
| CN108877610B (en) | Array substrate, detection method thereof and display device | |
| CN101556830B (en) | Shift register and grid electrode driving device thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |