CN108262684B - Chemical mechanical polishing method - Google Patents
Chemical mechanical polishing method Download PDFInfo
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- CN108262684B CN108262684B CN201611247481.1A CN201611247481A CN108262684B CN 108262684 B CN108262684 B CN 108262684B CN 201611247481 A CN201611247481 A CN 201611247481A CN 108262684 B CN108262684 B CN 108262684B
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- semiconductor wafer
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/34—Accessories
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B1/00—Processes of grinding or polishing; Use of auxiliary equipment in connection with such processes
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B55/00—Safety devices for grinding or polishing machines; Accessories fitted to grinding or polishing machines for keeping tools or parts of the machine in good working condition
- B24B55/06—Dust extraction equipment on grinding or polishing machines
Abstract
The invention provides a chemical mechanical polishing method. The method comprises the following steps: providing a semiconductor wafer to be ground; and performing chemical mechanical polishing on the semiconductor wafer, wherein the edge position of the polishing pad is set at an outer side position close to the edge of the semiconductor wafer in the polishing process so as to reduce the coating of the edge of the semiconductor wafer in the process of contacting the polishing pad with the surface to be polished of the semiconductor wafer. According to the chemical mechanical polishing method, in the chemical mechanical polishing process, the edge position of the polishing pad is set at the outer side position close to the edge of the semiconductor wafer, so that the coating of the polishing pad on the edge of the semiconductor can be effectively reduced, the excessive polishing of the edge of the semiconductor wafer in the polishing process is reduced, the polishing thickness difference of the middle part and the edge of the semiconductor wafer after polishing is reduced, the polishing uniformity of the semiconductor wafer is effectively improved, and the polishing quality of the semiconductor wafer is improved.
Description
Technical Field
The invention relates to the field of semiconductor manufacturing, in particular to a chemical mechanical polishing method.
Background
With the shrinking of feature size and the increasing of metal interconnection in the manufacturing process of integrated circuits, and the increasing requirement on the flatness of the surface of a wafer, thinning of a semiconductor wafer and planarization of the surface of the semiconductor wafer by adopting chemical mechanical polishing become common processes in semiconductor processes.
The chemical mechanical grinding is carried out on the semiconductor wafer, namely, the mechanical force is utilized to act on the surface of the semiconductor wafer, the power of fracture corrosion is generated on the surface film layer, and the wafer is thinned and flattened under the action of a corresponding chemical corrosion reagent. Generally, in chemical mechanical polishing, a chemical mechanical polishing apparatus holds a semiconductor wafer, and brings a surface to be polished of the wafer into full contact with a polishing pad to generate a certain force therebetween, while the polishing pad and the semiconductor wafer move relative to each other, thereby polishing the semiconductor wafer. The polishing pad can be a polishing pad disposed above the semiconductor wafer or a polishing pad disposed below the semiconductor wafer. In an exemplary chemical mechanical polishing apparatus, a platen is used to adsorb a polishing pad above a surface to be polished of a semiconductor wafer to be polished, a chuck is used to adsorb the semiconductor wafer and fix the semiconductor wafer below the polishing pad, and during polishing, the polishing pad is brought into contact with the surface to be polished of the wafer to be polished downward and downward pressure is applied to the wafer to be polished. However, in actual production, the edge of the semiconductor wafer is often over-polished by the polishing pad, resulting in non-uniform thickness distribution of the whole polished semiconductor wafer.
How to reduce the excessive polishing of the edge of the semiconductor wafer by the polishing pad, improve the polishing quality of the edge of the semiconductor wafer, and improve the uniformity of the chemical mechanical polishing in the chemical mechanical polishing is a long-standing concern and attention paid by semiconductor manufacturers.
Disclosure of Invention
In this summary, concepts in a simplified form are introduced that are further described in the detailed description. This summary of the invention is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
The invention provides a chemical mechanical polishing method, which comprises the following steps:
providing a semiconductor wafer to be ground; and
and carrying out chemical mechanical polishing on the semiconductor wafer, and setting the edge position of a polishing pad at an outer side position close to the edge of the semiconductor wafer in the polishing process so as to reduce the coating of the edge of the semiconductor wafer in the process of contacting the polishing pad with the surface to be polished of the semiconductor wafer.
And illustratively, the method further comprises the step of cleaning a contact interface of the semiconductor wafer and a chuck for mounting the semiconductor wafer in real time by using deionized water in the grinding process.
Illustratively, the edge position of the polishing pad is set to be 0 to 2mm from the edge of the semiconductor wafer.
Illustratively, the polishing rate is adjusted by setting the slurry flow rate while setting the edge position of the polishing pad close to the edge of the semiconductor wafer.
Illustratively, the smaller the distance between the edge of the polishing pad and the edge of the semiconductor wafer, the greater the slurry flow rate is set.
Illustratively, the method further comprises the step of removing an edge part with an inclined surface of the semiconductor wafer to be polished before the chemical mechanical polishing is performed on the semiconductor wafer.
Illustratively, the semiconductor wafer to be ground is subjected to an edge trimming process to remove the edge portion having the inclined surface.
Illustratively, the semiconductor wafer is a bonded wafer.
In summary, according to the chemical mechanical polishing method described in the present invention, the excessive polishing of the edge of the semiconductor wafer during the polishing process can be reduced, so as to reduce the polishing thickness difference between the middle portion and the edge of the semiconductor wafer after polishing, effectively improve the polishing uniformity of the semiconductor wafer, and improve the polishing quality of the semiconductor wafer.
Drawings
The following drawings of the invention are included to provide a further understanding of the invention. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
In the drawings:
FIGS. 1A-1D are schematic diagrams illustrating relative positions of a polishing pad and a semiconductor wafer during chemical mechanical polishing and a schematic diagram illustrating a polishing pad covering an edge of the semiconductor wafer in the prior art;
FIGS. 2A-2C are schematic diagrams illustrating the prior art in which the polishing pad over-polishes the edge of a semiconductor wafer due to impurities existing at the interface between the chuck and the wafer during CMP;
FIGS. 3A-3D are schematic diagrams of a bonded wafer at various steps of a prior art polishing process involving the bonded wafer;
FIGS. 4A-4B are schematic views of a semiconductor wafer according to an embodiment of the present invention;
FIG. 4C is a schematic horizontal view of the relative positions of the polishing pad and the wafer to be polished according to one embodiment of the present invention;
FIG. 4D is a cross-sectional view of the relative positions of the polishing pad and the wafer to be polished according to one embodiment of the present invention;
FIG. 4E is a schematic view of the relative positions of the DI water showerhead and the semiconductor wafer in accordance with one embodiment of the present invention;
FIGS. 5A-5B are graphs showing the comparison of prior art uniformity data for a semiconductor wafer after CMP to uniformity data for a semiconductor wafer after CMP according to the present invention.
Detailed Description
In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the invention.
In order to provide a thorough understanding of the present invention, a detailed description will be given in the following description to illustrate the chemical mechanical polishing method according to the present invention. It will be apparent that the invention may be practiced without limitation to specific details that are within the skill of one of ordinary skill in the semiconductor arts. The following detailed description of the preferred embodiments of the invention, however, the invention is capable of other embodiments in addition to those detailed.
It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the invention. As used herein, the singular is intended to include the plural unless the context clearly dictates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Exemplary embodiments according to the present invention will now be described in more detail with reference to the accompanying drawings. These exemplary embodiments may, however, be embodied in many different forms and should not be construed as limited to only the embodiments set forth herein. It is to be understood that these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of these exemplary embodiments to those skilled in the art. In the drawings, the thicknesses of layers and regions are exaggerated for clarity, and the same elements are denoted by the same reference numerals, and thus the description thereof will be omitted.
The principles of the present invention will be explained below with reference to chemical mechanical polishing of bonded wafers as an example. The embodiment takes chemical mechanical polishing of a bonded wafer as an example, which is not intended to limit the technical solution of the present invention, and it is obvious that the technical solution of the present invention can also be applied to other processes in which a semiconductor wafer needs to be chemically and mechanically polished.
In the chemical mechanical polishing of a semiconductor wafer, there is often a transition polishing of the edge of the semiconductor wafer by the polishing pad, resulting in an uneven thickness distribution across the whole semiconductor wafer after polishing. Referring to fig. 1A and 1B, a schematic plan view and a side sectional view of the relative positions of a polishing pad and a polished wafer during polishing are shown. The polishing pad 100 is placed above a surface to be polished of a semiconductor wafer 101, is brought into contact with the surface to be polished of the wafer, and applies a downward pressure P thereto. In the non-contact process, the polishing pad and the surface of the semiconductor wafer to be polished are relatively parallel, and as shown in FIG. 1C, the polishing pad 100 and the surface of the semiconductor wafer 101 are relatively parallel. In the chemical mechanical polishing process, if the distance between the edge of the polishing pad and the edge of the semiconductor wafer is set to be longer, for example, the distance between the edge of the polishing pad and the edge of the semiconductor wafer is set to be 50mm, when the polishing pad contacts with the semiconductor wafer and applies pressure to the semiconductor wafer, since the polishing pad is made of soft material, it covers the edge of the semiconductor wafer, as shown in fig. 1D, the polishing pad 100 covers the edge of the semiconductor wafer 100, which results in that the edge of the semiconductor wafer after polishing is polished more than the middle portion, thereby resulting in that the edge is thinner. Meanwhile, impurities generated in a grinding process are often caused to exist at an edge contact interface between a chuck and a wafer in chemical mechanical grinding, so that a wafer edge bulge is formed in a wafer adsorption process, as shown in fig. 2A, impurities 204 are introduced into the edge of the chuck 201 in a grinding process, so that the edge of a semiconductor wafer is piled up, wherein the semiconductor wafer is formed by bonding a supporting wafer and a device wafer 203, after grinding, the edge of the device wafer 203 is greatly ground due to the bulge existing at the edge, and after the surface is flattened, the edge of the device wafer is ground less, so that the thickness of the edge of the formed device wafer is thinner than that of the middle part of the formed device wafer. As shown in fig. 2C, the edge thickness d1 of device wafer 203 is less than the center portion thickness d2 due to chuck edge stacking.
In the chemical mechanical polishing process of bonded wafers, the front surface of the device wafer is bonded to the support wafer, and then the back surface of the device wafer is polished to a thickness of about 20 μm or less. Because the edge of the wafer has an inclined plane, after grinding, the inclined plane of the edge is obviously thinner than the middle part due to grinding, and stress concentration is easy to occur, on one hand, devices near the edge of the wafer are influenced, and on the other hand, edge cracking is easy to occur. Fig. 3A-3B are schematic diagrams illustrating a device bonded wafer edge chipping process during a grinding process due to an edge bevel present at the device wafer edge. Bonded wafer 300 is formed by bonding device wafer 302 and support wafer 301 as shown in fig. 3A. After chemical mechanical polishing, the bevel of the edge of device wafer 302 becomes thinner, resulting in edge chipping, as shown in fig. 3B.
For this reason, in the grinding process of the bonded wafer, it is often employed to treat the edge of the device wafer to remove the edge portion having the inclined surface of the device wafer to be ground. Fig. 3A, 3C and 3D are schematic structural diagrams illustrating steps of a bonded wafer in a lapping process after removing an edge portion having an inclined surface of a device wafer to be lapped by edge processing. First, bonding a device wafer 302 to a support wafer 301 to form a bonded wafer, as shown in fig. 3A; next, the device wafer 302 is processed on the device wafer edge to remove the edge portion with the inclined surface of the device wafer to be polished, so as to form a bonded wafer structure as shown in fig. 3C; finally, the bonded wafer is polished to form a polished bonded wafer structure as shown in fig. 3D. However, the wrapping of the edge of the device wafer by the polishing pad during the polishing process and the stacking of the edge of the wafer during the polishing process cannot be avoided, and even after the edge of the device wafer is processed to remove the edge portion with the inclined surface, the thickness of the edge of the device wafer after polishing is 2-3 μm thinner than that of the middle portion. Because the grinding pad covers the edge of the device wafer or the edge is piled up in the wafer adsorption process, the inclined plane or the thinness of the edge of the device wafer after grinding is formed, and the uniformity of other processes (such as an etching process) after back grinding cannot be controlled.
Therefore, a new polishing process is needed to improve the polishing defects of the wafer edge during the polishing process.
The invention provides a chemical mechanical polishing method, which comprises the following steps:
providing a semiconductor wafer to be ground; and
and carrying out chemical mechanical polishing on the semiconductor wafer, and setting the edge position of a polishing pad at an outer side position close to the edge of the semiconductor wafer in the polishing process so as to reduce the coating of the edge of the semiconductor wafer in the process of contacting the polishing pad with the surface to be polished of the semiconductor wafer.
According to the chemical mechanical polishing method, the excessive polishing of the edge of the semiconductor wafer in the polishing process can be reduced, so that the polishing thickness difference of the middle part and the edge of the semiconductor wafer after polishing is reduced, the polishing uniformity of the semiconductor wafer is effectively improved, and the polishing quality of the semiconductor wafer is improved.
A chemical mechanical polishing method according to an embodiment of the invention is described with reference to fig. 4A to 4D, wherein fig. 4A to 4B are schematic structural views of a semiconductor wafer according to an embodiment of the invention. FIG. 4C is a horizontal schematic view of the relative positions of a polishing pad and a wafer to be polished according to an embodiment of the invention, FIG. 4D is a cross-sectional view of the relative positions of the polishing pad and the wafer to be polished according to an embodiment of the invention, and FIG. 4E is a schematic view of the relative positions of a DI water showerhead and the semiconductor wafer according to an embodiment of the invention.
First, a semiconductor wafer is provided.
The exemplary semiconductor wafer shown may comprise any semiconductor material, and may be a bonded wafer formed by bonding a semiconductor material to a support wafer. Referring to fig. 4A, a semiconductor wafer 300 is formed by bonding a support wafer 302 and a device wafer 301 according to an embodiment of the present invention. It should be understood that the present embodiment is not intended to limit the invention to the chemical mechanical polishing of bonded wafers, and any wafer requiring chemical mechanical polishing in a semiconductor process can be applied to the present invention.
Further, the semiconductor material may include, but is not limited to: si, SiC, SiGe, SiGeC, Ge alloys, GeAs, InAs, InP, NDC (Nitrogen doped Si1icon carbide), and other III-V or II-VI compound semiconductors. The support wafer may be a bonded wafer commonly used in the semiconductor industry such as silicon, glass, etc. In one embodiment of the invention, the semiconductor wafer 400 is a bonded wafer of a Si wafer 401 bonded to a supporting wafer glass 402.
Then, edge processing is carried out on the semiconductor wafer to remove the edge part with the inclined surface of the wafer to be ground.
Fig. 4B is a schematic diagram illustrating an edge processing of a bonded wafer after removing an edge portion of the wafer to be polished having an inclined surface. After the edge of the wafer 401 to be ground is removed, the phenomenon that the edge inclined plane is obviously thinner than the middle part of the inclined plane due to grinding is effectively reduced, the influence of the thinner edge of the wafer to be ground on devices near the edge is prevented, and meanwhile, the occurrence of edge cracking after grinding is further reduced.
Illustratively, the method of processing the device wafer edge to remove the edge portion of the semiconductor wafer to be ground having the inclined surface employs an edge trimming process. The edge trimming process can be any method for cutting off the edge of the wafer in the semiconductor process, such as laser cutting, plasma removal and the like. The method is a method commonly used by those skilled in the art and is not described in detail herein.
And then, carrying out chemical mechanical polishing on the semiconductor wafer, and setting the edge position of a polishing pad at an outer side position close to the edge of the semiconductor wafer in the polishing process so as to reduce the coating of the edge of the semiconductor wafer in the process of contacting the polishing pad with the surface to be polished of the semiconductor wafer.
The chemical mechanical grinding is carried out on the semiconductor wafer, namely, the mechanical force is utilized to act on the surface of the semiconductor wafer, the power of fracture corrosion is generated on the surface film layer, and the wafer is thinned and flattened under the action of a corresponding chemical corrosion reagent. Generally, in chemical mechanical polishing, a chemical mechanical polishing apparatus holds a semiconductor wafer, and brings a surface to be polished of the wafer into full contact with a polishing pad to generate a certain force therebetween, while the polishing pad and the semiconductor wafer move relative to each other, thereby polishing the semiconductor wafer. The polishing pad can be a polishing pad disposed above the semiconductor wafer or a polishing pad disposed below the semiconductor wafer. In this embodiment, the present invention is described by still using a polishing pad disposed above a semiconductor wafer, specifically, a platen is disposed above a surface of the semiconductor wafer to be polished, and a chuck is used to absorb the semiconductor wafer and fix the semiconductor wafer under the polishing pad for polishing. It should be understood that the present embodiment is described with the polishing pad above the semiconductor wafer for illustrative purposes and is not intended to limit the present invention, and any polishing method, such as polishing with the polishing pad below the semiconductor wafer, can be used in the present invention.
Illustratively, the position of the edge of the polishing pad is set at an outer position near the edge of the semiconductor wafer during polishing to reduce the wrapping of the edge of the semiconductor wafer during the contact of the polishing pad with the surface of the semiconductor wafer to be polished. Referring to fig. 4C, which is a schematic plan view showing the relative positions of the semiconductor wafer and the polishing pad, the edge position of the polishing pad 403 is set at a position outside the edge of the semiconductor wafer 400, and the polishing pad 403 covers the entire surface of the wafer 400 to be polished. FIG. 4D is a cross-sectional view of the semiconductor wafer and the polishing pad, wherein the polishing pad 403 covers the entire surface of the wafer 400 to be polished, while ensuring that the edge of the polishing pad 403 is close to the edge of the semiconductor wafer 400, which is, for example, 0-2 mm away from the edge of the semiconductor wafer. The edge position of the grinding pad is set at the outer side position of the edge of the semiconductor wafer, so that the coating of the grinding pad on the edge of the semiconductor wafer in the process of contacting with the surface to be ground of the semiconductor wafer is effectively reduced, the excessive grinding of the edge of a device in the grinding process is reduced, the grinding uniformity of the semiconductor wafer is effectively improved, and the grinding quality is improved. Generally, setting the edge position of the polishing pad close to the edge of the semiconductor wafer results in a change in polishing rate, and the flow rate of the polishing slurry can be further set to adjust the polishing rate, so as to improve the influence on the polishing profile of the surface of the semiconductor wafer caused by the change in the position of the polishing pad. Generally, the smaller the distance between the edge of the polishing pad and the edge of the semiconductor wafer, the greater the slurry flow rate is set. In one example, the position of the edge of the polishing pad relative to the edge of the wafer is set from 50mm to 1mm of the edge of the wafer, so that the edge of the polishing pad is close to the edge of the wafer, and the flow rate of the polishing slurry is set to be changed from 0.2L/min to 0.5L/min, so that the influence on the polishing appearance of the surface of the wafer after the position of the polishing pad is changed is improved.
For example, deionized water may be used to clean the wafer edge in real time during the polishing process. Referring to fig. 4E, a schematic diagram of the relative positions of the deionizing nozzle, the semiconductor wafer and the polishing pad is shown as the semiconductor wafer is being cleaned with deionized water at its edge in real time. The cmp apparatus base 406 mounts the semiconductor wafer 400 thereon by using the chuck 405, wherein the semiconductor wafer 400 is formed by bonding the support wafer 402 and the device wafer 401. The polishing pad 403 is disposed above the device wafer 401 of the semiconductor wafer 400, and the deionized water nozzle 404 is disposed at the edge of the semiconductor wafer 400 and directs the sprayed deionized water toward the edge of the semiconductor wafer 400. During the polishing process, the edge of the semiconductor wafer 400 is cleaned in real time with deionized water 404. The deionized water is adopted to clean the semiconductor wafer in real time so as to remove impurities generated in the grinding process and prevent the impurities generated in the grinding process from being attached to a chuck or the surface of the edge of the wafer to cause the excessive grinding of the edge of the wafer by a grinding pad, so that the grinding quality of the edge of the semiconductor wafer is improved, and the grinding uniformity is improved. Meanwhile, the deionized water is adopted to clean the edge of the grinding pad in real time, so that the influence of impurities on the edge of the grinding rotary table in the grinding process is reduced, the maintenance frequency of a grinding cavity can be reduced, and the service life of the grinding rotary table is prolonged.
Illustratively, the wafer edge is cleaned with deionized water using a high-precision deionized water nozzle. The high-precision deionized water nozzle is relative to a common deionized water nozzle, and realizes the precise positioning of deionized water by spraying deionized water in a liquid column form at a high speed. The high-precision deionized water nozzle is adopted to clean the edge of the semiconductor wafer in real time, the deionized water alignment degree is high, the cleaning efficiency is high, the efficiency of removing impurities on the edge of the semiconductor wafer can be further improved, the residues of the impurities on the surfaces of the chuck and the semiconductor wafer in the grinding process of the semiconductor wafer are further reduced, the excessive grinding of the grinding pad on the semiconductor wafer is effectively reduced, the grinding quality of the semiconductor wafer is effectively improved, and the grinding uniformity is improved.
FIGS. 5A-5B are graphs showing the effect of comparing prior art post-CMP uniformity data to post-CMP uniformity data in accordance with the present method. In the example of an 8-inch wafer polished residual thickness of 20 μm, data showing the entire thickness of the polished semiconductor wafer in the diameter direction is performed, and the position of the wafer in the diameter direction is shown on the abscissa, and the data showing the polished thickness of the semiconductor wafer is shown on the ordinate, and the upper portion in the diameter direction is shown as a whole as being thicker. FIG. 5A shows the wafer thickness uniformity data of the whole wafer after CMP in the prior art without the method of the present invention, wherein the wafer edge is thinner than the middle by 2-3 μm after CMP in the prior art without the method of the present invention; FIG. 5B is the data of the wafer thickness uniformity across the wafer after the CMP process according to the present invention, which shows that the difference between the wafer edge and the wafer center thickness is significantly reduced to 1-1.5 μm after the CMP process according to the present invention. Meanwhile, the experimental effect can be verified through repeated experiments. Therefore, according to the method provided by the invention, the grinding thickness difference of the middle part and the edge of the semiconductor wafer in the chemical mechanical grinding process is effectively reduced, the integral uniformity of the ground semiconductor wafer is improved, and the grinding quality is improved.
In summary, according to the chemical mechanical polishing method described in the present invention, the excessive polishing of the edge of the semiconductor wafer during the polishing process can be reduced, so as to reduce the polishing thickness difference between the middle portion and the edge of the semiconductor wafer after polishing, effectively improve the polishing uniformity of the semiconductor wafer, and improve the polishing quality of the semiconductor wafer.
The present invention has been illustrated by the above embodiments, but it should be understood that the above embodiments are for illustrative and descriptive purposes only and are not intended to limit the invention to the scope of the described embodiments. Furthermore, it will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that many variations and modifications may be made in accordance with the teachings of the present invention, which variations and modifications are within the scope of the present invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (7)
1. A chemical mechanical polishing method, comprising:
providing a semiconductor wafer to be ground; and
and performing chemical mechanical polishing on the semiconductor wafer, wherein the edge position of a polishing pad is set at an outer side position close to the edge of the semiconductor wafer in the polishing process so as to reduce the coating of the edge of the semiconductor wafer in the process of contacting the polishing pad with the surface to be polished of the semiconductor wafer, and the flow rate of polishing slurry is set while the edge position of the polishing pad is set close to the edge of the semiconductor wafer so as to adjust the polishing rate.
2. The method of claim 1, further comprising real-time cleaning a contact interface of the semiconductor wafer and a chuck on which the semiconductor wafer is mounted with deionized water during the polishing process.
3. The method of claim 1, wherein the edge position of the polishing pad is set to a position 0-2 mm from the edge of the semiconductor wafer.
4. The method of claim 1, wherein the smaller the distance between the edge of the polishing pad and the edge of the semiconductor wafer, the greater the slurry flow rate is set.
5. The method of claim 1, further comprising the step of removing an edge portion of the semiconductor wafer to be polished having an inclined surface before performing the chemical mechanical polishing on the semiconductor wafer.
6. The method of claim 5, wherein the semiconductor wafer to be ground is subjected to an edge trimming process to remove the edge portion having the inclined surface.
7. The method of claim 1, wherein the semiconductor wafer is a bonded wafer.
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| CN102601718A (en) * | 2012-03-31 | 2012-07-25 | 上海宏力半导体制造有限公司 | Control method and control device for chemical mechanical grinding and method and equipment for chemical mechanical grinding |
| CN102873596A (en) * | 2011-07-12 | 2013-01-16 | 智胜科技股份有限公司 | Polishing pad, polishing method and polishing system |
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| CN103302587A (en) * | 2012-03-16 | 2013-09-18 | 中芯国际集成电路制造(上海)有限公司 | Chemical mechanical polishing (CMP) device and system |
| CN105990163A (en) * | 2015-01-30 | 2016-10-05 | 中芯国际集成电路制造(上海)有限公司 | Wafer bonding method and chemical mechanical planarization method |
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| CN102873596A (en) * | 2011-07-12 | 2013-01-16 | 智胜科技股份有限公司 | Polishing pad, polishing method and polishing system |
| CN103302587A (en) * | 2012-03-16 | 2013-09-18 | 中芯国际集成电路制造(上海)有限公司 | Chemical mechanical polishing (CMP) device and system |
| CN102601718A (en) * | 2012-03-31 | 2012-07-25 | 上海宏力半导体制造有限公司 | Control method and control device for chemical mechanical grinding and method and equipment for chemical mechanical grinding |
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