CN108257851A - Wafer grinding method - Google Patents
Wafer grinding method Download PDFInfo
- Publication number
- CN108257851A CN108257851A CN201810025142.1A CN201810025142A CN108257851A CN 108257851 A CN108257851 A CN 108257851A CN 201810025142 A CN201810025142 A CN 201810025142A CN 108257851 A CN108257851 A CN 108257851A
- Authority
- CN
- China
- Prior art keywords
- blue film
- wafer
- layer
- filling material
- covering
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02013—Grinding, lapping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02016—Backside treatment
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
The invention discloses a kind of wafer grinding methods; in the blue film of wafer frontside covering first layer protection with organic insulator and metal layer; then the surface of blue film is protected to be filled first layer using filling material, then the blue film of surface covering second layer protection in filling material；The blue film of two layers of the protection in front and filling material are removed after finally being carried out back thinning to wafer.The present invention is before carrying out the blue film surface of out-of-flatness conventional back surface and operation is thinned, first planarize blue film surface using some technological means, specifically filling material and covering second layer indigo plant film are used in blue film surface, then conventional thinning back side operation is carried out again, the uniformity of the silicon wafer thickness after being thinned can be effectively improved, and greatly reduces the fragment rate of wafer.
Description
Technical field
The present invention relates to field of semiconductor manufacture, particularly relate to a kind of improve since thickness being thinned caused by crystal column surface step
Degree is uneven, the wafer grinding method of sliver.
Background technology
Silicon chip manufacturing process is related to the deposit of film and growth technique and forms device and inner interconnection structure institute later
The multiple graphic making needed.Advanced IC needs the metal wiring layer of multilayer, is separated between every layer by inter-level dielectric ILD.It establishes
Device architecture and multiple layer inner connection line can naturally enough form step between layers, and surface undulation (topography) describes this
The silicon chip surface of the out-of-flatness occurred in production process.During number of plies increase, silicon chip surface fluctuating will be more significant, and one can connect
The Step Coverage and gap filling received are vital for the yield rate and long-term reliability of chip.
Higher chip package density exacerbates the degree of surface undulation, more and more continually uses multiple layer metal skill now
Art, and smaller device and connection line size are required, there is higher step and the groove of depth-to-width ratio bigger in advanced IC surfaces so that
The problem of surface undulation, is more prominent.
In the front of wafer due to the presence of thick aluminium film and some organic insulations such as polyimides, wafer can be caused
Front is larger with high low head, very the surface topography of out-of-flatness, then in the technique for carrying out thinning back side of silicon wafer, wafer
Front covering surface protection indigo plant film, the sticking nature of blue film, which can also be complied with, shows the surface topography of out-of-flatness, such as Fig. 1 institutes
Show.Discontinuity can be led in process of lapping to the blue film surface of out-of-flatness, on the ground of some polyimide materials covering
There is small crack or crackle in method, edge, especially when silicon chip grinding to thickness is less than 100 microns, as shown in Figure 2.This
Slightly small crackle can lead to the breakage of wafer in subsequent technique.
Invention content
The technical problems to be solved by the invention are to provide a kind of wafer grinding method, improve and rear wafer thickness is thinned
Uniformity reduces the breakage rate of wafer.
To solve the above problems, a kind of wafer grinding method of the present invention：With organic insulator and metal
The blue film of wafer frontside covering first layer protection of layer, then protects the surface of blue film to fill out first layer using filling material
It fills, then the blue film of surface covering second layer protection in filling material；Front is removed after finally being carried out back thinning to wafer two layers
The blue film of protection and filling material.
Further, the organic insulator is polyimides.
Further, described two layers blue film is heat safe blue film.
Further, the filling material material good for low temperature filling capacity.
Further, the filling material is photoresist.
The present invention is before carrying out the wafer of the blue film surface with out-of-flatness conventional back surface and operation is thinned, first using one
A little technological means planarize blue film surface, specifically in blue film surface using material and covering second layer indigo plant film is filled, then
Conventional thinning back side operation is carried out again, can be effectively improved the uniformity of the silicon wafer thickness after being thinned, and greatly reduces wafer
Fragment rate.
Description of the drawings
Fig. 1 is in the blue film of crystal column surface covering with organic insulator, the out-of-flatness table that the height being consequently formed rises and falls
Face.
Fig. 2 is the operation schematic diagram of conventional thinning back side.
Fig. 3 is to cover first layer indigo plant film in crystal column surface and fill the schematic diagram of material.
Fig. 4 is the schematic diagram in crystal column surface covering second layer indigo plant film.
Fig. 5 is the schematic diagram after being carried out back thinning to wafer.
Fig. 6 is the schematic diagram for removing two layers of blue film of crystal column surface and filling material.
Fig. 7 is flow chart of steps of the present invention.
Reference sign
1 is wafer, and 2 be organic insulation, and 3 be blue film, and 4 be filling material.
Specific embodiment
A kind of wafer grinding method of the present invention, it is first, identical with traditional handicraft, with organic insulator 2 with
And the wafer frontside of metal layer covers one layer of heat safe blue film 3 of protection.Organic insulator is a kind of similar to polyimides
The surface of material or some wafers has thick metal layer, such as aluminium.For crystal column surface due to having these materials, surface is thick
Rugosity is higher, and after covering blue film, the sticking nature of blue film equally replicates the surface of out-of-flatness, as shown in Figure 1.Then low temperature is used
The good filling material of filling capacity, such as the material of photoresist one kind protect first layer the surface of blue film to be filled, such as Fig. 3
It is shown.Blue film is protected in the surface covering second layer of filling material again, as shown in Figure 4.After finally being carried out back thinning to wafer
The blue film of two layers of the protection in removal front and filling material, as shown in Figures 5 and 6.
The present invention is carrying out the wafer of the blue film surface with out-of-flatness before operation is thinned in conventional back surface, first using filling out
It fills material to be filled in first layer indigo plant film surface, reduces the surface roughness of the blue film of first layer protection, then cover second again
The blue film of layer protection fills material by addition and protects blue film for second, greatly enhances the flatness on wafer frontside surface, so
It carries out conventional thinning back side operation again afterwards, the uniformity of the silicon wafer thickness after being thinned can be effectively improved, and greatly reduce brilliant
Round fragment rate.
It these are only the preferred embodiment of the present invention, be not intended to limit the present invention.Those skilled in the art is come
It says, the invention may be variously modified and varied.All within the spirits and principles of the present invention, it is any modification for being made, equivalent
Replace, improve etc., it should all be included in the protection scope of the present invention.
Claims (5)
1. a kind of wafer grinding method, it is characterised in that：In the wafer frontside covering the with organic insulator and metal layer
Then the blue film of one layer of protection protects the surface of blue film to be filled, then the table in filling material first layer using filling material
The blue film of face covering second layer protection；The blue film of two layers of the protection in front and filling material are removed after finally being carried out back thinning to wafer
Matter.
2. wafer grinding method as described in claim 1, it is characterised in that：The organic insulator is polyimides.
3. wafer grinding method as described in claim 1, it is characterised in that：The blue film of described two layers is heat safe indigo plant
Film.
4. wafer grinding method as described in claim 1, it is characterised in that：The filling material is good for low temperature filling capacity
Material.
5. wafer grinding method as claimed in claim 4, it is characterised in that：The filling material is photoresist.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810025142.1A CN108257851A (en) | 2018-01-11 | 2018-01-11 | Wafer grinding method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810025142.1A CN108257851A (en) | 2018-01-11 | 2018-01-11 | Wafer grinding method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108257851A true CN108257851A (en) | 2018-07-06 |
Family
ID=62726236
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810025142.1A Pending CN108257851A (en) | 2018-01-11 | 2018-01-11 | Wafer grinding method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108257851A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109637928A (en) * | 2018-12-05 | 2019-04-16 | 中国电子科技集团公司第十三研究所 | Remove the ancillary equipment and method of crystal column surface indigo plant film |
| CN110098116A (en) * | 2019-03-29 | 2019-08-06 | 合肥新汇成微电子有限公司 | A kind of grinding wafer technique |
| CN111900083A (en) * | 2020-07-01 | 2020-11-06 | 上海华虹宏力半导体制造有限公司 | IGBT wafer thinning method |
| CN113314399A (en) * | 2021-06-02 | 2021-08-27 | 美新半导体(天津)有限公司 | Grinding sheet packaging structure and grinding sheet method for bonding wafers |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101367192A (en) * | 2007-08-17 | 2009-02-18 | 中芯国际集成电路制造(上海)有限公司 | Wafer reverse side grinding method |
| JP2011216573A (en) * | 2010-03-31 | 2011-10-27 | Mitsubishi Electric Corp | Method of manufacturing semiconductor device |
| US20120080138A1 (en) * | 2010-10-01 | 2012-04-05 | Disco Corporation | Method of processing plate-shaped body having rugged surface |
| CN106033708A (en) * | 2015-03-11 | 2016-10-19 | 中芯国际集成电路制造(上海)有限公司 | Thickness reduction method for wafer |
| CN107369611A (en) * | 2017-07-11 | 2017-11-21 | 上海朕芯微电子科技有限公司 | Back side metallization technology is thinned in novel wafer |
-
2018
- 2018-01-11 CN CN201810025142.1A patent/CN108257851A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101367192A (en) * | 2007-08-17 | 2009-02-18 | 中芯国际集成电路制造(上海)有限公司 | Wafer reverse side grinding method |
| JP2011216573A (en) * | 2010-03-31 | 2011-10-27 | Mitsubishi Electric Corp | Method of manufacturing semiconductor device |
| US20120080138A1 (en) * | 2010-10-01 | 2012-04-05 | Disco Corporation | Method of processing plate-shaped body having rugged surface |
| CN106033708A (en) * | 2015-03-11 | 2016-10-19 | 中芯国际集成电路制造(上海)有限公司 | Thickness reduction method for wafer |
| CN107369611A (en) * | 2017-07-11 | 2017-11-21 | 上海朕芯微电子科技有限公司 | Back side metallization technology is thinned in novel wafer |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109637928A (en) * | 2018-12-05 | 2019-04-16 | 中国电子科技集团公司第十三研究所 | Remove the ancillary equipment and method of crystal column surface indigo plant film |
| CN109637928B (en) * | 2018-12-05 | 2021-04-06 | 中国电子科技集团公司第十三研究所 | Auxiliary equipment and method for removing blue film on surface of wafer |
| CN110098116A (en) * | 2019-03-29 | 2019-08-06 | 合肥新汇成微电子有限公司 | A kind of grinding wafer technique |
| CN111900083A (en) * | 2020-07-01 | 2020-11-06 | 上海华虹宏力半导体制造有限公司 | IGBT wafer thinning method |
| CN113314399A (en) * | 2021-06-02 | 2021-08-27 | 美新半导体(天津)有限公司 | Grinding sheet packaging structure and grinding sheet method for bonding wafers |
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| PB01 | Publication | ||
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| RJ01 | Rejection of invention patent application after publication | ||
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Application publication date: 20180706 |