CN108241399B - Power consumption step suppression circuit - Google Patents
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Abstract
Before RF communication, the RF working state identification circuit receives an RF closing signal, the power management circuit is started to close a high-power-consumption module on a chip, the control circuit regulates the power consumption of the whole chip to be minimum, after the RF communication is finished, the RF working state identification circuit receives an RF opening signal, the power management circuit opens the closed module before the RF communication, and the power consumption state of the chip before the communication is recovered.
Description
Technical Field
The invention relates to a circuit technology of a smart card, in particular to a power consumption step suppression circuit applied to a non-contact smart card.
Background
The power supply of the non-connected smart card during the groove (slot) of the communication signal can only be provided by the internal energy storage capacitor of the chip, the internal energy storage capacitor is not very large due to the limitation of the area of the chip, and the capacity of the provided stored electric energy is not very strong. Therefore, if the power consumption of the chip is large during the RF communication, the power supply capability of the on-chip energy storage capacitor is limited, which may cause large fluctuation of the power consumption of the whole chip during the recess period, thereby affecting the normal operation of other modules on the chip, and in severe cases, may cause the power off of the chip. How to solve the problem that the step of power consumption during RF communication influences the performance of the non-contact smart card is the problem to be solved by the invention.
The invention provides a power consumption step suppression circuit which is mainly used for suppressing power consumption steps caused by a non-connected smart card in a communication period.
Disclosure of Invention
The technical problem to be solved by the present invention is to overcome the problems in the prior art, and to provide a power consumption step suppression circuit applied to a non-connected smart card, which can suppress the power consumption step caused by the non-connected smart card during communication.
In order to solve the above problems, the technical solution of the present invention is as follows:
before RF communication, the RF working state identification circuit receives an RF closing signal, the power management circuit is started to close a high-power-consumption module on a chip, the control circuit regulates the power consumption of the whole chip to be minimum, after the RF communication is finished, the RF working state identification circuit receives an RF opening signal, the power management circuit opens the closed module before the RF communication, and the power consumption state of the chip before the communication is recovered.
The RF closing signal is an RF module sleep enabling signal input by the clock management module.
The RF starting signal is a communication ending signal input by the RF digital module.
The control circuit adjusts the power consumption of the whole chip to be minimum by adjusting the configurable constant current source ICS and the amplitude limiting compensation VMB circuit.
After the RF working state identification circuit receives the RF starting signal, the control circuit adjusts the configurable constant current source ICS and the amplitude limiting compensation VMB circuit, and the power consumption state of the chip before communication is recovered.
The control circuit comprises a configurable constant current source control circuit and an amplitude limiting compensation control circuit.
The configurable constant current source control circuit is used for controlling the ICS configurable constant current source before and after RF communication, and realizes power consumption compensation of each high-power-consumption module of the system during switching by combining the amplitude limiting compensation VMB circuit.
The amplitude limiting compensation control circuit is used for controlling the amplitude limiting compensation VMB circuit before and after RF communication, and power consumption compensation of each high-power-consumption module of the system during switching is realized by combining the ICS configurable constant current source circuit.
And after the power consumption state of the chip before communication is recovered, outputting a sleep signal for exiting the RF module to the clock management module.
A power consumption step suppression method comprises the following steps:
s1, before RF communication, the RF working state identifying circuit receives an RF closing signal;
s2, starting a power management circuit to close the on-chip high-power-consumption module;
s3, the control circuit adjusts the power consumption of the whole chip to the minimum;
s4, after the RF communication is finished, the RF working state identification circuit receives an RF starting signal;
s5, turning on the module which is closed before the RF communication by the power management circuit;
and S6, restoring the power consumption state of the chip before communication.
The power consumption step restraining method further includes step S7, after the power consumption state of the chip before communication is recovered, outputting a sleep signal exiting the RF module to the clock management module.
The power consumption step suppression circuit provided by the invention can suppress the power consumption step caused by the non-connected smart card during the communication period, and improve the performance of the product.
Drawings
The invention is described in detail below with reference to the drawings and the detailed description;
fig. 1 is a circuit block diagram illustrating a power consumption step suppression circuit according to an embodiment of the present invention.
Detailed Description
In order to make the technical means, the creation characteristics, the achievement purposes and the effects of the invention easy to understand, the invention is further explained below by combining the specific drawings.
The invention discloses a power consumption step suppression circuit which is mainly applied to suppression of power consumption steps caused by a non-connected smart card during communication.
The power supply of the non-connected smart card during the groove of the communication signal can only be provided by the energy storage capacitor inside the chip, the area of the chip is limited, the energy storage capacitor inside the chip cannot be large, and the capacity of the provided stored electric energy cannot be strong. Therefore, if the power consumption of the chip is large during the RF communication, the power supply capability of the on-chip energy storage capacitor is limited, which may cause large fluctuation of the power consumption of the whole chip during the recess period, thereby affecting the normal operation of other modules on the chip, and in severe cases, may cause the power off of the chip. The problem addressed by the present invention is that the step in power consumption during RF communication affects the performance of the contactless smart card.
The invention provides a power consumption step suppression circuit applied to a non-contact smart card. According to the invention, the power management circuit is started to open or close the IP with high power consumption on the chip according to the RF module sleep enabling signal input by the clock management module before the RF communication is started and the communication ending signal input by the RF digital module after the RF communication is started by the non-connected smart card chip, and then the configurable constant current source ICS and the amplitude limiting compensation VMB circuit are controlled, so that the power consumption of the chip power supply is stably lifted in the RF communication process, and the phenomenon of RF communication abnormity caused by the large fluctuation of the power supply voltage due to the influence of power consumption steps is avoided.
According to one embodiment of the invention, the power consumption step suppression circuit comprises an RF working state identification circuit, a control circuit and a power management circuit, wherein before RF communication, the RF working state identification circuit receives an RF closing signal, the power management circuit is started to close a high-power-consumption module on a chip, the control circuit adjusts the power consumption of the whole chip to be minimum, after the RF communication is finished, after the RF working state identification circuit receives an RF opening signal, the power management circuit opens the closed module before the RF communication, and the power consumption state of the chip before the communication is recovered.
The RF off signal is an RF module sleep enable signal input by the clock management module.
The RF starting signal is a communication ending signal input by the RF digital module.
The control circuit adjusts the power consumption of the whole chip to be minimum by adjusting the configurable constant current source ICS and the amplitude limiting compensation VMB circuit.
After the RF working state identification circuit receives the RF starting signal, the control circuit adjusts the configurable constant current source ICS and the amplitude limiting compensation VMB circuit, and the power consumption state of the chip before communication is recovered.
The control circuit comprises a configurable constant current source control circuit and an amplitude limiting compensation control circuit.
The configurable constant current source control circuit controls the ICS configurable constant current source before and after RF communication, and realizes power consumption compensation of each high-power-consumption module of the system during switching by combining the amplitude limiting compensation VMB circuit.
And the amplitude limiting compensation control circuit controls the amplitude limiting compensation VMB circuit before and after RF communication, and combines with the ICS configurable constant current source circuit to realize power consumption compensation when each high-power-consumption module of the system is switched on and switched off.
And after the power consumption state of the chip before communication is recovered, outputting a sleep signal for exiting the RF module to the clock management module.
Fig. 1 is a circuit block diagram illustrating a power consumption step suppression circuit according to an embodiment of the present invention.
Signals 1-9 in fig. 1 are as follows:
signal 1: RF module sleep enable signal cpumd _ rfsleep _ en
Signal 2: the RF working state identification circuit sends out a standby _ en signal
Signal 3: the RF digital module sends out a communication end signal RF _ done
Signal 4: the RF working state identification circuit outputs a standby _ end signal
Signal 5: RF working state recognition circuit scheduling configurable constant current source control circuit, amplitude limiting compensation control circuit and power management circuit signal
Signal 6: power management circuit opens and closes big power consumption module control signal
Signal 7: ICS control signals (BYPASS _ ICS, ICS _ SET, ICS _ EN)
Signal 8: VMB control signal (VMBD _ SET, VMB _ EN)
Signal 9: VMBD _ OUT
As shown in fig. 1, before RF communication, the RF operation status identification circuit 101 receives the signal 1, and the RF module sleep enable signal cpumd _ rfsleep _ en. The RF operation state identification circuit 101 issues a signal 2standby _ en. And starting the power management circuit to close the high-power-consumption module on the chip, and adjusting the power consumption of the whole chip to be minimum by the control circuit. After the RF communication is finished, the RF operating state recognition circuit 101 receives the signal 3, and the RF digital module sends a communication end signal RF _ done. The RF operation state identification circuit 101 outputs a signal 4standby _ end. The power management circuit turns on the module which is closed before the RF communication, and restores the power consumption state of the chip before the communication. The RF operation state recognition circuit 101 may issue a signal 5, a scheduling configurable constant current source control circuit (ICS control circuit) 103, a clipping compensation control circuit (VMB control circuit) 104, and a power management circuit 102.
The power management circuit 102 outputs a signal 6 and turns on/off a control signal of the high power module according to a signal transmitted from the RF operation state recognition circuit 101. The ICS control circuit 103 outputs a signal 7, ICS control signals including BYPASS _ ICS, ICS _ SET, ICS _ EN, based on the signal from the RF operation state recognition circuit 101. The VMB control circuit 104 outputs a signal 8, VMB control signals including VMBD _ SET and VMB _ EN, based on the signal from the RF operation state recognition circuit 101. The VMB control circuitry 104 receives the signal 9, VMBD _ OUT.
According to one embodiment of the invention, a constant current source ICS is a configurable constant current source, and the ICS is controlled to enter a BYPASS or active state through a port BYPASS _ ICS; ICS _ SET [ 6: 0] controls the ICS current control parameter, and ICS _ EN controls the ICS module enable.
The power consumption compensation of the VMB power supply is an amplitude limiting compensation circuit, the total power consumption of the chip is balanced through discharging current, so that the sum of the current discharged by the VMB and the current consumed by each module in the chip is equal to the current output by the ICS, and the current consumption of the port VMBD _ SET [ 1: 0] configuring a detection point of the consumption current of the VMB module, VMB _ EN is an enable signal of the VMB module, VMBD _ OUT is a VMB module bleeding current flag signal, and when VMB _ EN is 0, VMBD _ OUT is 1; when VMB _ EN is 1 and VMBD _ OUT is 1, it means that the VMB bleed current is greater than the threshold SET by VMBD _ SET.
Before RF communication, software inputs an RF module sleep enabling signal cpumd _ rfsleep _ EN through a configuration clock management module, an RF working state identification circuit 101 receives the signal and then starts a power management circuit 102 to close a high-power-consumption module (such as an EEPROM, an RSA algorithm module and the like), a configurable constant current source control circuit 103 gradually reduces an ICS _ SET on the basis of an original ICS _ SET configuration value until a VMBD _ OUT is changed into 0 when a VMBD _ OUT reduces to a VMB leakage current smaller than a threshold SET by the VMBD _ SET due to ICS output current, the VMB amplitude limiting compensation control circuit detects that the VMBD _ OUT is 0 to close a VMB enabling signal VMB _ EN, and then the configurable ICS constant current source control circuit SETs a BYPSS _ ICS control module to enter a BYPASS state and close the ICS module enabling. At this time, the whole chip enters the minimum power consumption state, the RF working state identification circuit sends a standby _ en signal to the RF digital module to inform that communication can be started, and the power consumption consumed in the subsequent RF communication period is only the circuit part related to the RF communication.
After the non-connected smart card chip completes RF communication, the RF digital module sends a communication end signal RF _ done, the RF working state identification circuit 101 receives the signal and informs the configurable constant current source control circuit 103 to configure the ICS _ SET to a SET value, the power management circuit 102 opens a high power consumption module which is closed before the RF communication, the ICS configurable constant current source control circuit 103 firstly opens an ICS module to enable, and then SETs the BYPASS _ ICS to control the ICS module to enter an active state. The amplitude limiting compensation control circuit 104 turns on a VMB enable signal VMB _ EN, the IP module participating in chip work after the VMB module is enabled completes the amplitude limiting compensation function, and the RF digital module outputs a standby _ end signal to notify the clock management module that the power consumption adjustment is completed.
As described above, the present invention controls the configurable constant current source ICS and the clipping compensation VMB circuit before and after RF communication, so that the power consumption of the chip power supply does not fluctuate greatly during RF communication, and the configuration value of ICS _ SET can be SET by the nonvolatile device of the chip, increasing the flexibility of use.
According to an embodiment of the present invention, there is provided a power consumption step suppression method, including:
s1, before RF communication, the RF working state identifying circuit receives an RF closing signal;
s2, starting a power management circuit to close the on-chip high-power-consumption module;
s3, the control circuit adjusts the power consumption of the whole chip to the minimum;
s4, after the RF communication is finished, the RF working state identification circuit receives an RF starting signal;
s5, turning on the module which is closed before the RF communication by the power management circuit;
and S6, restoring the power consumption state of the chip before communication.
The power consumption step restraining method further includes step S7, after the power consumption state of the chip before communication is recovered, outputting a sleep signal exiting the RF module to the clock management module.
The control circuit for inhibiting the power consumption step is used for power consumption management of a CPU (central processing unit) type intelligent card chip for non-connection, and can improve the performance of a product and enhance the power consumption step inhibiting capability and flexibility.
The foregoing shows and describes the general principles, essential features, and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited by the foregoing examples, which are provided to illustrate the principles of the invention, and that various changes and modifications may be made without departing from the spirit and scope of the invention, which is also intended to be covered by the appended claims. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (8)
1. A power consumption step suppression circuit is characterized by comprising an RF working state identification circuit, a control circuit and a power management circuit, wherein before RF communication, the RF working state identification circuit receives an RF turn-off signal and starts the power management circuit to turn off a high-power-consumption module on a chip, the control circuit adjusts the power consumption of the whole chip to be minimum, after the RF communication is finished, after the RF working state identification circuit receives an RF turn-on signal, the power management circuit turns on the module which is turned off before the RF communication and restores the power consumption state of the chip before the communication, wherein the control circuit adjusts a configurable constant current source ICS control circuit and a limiting compensation VMB control circuit to adjust the power consumption of the whole chip to be minimum, the configurable constant current source ICS control circuit receives signal control circuit control parameters and ICS module enabling ICS sent by the RF working state identification circuit, and the limiting compensation VMB control circuit balances the total power consumption of the chip through a discharge flow, the sum of the current discharged by the VMB and the current consumed by each module in the chip is equal to the current output by the ICS, wherein the ICS control circuit of the configurable constant current source gradually reduces the ICS _ SET on the basis of the original ICS _ SET configuration value until the VMBD _ OUT is changed into 0 when the current discharged by the VMB is reduced to a threshold value SET by the VMBD _ SET due to the reduction of the ICS output current, the amplitude limiting compensation VMB control circuit detects that the VMBD _ OUT is 0 and closes the VMB enable signal VMB _ EN, and then the ICS control circuit of the ICS controls the ICS module to enter a BYPASS state and simultaneously closes the ICS module enable.
2. The power consumption step suppression circuit of claim 1, wherein the RF off signal is an RF module sleep enable signal input by a clock management module.
3. The power consumption step suppression circuit of claim 1, wherein the RF turn-on signal is an end-of-communication signal input by an RF digital module.
4. The power consumption step suppression circuit according to claim 1, wherein the configurable constant current source ICS control circuit is configured to control the ICS configurable constant current source before and after RF communication, and the limiting compensation VMB control circuit is combined to implement power consumption compensation when each high power consumption module of the system is switched on and off.
5. The power consumption step suppression circuit of claim 1, wherein the clipping compensation VMB control circuit is used to implement power consumption compensation when switching on and off each high power consumption module of the system in combination with the configurable constant current source ICS control circuit before and after RF communication.
6. The power consumption step suppression circuit of claim 1, wherein the recovery chip outputs an exit RF module sleep signal to the clock management module after a pre-communication power consumption state.
7. A power consumption step suppression method is characterized by comprising the following steps:
s1, before RF communication, the RF working state identifying circuit receives an RF closing signal;
s2, starting a power management circuit to close the on-chip high-power-consumption module;
s3, the control circuit adjusts the power consumption of the whole chip to the minimum by adjusting a configurable constant current source ICS control circuit and a limiting compensation VMB control circuit, the configurable constant current source ICS control circuit receives signals sent by an RF working state identification circuit to control ICS circuit control parameters and ICS module enabling, the limiting compensation VMB control circuit balances the total power consumption of the chip by discharging current, so that the sum of the current discharged by the VMB and the current consumed by each module in the chip is equal to the current output by the ICS, wherein the configurable ICS constant current source control circuit gradually reduces the ICS _ SET on the basis of the original ICS _ SET configuration value until the VMBD _ OUT becomes 0 when the ICS output current is reduced to the threshold value SET by the VMBD _ SET, the limiting compensation VMB control circuit detects that the VMBD _ OUT is 0 VMB close enable signal VMB _ EN, and then the ICS configurable constant current source ICS control circuit SETs the BPASS _ ICS control ICS module to enter a BYPASS state and close the ICS module enabling (ii) a
S4, after the RF communication is finished, the RF working state identification circuit receives an RF starting signal;
s5, turning on the module which is closed before the RF communication by the power management circuit;
and S6, restoring the power consumption state of the chip before communication.
8. The power consumption step suppression method of claim 7, further comprising a step S7 of outputting a sleep exit RF module signal to the clock management module after the recovery chip is in the power consumption state before communication.
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