CN108231726A - 具有双基底和减小电感的功率模块组件 - Google Patents

具有双基底和减小电感的功率模块组件 Download PDF

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Publication number
CN108231726A
CN108231726A CN201711292377.9A CN201711292377A CN108231726A CN 108231726 A CN108231726 A CN 108231726A CN 201711292377 A CN201711292377 A CN 201711292377A CN 108231726 A CN108231726 A CN 108231726A
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layer
substrate
sinter
external component
semiconductor device
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CN108231726B (zh
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T·G·沃德
C·C·斯坦库
M·亚克希奇
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GM Global Technology Operations LLC
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GM Global Technology Operations LLC
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Abstract

一种功率模块组件，其具有第一基底，该第一基底包括第一层、第二层以及第三层。该第一层配置为载送沿第一方向流动的开关电流。第二基底操作地连接于第一基底并且包括第四层、第五层以及第六层。导电结合层连接第一基底的第三层和第二基底的第四层。导电结合层可以是第一烧结层。第一基底的第三层、第一烧结层和第二基底的第四层配置为作为单体导电层一起起作用，该单体导电层载送沿第二方向的开关电流，该第二方向基本上与第一方向相反。净电感通过沿相反方向行进的开关电流的抵消效应来减小。

Description

具有双基底和减小电感的功率模块组件
背景技术
本发明涉及一种具有双基底和减小电感的功率模块组件。具有用于产生功率的半导体装置的功率模块用在各种设置中。例如，混合动力车辆可利用功率模块来对电动机/发电机供电。期望生产一种功率模块组件，该功率模块组件提供高功率密度，同时产生低寄生电感。组件的布置影响其产生功率以及电感的能力。
发明内容
功率模块组件具有第一基底，该第一基底包括第一层、第二层以及第三层，该第一层和第三层是导电的。第一层配置为载送沿第一方向流动的开关电流。第二层是电绝缘层，该电绝缘层定位在第一和第三层之间并且配置为使得它们电气地隔离。第二基底操作地连接于第一基底并且包括第四层、第五层以及第六层。第四层和第六层配置为是导电的。第五层是电绝缘层，该电绝缘层定位在第四和第六层之间并且配置为使得它们电气地隔离。导电结合层连接第一基底的第三层和第二基底的第四层。第一基底的第三层、导电结合层以及第二基底的第四层配置为作为单体导电层一起起作用，该单体导电层载送沿第二方向的开关电流，该第二方向基本上与第一方向相反。换句话说，净电感通过开关电流在第一层和单体导电层中沿相反方向行进的抵消效应而减小。
导电结合层可以是第一烧结层，该第一烧结层配置为结合第一和第二基底。形成组件的方法包括经由烧结工艺来生产第一烧结层。烧结工艺包括经由在预定温度下加热预定时间来促使预定金属的微粒子聚结成固体形式。烧结工艺可包括在预定压力下将预定金属的微粒子压缩在第一和第二基底之间。
该组件配置为支持半导体装置的高切换频率操作，并且在低寄生电感的情形下提供高功率密度。该组件的布置实现低电感换向路径，该低电感换向路径通过将单体导电层用作用于开关电流的返回路径来实现。
第一层、第三层、第四和第六层可各自由铝和铜的至少一个构成。第二和第五层可由氮化硅、氮化铝和氧化铝的至少一个构成。第一烧结层可由银构成。
该组件包括第一半导体堆叠，该第一半导体堆叠在第一结合部处操作地连接于第一层。第一外部构件在第二结合部处操作地连接于第一层。第二半导体堆叠在第三结合部处操作地连接于第一层。第二外部构件在第四结合部处操作地连接于第四层。
第一和第二外部构件具有相应的第一、第二以及第三部段，相应的第一和第三部段基本上是平行的。相应的第二部段可基本上垂直于相应的第一和第三部段。第一外部构件可具有由相应间隙隔开的第一多个指部。第二外部构件可具有由相应间隙隔开的第二多个指部。
该组件可包括第一端子和第二端子，该第一端子操作地连接于第一基底，且该第二端子操作地连接于第二基底。开关电流在第一和第二端子之间限定切换环路。切换环路配置为：从第一端子延伸至第一层；从第一层延伸至第一结合部处的第一半导体堆叠；以及从第一半导体堆叠延伸至第一外部构件。切换环路进一步配置为：从第一外部构件延伸至第二结合部处的第一层；从第一层延伸至第三结合部处的第二半导体堆叠；从第二半导体堆叠延伸至第二外部构件；从第二外部构件延伸至第四结合部处的单体导电层；以及从单体导电层延伸至第二端子。
第一半导体堆叠可包括第一半导体装置、第一金属层以及第二金属层。第一半导体装置夹在第一和第二金属层之间。第二烧结层可定位在第一金属层和第一半导体装置之间。第三烧结层可定位在第二金属层和第一半导体装置之间。第一半导体堆叠进一步包括：第四烧结层，该第四烧结层定位在第一外部构件和第一金属层之间。第五烧结层可定位在第二金属层和第一基底的第一层之间。
第二半导体堆叠可包括第二半导体装置、第一金属层以及第二金属层。第二半导体装置夹在第一和第二金属层之间。第二烧结层可定位在第一金属层和第二半导体装置之间。第三烧结层可定位在第二金属层和第二半导体装置之间。第一半导体堆叠进一步包括：第四烧结层，该第四烧结层定位在第一外部构件和第一金属层之间。第五烧结层可定位在第二金属层和第一基底的第一层之间。
该组件可包括至少一个挠性结构，该至少一个挠性结构操作地连接于第一层并且配置为提供相对较低的电感来用于(栅极)控制环路。挠性结构具有多个共同延伸层，包括第一栅极层、第二源极层以及第三漏极层。第一栅极层、第二源极层以及第三漏极层彼此电气地隔离。第一栅极层和第二源极层配置为使得栅极电流沿第三方向在第一栅极层中流动并且源极电流沿第四方向在第二源极层中流动，以至少部分地限定控制环路。第四方向可基本上与第三方向相反。
开关电流限定穿过第一参考平面的切换环路。栅极电流和源极电流在第二参考平面中限定控制环路。第一参考平面可垂直于第二参考平面。挠性结构中的第三漏极层的相应宽度可基本上小于第一栅极层和第二源极层的相应宽度。这显著地减小在测量环路中在第一栅极层和第三漏极层之间的电容耦合。
该组件可配置为支持高切换频率下的操作。在一个非限制示例中，高切换频率是至少75kHz。高频率下的操作有益于整体系统设计，因为这允许减小体积、质量以及尺寸。功率模块组件设计成包含宽带-间隙半导体装置，这会减小相关联的装置能量损失。
当结合附图时，从以下对用于执行本发明的最佳模式的详细描述中，本发明的以上特征和优点以及其它特征和优点显而易见。
附图说明
图1是功率模块组件的示意立体图；
图2是图1所示组件通过轴线2-2的示意剖视图；以及
图3是图1所示组件的一部分的示意立体图。
具体实施方式
参照附图，其中，类似的附图标记指代类似的部件，图1示意地示出功率模块组件10。图2是组件10的示意剖视图。组件10可用以对装置12的一个或多个部件供电。装置12可以是移动平台，例如但不限于标准乘用车、越野车、轻型卡车、重型载重车辆、ATV、面包车、公交车、交通车辆、自行车、机器人、农具、体育相关设备、船只、飞机、火车或其它运输装置。装置12可采取许多不同的形式并且包括多个和/或替代的部件和设施。应理解的是，附图并未是按比例绘制的。
参照图1-2，组件10包括第一基底14，该第一基底操作地连接于第二基底22。参照图2，第一基底14包括第一层16、第二层18以及第三层20。第一层16和第三层20配置为是导电的。第二层18是电绝缘层，该电绝缘层定位在第一和第三层16、20之间并且配置为使得它们电气地隔离。参照图2，第二基底22包括第四层24、第五层26以及第六层28。第四层24和第六层28配置为是导电的。第五层26是电绝缘层，该电绝缘层定位在第四和第六层24、28之间并且配置为使得它们电气地隔离。
第一层16、第三层20、第四层24以及第六层28可各自由电导体构成，其包括但不限于铝、铜、钢和各种合金组合，并且可呈接合线、带或条的形式。第二和第五层18、26可各自由电绝缘体构成，包括但不限于氮化铝、氧化铝或氮化硅。
参照图2，第一基底14的第三层20和第二基底22的第四层24通过导电结合层30连接。称为第一烧结层30的导电结合层30可经由烧结工艺形成，该烧结工艺包括经由在预定温度下加热预定时间来促使预定金属的微粒子聚结成固体形式。预定金属可以是银。例如，预定金属的微粒子可在第一和第二基底14、22之间在炉子中布置在300摄氏度下一个小时。烧结工艺可包括在预定压力下将预定金属的微粒子压缩在第一和第二基底14、22之间。烧结工艺可在真空中执行以避免与空气/氧气发生不期望的反应。烧结工艺通过加热将粉末微粒子固结或扩散成固体或多孔物质，而不会液化。第一烧结层30与焊接在其上的层相比具有相对较高的熔点。在一个示例中，第一烧结层30的熔点是900摄氏度。
参照图2，第一层16包括第一部分32和第二部分33，各自具有蚀刻或以其它方式粘附于其的相应电路型式。第一层16配置为载送沿第一方向(由箭头B指示)流动的开关电流。第一基底14的第三层20、第一烧结层30以及第二基底22的第四层24配置为作为单体导电层36一起起作用，以沿基本上与第一方向(箭头B)相反的第二方向(由箭头H、I和J指示)在返回路径中载送开关电流，由此减小组件10的电感。
换句话说，净电感通过开关电流在第一层16和单体导电层36中沿相反方向行进的磁场抵消效应而减小。单体导电层36中的电气返回路径使得实现低电感换向路径，从而实现显著地减小电寄生电感。组件10配置为支持高切换频率操作，并且在低寄生电感的情形下提供高功率密度。
参照图1，组件10可以细分成多个子模块，例如子模块40A、40B、40C。图2是组件10的示意剖视图，以示出子模块40A。参照图1，每个子模块40A-C包括第一端子42(其可以是正极或负极的)和第二端子44(其可以是负极或正极的)。第一端子42具有与第二端子44相反的极性。第一和第二端子42、44可由铜片构成。每个子模块40A-C包括相应的输出节点46，用以将信号传出至装置12的部件。
子模块40A-C的每个包括设置成堆叠的多个半导体装置50(之后省略“多个”)。参照图1，子模块40A-C的每个各自包括八个半导体装置50，然而，数量可根据手的应用而改变。应注意的是，双基底(第一和第二基底14、22)允许组件10能具有两倍热质量以及较大的厚度。较大的厚度允许较大的热传播，从而降低多个半导体装置50在组件10中的结温(下文描述)。参照图2，第一、第二、第三、第四、第五以及第六层16、18、20、24、26、28的每个配置为是导热的，以使得来自第一层16的热量经由每个中间层传导至第六层28。第六层28配置为将热量耗散至冷却介质(未示出)。
参照图2，第一子模块40A包括第一半导体堆叠52，该第一半导体堆叠在第一结合部54处操作地连接于第一层16。在图1所示的实施例中，子模块40A-C的每个各自包括两个堆叠，然而数量可改变。第一外部构件56在第二结合部58处操作地连接于第一层16。持续参照图2，第二半导体堆叠60在第三结合部62处操作地连接于第一层16。第二外部构件64在第四结合部66处操作地连接于第四层24。
参照图2，开关电流在第一和第二端子42、44之间限定切换环路70(参见箭头A至K)。切换环路70配置为：从第一端子42(参见箭头A)延伸至第一层16(参见箭头B)；从第一层16延伸至第一结合部54处的第一半导体堆叠52；以及从第一半导体堆叠52延伸至第一外部构件56(参见箭头C)。切换环路70进一步：从第一外部构件56延伸至第二结合部58处的第一层16(参见箭头D)；从第一层16(参见箭头E)延伸至第三结合部62处的第二半导体堆叠60；从第二半导体堆叠60延伸至第二外部构件64(参见箭头F)。切换环路70进一步：从第二外部构件64(参见箭头G)延伸至第四结合部66处的单体导电层36；以及从单体导电层36(参见箭头H、I和J)延伸至第二端子44(参见箭头K)。切换环路70配置为在所示的实施例中延伸通过第一参考平面(X-Z平面)。
参照图2，第一半导体堆叠52包括第一半导体装置72。类似地，第二半导体堆叠60包括第二半导体装置74。第一和第二半导体装置72、74可由诸如硅晶片的半导体晶片构成。第一和第二半导体装置72、74可包括但不限于：用于放大或切换电信号的诸如金属氧化物半导体场效应晶体管(MOSFET)的宽带间隙装置、垂直结型场效应晶体管(VJFET)、绝缘栅极双极晶体管(IGBT)或本领域技术人员采用的其它装置。
参照图2，第一半导体装置72可夹在(或操作地定位在)第一金属层76A和第二金属层78A之间。第一半导体装置72的相对侧部的一个可经由通过上述烧结工艺形成的第二烧结层80A连接于第一金属层76A。第一半导体装置72的另一相对侧部可经由同样通过上述烧结工艺形成的第三烧结层82A连接于第二金属层78A。第一半导体堆叠52进一步包括：第四烧结层84A，该第四烧结层定位在第一外部构件56和第一金属层76A之间。第五烧结层86A可定位在第二金属层78A和第一基底14的第一层16之间。
类似地，参照图2，第二半导体装置74可夹在(或操作地定位在)第一金属层76B和第二金属层78B之间。第二半导体装置74的相对侧部的一个可经由通过上述烧结工艺形成的第二烧结层80B连接于第一金属层76B。第二半导体装置74的另一相对侧部可经由同样通过上述烧结工艺形成的第三烧结层82B连接于第二金属层78B。第二半导体堆叠60进一步包括：第四烧结层84B，该第四烧结层定位在第二外部构件64和第一金属层76B之间。第五烧结层86B可定位在第二金属层78B和第一基底14的第一层16之间。
第二、第三、第四和第五烧结层80A-B、82A-B、84A-B、86A-B的每个可由银构成。上文描述的布置改进从第一和第二半导体装置72、74向冷却剂(未示出)的热传递。然而，第一和第二半导体装置72、74能以本领域技术人员采用的其它方式封装或金属化。
参照图2，第一外部构件56配置为将第一半导体装置72(经由第四烧结层84A)电气地连接于第一层16。第二外部构件64配置为将第二半导体装置74(经由第四烧结层84B)电气地连接于第二基底22。第一和第二外部构件56、64可各自由包括但不限于铝、铜、钢和合金的各种组合的电力导体构成，并且可呈线、带或条形成。除了如上所述的电气连接线以外，第一和第二外部构件56、64提供路径来从第一和第二半导体装置72、74提取出热量，由此改进组件10的总体热性能。
参照图1，第一外部构件56可具有由相应间隙90隔开的第一多个指部88。参照图1，第二外部构件64可具有由相应间隙94隔开的第二多个指部92。第一和第二多个指部88、92的每个定位在其中一个半导体装置50之上。参照图2，第一和第二外部构件56、64具有相应的第一、第二和第三部段96A-B、97A-B和98A-B。对于第一外部构件56：相应的第一和第三部段96A、98A可以是基本上平行的，而相应的第二部段97A可基本上垂直于相应的第一和第三部段96A、98A。对于第二外部构件64：相应的第一和第三部段96B、98B可以是基本上平行的，而相应的第二部段97B可基本上垂直于相应的第一和第三部段96B、98B。
参照图1-3，组件10可包括操作地连接于第一层16的一个或多个挠性结构100。参照图1，子模块40A包括第一和第二挠性结构102、104。虽然子模块40A-C的每个各自在图1中具有两个挠性结构100，可采用其它合适的配置。挠性结构100可相对紧靠于多个半导体装置50直接地连接于第一基底14，以使得精确表征漏源开关电压。可采用本领域技术人员所使用的其它配置。
参照图1，每个挠性结构100包括第一和第二侧部部分106、108(在所示的实施例中平行于Z轴线)以及基部部分110(在所示的实施例中平行于Y轴线)，且基部部分在两个侧部连接部之间。第一和第二侧部部分106、108允许挠性结构100能具有连接于栅极驱动器(未示出)的两个物理连接部，以将控制环路126(下文描述)减半。
参照图3，挠性结构100具有多个共同延伸层112，包括第一栅极层114、第二源极层116以及第三漏极层118。第一栅极层114、第二源极层116和第三漏极层118相对紧靠于彼此定位，并且经由相对较薄的绝缘聚合物120彼此电气地隔离。第一栅极层114、第二源极层116和第三漏极层118包括粘附于其上的导电电路型式并且配置为相对较宽且相对较短。导电电路型式能通过从聚合物基部上蚀刻金属箔覆层(例如铜)、电镀金属、导电墨水的印刷以及本领域技术人员采用的其它工艺来形成。
为了支持半导体装置50的高切换速度，组件10可用于这里称为控制环路126的栅极源环路。第一栅极层114和第二源极层116配置为使得栅极电流沿第三方向122在第一栅极层114中流动并且源极电流沿第四方向124在第二源极层116中流动，以共同地限定控制环路126。第四方向124可基本上与第三方向122相反，以使得控制环路126中的寄生电感能经由电流抵消而最小。控制栅极源电压的振铃最小，以使得实现较快的转换率并且在增大的切换频率下操作。
例如上文参照图2所进行的描述，开关电流限定切换环路70，该切换环路配置为延伸穿过第一参考平面(在所示的实施例中是X-Z平面)。参照图3，控制环路126配置为延伸穿过第二参考平面(在所示出的实施例中是Y-Z平面)。切换环路70(图2)和控制环路126(图3)配置为正交的，由此使得磁性交叉耦合最小。换言之，第一参考平面(X-Z平面)垂直于第二参考平面(Y-Z)。这防止由来自切换环路70的高电流速率(di/dt)转换率而触发的不期望控制环路动作。
第一栅极层114和第二源极层116紧紧地耦合，从而产生用于控制环路126的低电感。类似地，第二源极层116和第三漏极层118紧密地耦合，以有效地减小测量环路的电感。组件10具有如下技术优点：当在半导体装置50中产生高切换时，控制环路126不会接收噪声，以使得能够在它们的全速状态下使用快速切换装置。附加地，半导体装置50的快速切换减小切换损失、增大组件10的总体效率。此外，切换环路70的低电感设计确保半导体装置50中的电压过冲在发生高电流速率(di/dt)切换时保持较低。
参照图1-3，多个栅极电阻器130可直接地结合在每个挠性结构100上。栅极电阻器130控制半导体装置50的接通和关闭转换率。将栅极电阻器130直接地定位在挠性结构100上减小控制环路126的总体尺寸，以减小该控制环路的电感。组件10可在各个结合部处包括多个金属焊盘、例如图3中示出的金属焊盘132，以将栅极电阻器130电气地连接于栅极层114。参照图1，半导体装置50的每个可分别经由第一和第二接合线134、136操作地连接于其中一个挠性结构100的第一栅极层114和第二源极层116。第一和第二接合线134、136可邻近于输出节点46(参见图2)定位。
参照图1-2，第一挠性结构102布置在第一半导体堆叠52的与第一外部构件56的相对侧部上。参照图1，第二挠性结构104布置在第二半导体堆叠60的与第二外部构件64的相对侧部上。这提供如下技术优点：减小第一和第二外部构件56、64所需的材料的尺寸和长度。此外，第一和第二外部构件56、64下方的面积和容积也减小，从而降低寄生电感。挠性结构100可定位成紧靠于第一半导体装置72。例如，挠性结构100可定位在远离第一半导体装置72的约1mm和2mm之间。这提供如下技术优点：将切换和控制环路的电感保持较低。
附加地，挠性结构100可定位在半导体装置50以及第一和第二端子42、44之间，以使得对于切换环路70的电感影响最小。在挠性结构100的长度保持较短且挠性结构100和半导体装置50之间的距离最短时，将挠性结构100布置在半导体装置50和端子42、44之间减小控制环路电感。附加地，这并不干涉开关电流路径，以允许宽传导路径来用于开关电流，以减小切换环路电感。
如上所述，视图并非按比例绘制。挠性结构100中的第三漏极层118的相应宽度可基本上小于第一栅极层114和第二源极层116的相应宽度。例如，第三漏极层118的相应宽度可比第一栅极层114和第二源极层116的相应宽度小大约10倍。这显著地减小测量环路在第一栅极层114和第三漏极层118之间的电容耦合。
总而言之，组件10在显著地减小控制环路126和切换环路70的电感的情形下提供功率模块，以使得对半导体装置50、例如宽带间隙装置进行快速切换控制。组件10可能能够传导由于快速切换而耗散的相对大量废热并且能够例如利用大于50瓦特每平方厘米(Watts per cm2)的热通量密度来传导IGBT或MOSFET。
详细描述和附图或视图是支持性的并且描述本发明，但本发明的范围仅仅由权利要求所限定。虽然已详细地描述了用于执行所要求的本发明的其中一些最佳模式和其它实施例，但存在用于实践限定在所附权利要求中的本发明的各种替代设计和实施例。此外，附图中示出的实施例或者本文描述中提及的各种实施例的特征并非必须理解成彼此独立的实施例。而是，可能地是，在实施例的其中一个示例中描述的每个特征能与来自其它实施例的一个或多个期望特征相组合，从而产生并未用文字或者参照附图描述的其它实施例。因此，此类其它实施例落在所附权利要求的范围框架内。

Claims (10)

1.一种功率模块组件，包括：
第一基底，所述第一基底包括第一层、第二层以及第三层，所述第一层和所述第三层是导电的；
其中，所述第一层配置为载送沿第一方向流动的开关电流；
其中，所述第二层是电绝缘层，所述电绝缘层定位在所述第一和第三层之间并且配置为使得它们电气地隔离；
第二基底，所述第二基底操作地连接于所述第一基底并且包括第四层、第五层和第六层，所述第四层和所述第六层是导电的；
其中，所述第五层是电绝缘层，所述电绝缘层定位在所述第四和第六层之间并且配置为使得它们电气地隔离；
导电结合层，所述导电结合层连接所述第一基底的第三层和所述第二基底的第四层；以及
其中，所述第一基底的第三层、所述导电结合层以及所述第二基底的第四层配置为作为单体导电层一起起作用，所述单体导电层载送沿第二方向的开关电流，所述第二方向基本上与所述第一方向相反。
2.根据权利要求1所述的组件，其中：
所述导电结合层是第一烧结层，所述第一烧结层配置为经由烧结工艺结合所述第一和第二基底。
3.根据权利要求1所述的组件，进一步包括：
第一半导体堆叠，所述第一半导体堆叠在第一结合部处操作地连接于所述第一层；
第一外部构件，所述第一外部构件在第二结合部处操作地连接于所述第一层；
第二半导体堆叠，所述第二半导体堆叠在第三结合部处操作地连接于所述第一层；以及
第二外部构件，所述第二外部构件在第四结合部处操作地连接于所述第四层。
4.根据权利要求3所述的组件，进一步包括：
第一端子和第二端子，所述第一端子操作地连接于所述第一基底，且所述第二端子操作地连接于所述第二基底；
其中，所述开关电流在所述第一和第二端子之间限定切换环路，所述切换环路配置为：
从所述第一端子延伸至所述第一层；
从所述第一层延伸至所述第一结合部处的所述第一半导体堆叠；
从所述第一半导体堆叠延伸至所述第一外部构件；
从所述第一外部构件延伸至所述第二结合部处的所述第一层；
从所述第一层延伸至所述第三结合部处的所述第二半导体堆叠；
从所述第二半导体堆叠延伸至所述第二外部构件；
从所述第二外部构件延伸至所述第四结合部处的所述单体导电层；以及
从所述单体导电层延伸至所述第二端子。
5.根据权利要求3所述的组件，其中：
其中，所述第一和第二外部构件具有相应的第一、第二以及第三部段，所述相应的第一和第三部段基本上是平行的；
其中，所述相应的第二部段基本上垂直于所述相应的第一和第三部段；
所述第一外部构件具有由相应间隙隔开的第一多个指部；以及
所述第二外部构件具有由相应间隙隔开的第二多个指部。
6.根据权利要求3所述的组件，其中，所述第一半导体堆叠包括：
第一半导体装置、第一金属层和第二金属层，所述第一半导体装置夹在所述第一和第二金属层之间；
第二烧结层，所述第二烧结层定位在所述第一金属层和所述第一半导体装置之间；以及
第三烧结层，所述第三烧结层定位在所述第二金属层和所述第一半导体装置之间。
7.根据权利要求6所述的组件，其中，所述第一半导体堆叠进一步包括：
第四烧结层，所述第四烧结层定位在所述第一外部构件和所述第一金属层之间；以及
第五烧结层，所述第五烧结层定位在所述第二金属层和所述第一基底的所述第一层之间。
8.根据权利要求3所述的组件，其中，所述第二半导体堆叠包括：
第二半导体装置、第一金属层和第二金属层，所述第二半导体装置夹在所述第一和第二金属层之间；
第二烧结层，所述第二烧结层定位在所述第一金属层和所述第二半导体装置之间；以及
第三烧结层，所述第三烧结层定位在所述第二金属层和所述第二半导体装置之间。
9.根据权利要求1所述的组件，进一步包括：
至少一个挠性结构，所述至少一个挠性结构操作地连接于所述第一层；
其中，所述至少一个挠性结构具有多个共同延伸层，包括第一栅极层、第二源极层以及第三漏极层；
其中，所述第一栅极层、所述第二源极层以及所述第三漏极层彼此电气地隔离；以及
其中，所述第一栅极层和所述第二源极层配置为使得栅极电流沿第三方向在所述第一栅极层中流动并且源极电流沿第四方向在所述第二源极层中流动，所述第四方向基本上与所述第三方向相反。
10.根据权利要求9所述的组件，其中：
所述开关电流限定穿过第一参考平面的切换环路；
所述栅极电流和所述源极电流在第二参考平面中限定控制环路；以及
所述第一参考平面垂直于所述第二参考平面。
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