CN108155907A - A kind of controllable switch condenser type digital-to-analog conversion system and method - Google Patents
A kind of controllable switch condenser type digital-to-analog conversion system and method Download PDFInfo
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- CN108155907A CN108155907A CN201711282298.XA CN201711282298A CN108155907A CN 108155907 A CN108155907 A CN 108155907A CN 201711282298 A CN201711282298 A CN 201711282298A CN 108155907 A CN108155907 A CN 108155907A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/002—Provisions or arrangements for saving power, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains or by selectively turning on stages when needed
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
Abstract
Technical scheme of the present invention includes a kind of controllable switch condenser type digital-to-analog conversion system and method, which includes at least one controllable D/A converter module and common mode electrical level, it is characterised in that：Controllable D/A converter module is included for the input voltage source for inputting digital signal and configurable capacitance, and signal control input voltage source and configurable shunt capacitance are controlled for passing through；Common mode electrical level is connect with multiple controllable D/A converter modules, and including operational amplifier and corresponding common mode capacitance in parallel, for receiving, converting and send digital signal, each controllable D/A converter module is connect by one group of corresponding switch with common mode electrical level.Beneficial effects of the present invention are：The power consumption of DAC entirety is saved, save chip and external supporting component cost and new device cost need not be increased.
Description
Technical field
The present invention relates to a kind of controllable switch condenser type digital-to-analog conversion system and methods, belong to digital processing field.
Background technology
With the rapid development of semiconductor technology and Digital Signal Processing, digital display circuit is because its reliability is high, flexibly
Strong, the low-power consumption of property, it is small and at low cost the features such as, have been widely used in all kinds of electronic multimedia products.It is practical to answer
In, the signal of pure digi-tal generally requires to be converted into analog signal after various processing terminate again.At this time just need one kind
Special circuit --- digital analog converter (DAC).Digital analog converter is widely used in automatically controlling, at digital communication and audio
The fields such as reason.
Electronic equipment in addition to required in performance and battery technology there are no special quantum jump in the case of, electronic system
Power consumption whether enough low also increasingly paid attention to by scheme quotient and user.Other than power consumption, scheme quotient in order to pursue low cost,
It is few as possible to chip circuit requirement material.These demands all propose higher requirement to circuit design.
As shown in Figure 1 is used for voice applications DAC systems.The digital signal of wherein high-precision high-bit width is carried by interpolater
The modulation of Sigma Delta modulator units is sent to as the high sampling rate low-bit width number of DAC inputs is suitble to after having risen sample rate
Signal is converted into analog signal in DAC module, is sent in the sound-electricity conversion devices such as loudspeaker, earphone and becomes using audio frequency power amplifier
It is received into sound by human ear.
DCT system as shown in Figure 2.Here DAC structure is based on entitled DCT (Direct Charge
Transferring switched-capacitor circuit).Wherein S1-S4 is switch, is controlled by φ 1 and φ 2 and controls signal, when the control is believed
When number being high, switch is closed conducting, and when it is low level to control signal, switch disconnects, and φ 1 and φ 2 are typically two non-overlapping
Clock, voltage waveform is as shown in figure 3, so-called non-overlapping clock, that is, φ 1 and φ 2 cannot be high level simultaneously.C1 is capacitance, OP
(OperationalAmplifier) it is operational amplifier.Vcm is the common mode electrical level of constant no current driving force, usually
The half of system power source voltage VDD.Vcmb is the constant common mode electrical level for having current driving ability, generally by a voltage follow
Device generates the voltage, usual Vcmb=Vcm=0.5VDD.Vin is the input terminal of the circuit, and Vo is output.
Time-domain analysis is done to circuit shown in Fig. 2 now.When φ 1 is high, φ 2 is low, therefore switchs S1 and S2 and close
It closes, S3 and S4 are disconnected.At this moment the quantity of electric charge on C1 is (Vin [n]-Vcmb) C1, and the quantity of electric charge on C2 is (Vo [n]-Vcm)
C2, when φ 2 is height, and φ 1 is low, S1 and S2 are disconnected, and S3 and S4 are closed, and C1 and C2 are connected in parallel at this time, the charge of the two
It is shared, Vo output variations is caused to become Vo [n+1], but due to two process capacitance charge conservations, so having identical
Formula (1) is as follows：
(Vo [n+1]-Vcm) (C1+C2)=(Vo [n]-Vcm) C2+ (V1 [n]-Vcmb) C1 (1)
Consider Vcm=Vcmb, formula (1) can be reduced to formula (2), as follows：
Vo [n+1] (C1+C2)=Vo [n] C2+V1 [n] C1 (2)
Since Fig. 2 systems belong to discrete-time system, z-transform final finishing is done to (2) formula and obtains the transmission letter of system
Number, formula (3)：
Z=e in transformj2πf/fs, fs is the sample rate of the system, i.e. φ 1, φ 2 clock frequency.Therefore when signal frequency
When rate is relatively low, i.e. f->When 0, z ≈ 1, therefore formula (3) becomes H (z)=1.
For low frequency signal, this is a unit gain system, and to high-frequency signal, (2) formula is a first-order low-pass
Wave device can help to filter out the high frequency noise content of the digital signal of many brinks, and help is reduced into smooth simulation
Signal.If that present input signal is fixed to as two kinds of level, one is supply voltage VDD, and one is ground voltage
GND, it is that 1 or 0, Fig. 2 are converted to Fig. 4 which level specifically is depended on digital signal D as input.Such a digital ratio
The digital signal D of special code stream output is exported by being converted into corresponding analog voltage signal after the system at Vo ends.If
More than 1 bit of digital bit wide of DAC but N-bit, then it is exactly more practical N-bit DAC circuit that figure four, which is converted into Fig. 5,
.
DAC circuit based on the prior art, necessary element are the generation circuit of Vcmb --- voltage followers, this
Voltage follower needs to consume certain power consumption, and generally requires and a pin is arranged on chip circuit so as to plug-in one
Capacitance so that Vcmb is sufficiently stable and has current driving ability.In order to remove this voltage follower, i.e. Vcmb and its institute
Plug-in capacitance and corresponding chip pin is needed to save cost, it would be desirable to a set of new circuit.
Invention content
In view of the deficiencies of the prior art, technical scheme of the present invention provides a kind of controllable switch condenser type digital-to-analogue conversion system
System, by removing, DAC circuit is required to generate the voltage follower of Vcmb voltages and its corresponding chip pin and required
Plug-in capacitor solves the defects of prior art.
Technical scheme of the present invention includes a kind of controllable switch condenser type digital-to-analog conversion system, which includes at least one
Controllable D/A converter module and common mode electrical level, it is characterised in that：The controllable D/A converter module includes inputting number
The input voltage source of signal and configurable capacitance control signal control input voltage source and configurable shunt capacitance for passing through；
The common mode electrical level is connect with multiple controllable D/A converter modules, including operational amplifier and corresponding common mode capacitance in parallel, is used
In receiving, converting and sending digital signal, each controllable D/A converter module passes through one group of corresponding switch and common mode electrical level connects
It connects.
According to the controllable switch condenser type digital-to-analog conversion system, the controllable D/A converter module includes the first input
Voltage source, the second input voltage source and configurable shunt capacitance, it is characterised in that：First input voltage source and the second input voltage
Source difference is in parallel in the both ends of configurable capacitance, and the first input voltage source and the second input voltage source pass through one group of correspondence
Switch control control digital signal generation；Configurable capacitance includes the first shunt capacitance and the second shunt capacitance, Mei Ge electricity
Appearance is being equipped with one group of corresponding switch.
According to the controllable switch condenser type digital-to-analog conversion system, wherein control signal includes：First control signal and
The waveform of second control signal, wherein first control signal and second control signal is non-overlapping clock.
According to the controllable switch condenser type digital-to-analog conversion system, voltage source therein includes：First input voltage source
One group of switch corresponding with the second input voltage source respectively includes the low level switch for generating low level digital signal and uses
In the high level switch for generating high level digital signal.
According to the controllable switch condenser type digital-to-analog conversion system, it is characterised in that：The configurable capacitance is can match
The capacitor array or variable capacitance put, by mode that digital programmable mode or analog signal control change capacitor array or
Variable capacitance actual value.
Technical scheme of the present invention is further included according to the arbitrary system controllable switch condenser type digital-analog convertion method, special
Sign is that this method is used to perform following steps：S61, when first control signal is high level, the first shunt capacitance both ends quilt
+ VDD or-VDD is charged to, is converted digital signals into for the voltage difference or the quantity of electric charge on the first shunt capacitance；S62, together
When, the second shunt capacitance switching group of control is closed, and the charge discharging resisting on the first shunt capacitance is clean, at this time the first shunt capacitance
The upper quantity of electric charge is 0, voltage difference 0；S63, after first control signal becomes low level from high level, second control signal becomes
High level, at this moment the first shunt capacitance, the second shunt capacitance and three capacitances share the charge respectively carried, charge share together
Result exported by output terminal, that is, complete gain control.
According to the controllable switch condenser type digital-to-analog conversion system, wherein step S61 further include：When digital signal is
When high level and first control signal are high level, the high level switch in input voltage source is closed, and low level switches break
It opens, at this moment the first shunt capacitance is charged to+VDD pressure differences；When data-signal is low level and first control signal is high level
When, the low level switch in input voltage source is closed, and high level switch disconnects, and at this moment the first shunt capacitance is charged to-VDD pressures
Difference.
According to the controllable switch condenser type digital-to-analog conversion system, it is characterised in that：According to the first shunt capacitance, second
Law of conservation of charge on shunt capacitance and common mode capacitance, with following discrete-time system relational expression,
C1A·Vin[n-1]+C2·Vo[n-1]=(C1A+C1B+C2) Vo[n]
Z-transform is carried out at the same time to relational expression or so to be obtained,
C1A·Vin(z)·z-1+C2·Vo(z)·z-1=(C1A+C1B+C2) Vo(z)
Further the formula that z-transform obtains is arranged to obtain transmission function,
Under low frequency signal excitation, z ≈ 1, by formula letter
It is melted into and isWherein Vin, Vo be respectively input voltage source and output as a result, wherein C1A, C1B, C2
One shunt capacitance, the second shunt capacitance and common mode capacitance control gain to export by the size for controlling shunt capacitance C1A and C1B.
Beneficial effects of the present invention are：It is an advantage of the invention that control DAC by way of changing capacitor's capacity in itself
Gain does not need to add other high power consumptions again after DAC outputs and the operational amplifier of high cost forms gain adjusting circuit
Realize gain control, and the present invention can easily realize gain control using the components of DAC in itself, the adjusting of capacitance can
To control the capacitance of the combination of capacitor array or analog form de-regulation variable capacitance with programming code in itself.Based on the present invention
Technology, compared to traditional technology, it may not be necessary to generate input sample signal using this intermediate level of Vcmb.The production of Vcmb
Raw circuit voltage follower and the plug-in capacitance of pin resource additional required for it and chip exterior, can dispense
And do not influence DAC normal works.It thereby saves the power consumption of DAC entirety, save chip and external supporting component cost.
Description of the drawings
Fig. 1 show the voice applications DAC system flow charts of the prior art；
Fig. 2 show the DCT condenser network figures of the prior art；
Fig. 3 show the voltage oscillogram of the prior art；
Fig. 4 show the single-bit DAC circuit figure of the prior art；
Fig. 5 show the N-bit DAC circuit figure of the prior art；
Fig. 6 show the overall construction drawing according to embodiment of the present invention；
Fig. 7 show the circuit structure diagram according to embodiment of the present invention；
Fig. 8 show the circuit structure diagram replaced according to the input voltage source of embodiment of the present invention；
Fig. 9 show the circuit structure diagram for being provided with variable capacitance according to embodiment of the present invention；
Figure 10 show the N-bit DAC circuit figure according to embodiment of the present invention.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, it is right in the following with reference to the drawings and specific embodiments
The present invention is described in detail.The controllable switch condenser type digital-to-analog conversion system and method for the present invention is produced suitable for consumer electronics
Product, multimedia system, the wired and wireless device with audio playing function.
Fig. 6 show the overall construction drawing according to embodiment of the present invention.System includes multiple controllable D/A converter modules
And common mode electrical level, it is characterised in that：The controllable D/A converter module includes the input voltage source for inputting digital signal
And configurable capacitance, control signal control input voltage source and configurable shunt capacitance for passing through；The common mode electrical level with it is more
A controllable D/A converter module connection, including operational amplifier and corresponding common mode capacitance in parallel, for receiving, converting and send
Digital signal, each controllable D/A converter module are connect by one group of corresponding switch with common mode electrical level.
Fig. 7 show the circuit structure diagram according to embodiment of the present invention.The purpose of the invention is to remove DAC circuit
The required voltage follower for generating Vcmb voltages and its corresponding chip pin and required plug-in capacitor.With single-bit
For DAC, the waveform of φ 1 and φ 2 non-overlapping clock still as shown in Figure 3 in circuit shown in Fig. 7.C1A and C1B are equal to
0.5*C1。
When φ 1 first is high level, C1A both ends are charged to+VDD or-VDD, and it is high electricity that this, which depends on digital signal D,
Flat or low level.For example, when D is high level and φ 1 is high level, S1PA, S1NB is opened 01=0=0v, 1=supply voltage
It closes and closes, two switches of S1NA and S1PB disconnect, and at this moment C1A is charged to+VDD pressure differences；When D is low level and φ 1 is high electricity
Usually, two switches of S1NA, S1PB are closed, and two switches of S1PA, S1NB disconnect, and at this moment C1A is charged to-VDD pressure differences；Number
Signal D is converted into herein for the voltage difference or the quantity of electric charge on C1A；Meanwhile φ 1 be high level when, switch
SC and SD is closed, and the charge discharging resisting on C1B is clean, and the upper quantities of electric charge of C1B are 0, voltage difference 0.When φ 1 becomes low from high level
After level, φ 2 becomes high level, at this moment C1A, and tri- capacitances of C1B and C2 share the charge respectively carried, charge share together
Result export in Vo.
Fig. 8 show the circuit structure diagram replaced according to the input voltage source of embodiment of the present invention.In order to facilitate derivation
Fig. 7 is converted into Fig. 8 and the input relevant voltage of digital signal is replaced with input voltage source Vin by the transmission function of Fig. 7.According to
Law of conservation of charge on C1A, C1B, C2 can list relationship below in time domain to discrete-time system shown in Fig. 8
(3)：
C1A·Vin[n-1]+C2·Vo[n-1]=(C1A+C1B+C2) Vo[n] (3)
Formula (4) can be obtained by being carried out at the same time z-transform to (3) formula or so：
C1A·Vin(z)·z-1+C2·Vo(z)·z-1=(C1A+C1B+C2) Vo(z) (4)
(4) formula obtains Fig. 8 system transters (5) after arranging：
It can be seen that coming, under low frequency signal excitation, z ≈ 1, (5) formula simplification becomes
It can be seen that system shown in Figure 8 can use the mode for the ratio for changing C1A and C1B to realize control to the gain of system
System.
Fig. 9 show the circuit structure diagram for being provided with variable capacitance according to embodiment of the present invention.Wherein C1A and C1B
As configurable capacitor array either variable capacitance can by the mode that digital programmable mode or analog signal control come
Change the actual value of C1A and C1B.The gain of whole system can be conditioned in this way.The typical case of Fig. 8 Fig. 9 is exactly Fig. 7 institutes
The circuit shown, wherein C1A and C1B are equal, and the entire gain of such system is 0.5.Since input signal is (between capacitance C1A
Pressure difference) the amplitude of oscillation (maximum value-minimum value) be 2VDD, i.e. twice of supply voltage, if according to the scheme of prior art, system
Gain is 1, and arriving output in this way can allow output supersaturation to be distorted, because output voltage effective range is naturally defined to operation amplifier
The supply voltage VDD of device.With circuit engineering shown in Fig. 7, system gain is configured to 0.5, then system output would not
There is saturation, and also avoid and use intermediate common-mode voltage Vcmb.The corresponding N-bit DAC frameworks of Fig. 7 are as shown in Figure 10.Vcm
The half of common mode electrical level, usually system power source voltage VDD for constant no current driving force.Vcmb has electricity for constant
The common mode electrical level of driving force is flowed, the voltage is generally generated by a voltage follower, usually
Vcmb=Vcm=0.5VDD.Vin is the input terminal of the circuit, and Vo is output.
Figure 10 show the N-bit DAC circuit figure according to embodiment of the present invention.
It includes multiple controllable D/A converter modules and operational amplifier, and digital-to-analogue level includes data amplifier OP, output
Hold V0And the cathode connection common mode capacitance C2 and multiple of the common mode capacitance C2 in parallel with data amplifier, data amplifier OP
Controllable D/A converter module, the anode of data amplifier OP connects the common mode electrical level of constant no current driving force.
Each controllable D/A converter module passes through one group of switch (such as S30...S3n-1And S40...S4n-1) and operational amplifier
OP and common mode capacitance C2 connections；
Each controllable D/A converter module includes 2 signal input switch groups and shunt capacitance, and shunt capacitance includes one group
Shunt capacitance, each shunt capacitance (such as C1A0…C1An-1And C1B0…C1Bn-1) respectively by corresponding one group of controllable switch into
Row connection and switch (such as SA of one group of connection GND0…SD0To SAN=1…SDn-1), it is respectively equipped with letter at shunt capacitance both ends
Number input module, the signal in parallel for including one group of connection VDD and GND generate switch, such as S1PA0…S1PAn-1、
S1NA0…S1NAn-1And corresponding S1PB0…S1PBn-1、S1PB0…S1NBn-1, it is respectively used to generate corresponding control letter
Number, as figure indicates.
Equally, general DAC systems are made an uproar frequently with fully differential framework to reduce even-order harmonic distortion and improve the common modes such as power supply
The immunity of sound.The technology is transplanted on fully differential framework easily very much, and corresponding operational amplifier will also change fully differential structure into.
The technical side of the present invention also discloses a kind of technical solution of replacement：In addition to the program, with current steering DAC scheme
It can realize the purpose of the invention, but current steering DAC is easier compared to for our technological invention by clock jitter etc.
The influence of non-ideal factor, the transmission function that in addition our technology is realized have typical low-frequency filter characteristics, therefore number
Unwanted high frequency noise content can be decayed by our DAC of this framework in word signal, this is that current steering DAC does not have
Standby.
The above, only presently preferred embodiments of the present invention, the invention is not limited in the above embodiment, as long as
It reaches the technique effect of the present invention with identical means, should all belong to the scope of protection of the present invention.In the protection model of the present invention
Its technical solution and/or embodiment can have a variety of different modifications and variations in enclosing.
Claims (8)
1. a kind of controllable switch condenser type digital-to-analog conversion system, the system is including at least one controllable D/A converter module and altogether
Mould level, it is characterised in that：
The controllable D/A converter module is included for the input voltage source for inputting digital signal and configurable capacitance, for passing through
Control signal control input voltage source and configurable shunt capacitance；
The common mode electrical level is connect with multiple controllable D/A converter modules, including operational amplifier and corresponding common mode electricity in parallel
Hold, for receiving, converting and send digital signal, each controllable D/A converter module passes through one group of corresponding switch and common mode electricity
Flushconnection.
2. controllable switch condenser type digital-to-analog conversion system according to claim 1, the controllable D/A converter module includes
First input voltage source, the second input voltage source and configurable shunt capacitance, it is characterised in that：
First input voltage source is in parallel with the second input voltage source difference in the both ends of configurable capacitance, the first input voltage
Source and the second input voltage source pass through the generation of one group of corresponding switch control control digital signal；
Configurable capacitance includes the first shunt capacitance and the second shunt capacitance, and each capacitance is being equipped with one group of corresponding switch.
3. controllable switch condenser type digital-to-analog conversion system according to claim 2, which is characterized in that the control signal packet
It includes：When the waveform of first control signal and second control signal, wherein first control signal and second control signal is non-overlapping
Clock.
4. controllable switch condenser type digital-to-analog conversion system according to claim 2, which is characterized in that the voltage source packet
It includes：
First input voltage source, one group of switch corresponding with the second input voltage source respectively includes generating low level number letter
Number low level switch and for generate the high level of high level digital signal switch.
5. controllable switch condenser type digital-to-analog conversion system according to claim 2, it is characterised in that：The configurable capacitance
For configurable capacitor array or variable capacitance, capacitance is changed by digital programmable mode or the mode of analog signal control
Array or variable capacitance actual value.
6. a kind of controllable switch condenser type digital-analog convertion method according to claim 1 to 5 arbitrary system, feature exist
In this method includes：
S61, when first control signal is high level, the first shunt capacitance both ends are charged to+VDD or-VDD, and number is believed
It number is converted into for the voltage difference or the quantity of electric charge on the first shunt capacitance；
S62, meanwhile, the second shunt capacitance switching group of control is closed, and the charge discharging resisting on the first shunt capacitance is clean, and at this time the
The quantity of electric charge is 0 on one shunt capacitance, voltage difference 0；
S63, after first control signal becomes low level from high level, second control signal becomes high level, and at this moment first simultaneously
Connection capacitance, the second shunt capacitance and three capacitances share the charge respectively carried together, and the result of charge share passes through output terminal
It is exported, that is, completes gain control.
7. controllable switch condenser type digital-analog convertion method according to claim 2, which is characterized in that the step S61 is also
Including：
When digital signal is high level and first control signal is high level, the high level switch in input voltage source is closed,
Low level switches disconnect, and at this moment the first shunt capacitance is charged to+VDD pressure differences；
When data-signal is low level and first control signal is high level, the low level switch in input voltage source is closed,
High level switch disconnects, and at this moment the first shunt capacitance is charged to-VDD pressure differences.
8. controllable switch condenser type digital-analog convertion method according to claim 6, which is characterized in that this method further includes：
According to the law of conservation of charge in the first shunt capacitance, the second shunt capacitance and common mode capacitance, with following discrete
Time system relational expression,
C1A·Vin[n-1]+C2·Vo[n-1]=(C1A+C1B+C2) Vo[n]
Z-transform is carried out at the same time to relational expression or so to be obtained,
C1A·Vin(z)·z-1+C2·Vo(z)·z-1=(C1A+C1B+C2) Vo(z)
Transmission function is obtained after further being arranged to the formula that z-transform obtains,
Under low frequency signal excitation, z ≈ 1 become simplified formulaWherein Vin, Vo be respectively input electricity
Potential source and output are as a result, wherein C1A, C1B, C2 are the first shunt capacitance, the second shunt capacitance and common mode capacitance, by controlling simultaneously
Join the size control gain output of capacitance C1A and C1B.
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| CN109756108A (en) * | 2019-02-27 | 2019-05-14 | 刘鸿睿 | A kind of charge pump conversion circuit |
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| CN109687707B (en) * | 2019-02-27 | 2024-03-08 | 刘鸿睿 | Step-down circuit |
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Address after: 519000 1 C104, 1 Harbin Industrial Road, Tangjia Bay, Zhuhai, Guangdong Applicant after: Zhuhai Hui Lian Technology Co., Ltd. Address before: 519000 2, 5000, Harbin Road, Tangjia Bay, Zhuhai, Guangdong Province, 2 Applicant before: Zhuhai Hui Lian Technology Co., Ltd. |
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Application publication date: 20180612 |