CN108141555B - Imaging element and electronic camera - Google Patents

Imaging element and electronic camera Download PDF

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CN108141555B
CN108141555B CN201680057179.1A CN201680057179A CN108141555B CN 108141555 B CN108141555 B CN 108141555B CN 201680057179 A CN201680057179 A CN 201680057179A CN 108141555 B CN108141555 B CN 108141555B
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voltage
unit
image pickup
pixel
transfer
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CN108141555A (en
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猿渡修
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Nikon Corp
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Nikon Corp
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Priority to CN202110348058.5A priority patent/CN113099140A/en
Priority to CN202110348106.0A priority patent/CN113099141A/en
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/50—Control of the SSIS exposure
    • H04N25/57—Control of the dynamic range
    • H04N25/58—Control of the dynamic range involving two or more exposures
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/709—Circuitry for control of the power supply
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1462—Coatings
    • H01L27/14621—Colour filter arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14625—Optical elements or arrangements associated with the device
    • H01L27/14627—Microlenses
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14634—Assemblies, i.e. Hybrid structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14636—Interconnect structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1464—Back illuminated imager structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14643—Photodiode arrays; MOS imagers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14643—Photodiode arrays; MOS imagers
    • H01L27/14645—Colour imagers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/63—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to dark current
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/7795—Circuitry for generating timing or clock signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/79—Arrangements of circuitry being divided between different or multiple substrates, chips or circuit boards, e.g. stacked image sensors

Abstract

An image pickup element having a 1 st voltage source for supplying a 1 st voltage and a plurality of pixels to which the 1 st voltage is supplied, the pixels comprising: a photoelectric conversion unit that photoelectrically converts incident light; a storage unit that stores the electric charge obtained by photoelectric conversion by the photoelectric conversion unit; a transfer unit that transfers the electric charge from the photoelectric conversion unit to the storage unit; a 2 nd voltage source supplying a 2 nd voltage; and a supply unit configured to supply a transmission signal obtained based on one of the 1 st voltage generated by the 1 st voltage source and the 2 nd voltage generated by the 2 nd voltage source to the transmission unit.

Description

Imaging element and electronic camera
Technical Field
The invention relates to an imaging element and an electronic camera.
Background
An image pickup device capable of controlling an exposure time for each frame is known (for example, patent document 1). In the conventional imaging device, in order to control the exposure time for each pixel, a power supply for supplying a negative voltage and a power supply for supplying a positive voltage must be arranged for each pixel, which has a problem of a decrease in aperture ratio.
Documents of the prior art
Patent document
Patent document 1: japanese unexamined patent publication No. 2006-180111
Disclosure of Invention
According to the 1 st aspect, there is provided an image pickup element including a 1 st voltage source that supplies a 1 st voltage and a plurality of pixels to which the 1 st voltage is supplied, the pixels including: a photoelectric conversion unit that photoelectrically converts incident light; a storage unit that stores the electric charge obtained by photoelectric conversion by the photoelectric conversion unit; a transfer unit that transfers the electric charge from the photoelectric conversion unit to the storage unit; a 2 nd voltage source supplying a 2 nd voltage; and a supply unit configured to supply a transmission signal obtained based on one of a 1 st voltage generated by the 1 st voltage source and a 2 nd voltage generated by the 2 nd voltage source to the transmission unit.
Drawings
Fig. 1 is a cross-sectional view schematically showing the configuration of an imaging device.
Fig. 2 is a sectional view of the image pickup element.
Fig. 3 is a block diagram schematically showing the structure of a pixel.
Fig. 4 is a circuit diagram of an analog circuit diagram and a pixel driving section.
Fig. 5 is a timing chart showing an imaging sequence using an imaging element.
Fig. 6 is a sectional view of the image pickup element.
Fig. 7 is a block diagram schematically showing the configuration of the image pickup element.
Detailed Description
(embodiment 1)
Fig. 1 is a cross-sectional view schematically showing the configuration of an imaging apparatus using the imaging device according to embodiment 1. The imaging apparatus 1 includes an imaging optical system 2, an imaging device 3, a control unit 4, a lens driving unit 5, and a display unit 6.
The image pickup optical system 2 forms an object image on an image pickup surface of the image pickup device 3. The imaging optical system 2 is composed of a lens 2a, a focus lens 2b, and a lens 2 c. The focus lens 2b is a lens for performing focus adjustment of the imaging optical system 2. The focus lens 2b is configured to be drivable in the optical axis O direction.
The lens driving section 5 includes an actuator not shown. The lens driving section 5 drives the focus lens 2b by a desired amount in the optical axis O direction by the actuator. The image pickup device 3 picks up an object image and outputs an image. The control unit 4 controls each part of the image pickup device 3 and the like. The control unit 4 performs image processing and the like on the image signal output from the image pickup device 3, and records the image signal in a recording medium, not shown, or displays an image on the display unit 6. The display unit 6 is a display device having a display member such as a liquid crystal panel.
Fig. 2 is a sectional view of the image pickup device 3. Fig. 2 also shows a cross section of only a part of the entire image pickup device 3. The imaging element 3 is a so-called back-illuminated imaging element. The image pickup element 3 photoelectrically converts incident light from above the paper surface. The image pickup element 3 has a 1 st semiconductor substrate 7 and a 2 nd semiconductor substrate 8.
The 1 st semiconductor substrate 7 has a PD layer 71 and a wiring layer 72. The PD layer 71 is disposed on the rear surface side of the wiring layer 72. A plurality of photodiodes 31 as embedded photodiodes are two-dimensionally arranged in the PD layer 71. Therefore, the surface of the PD layer 71 on the wiring layer 72 side (i.e., the surface on the side opposite to the incident side of the incident light) is of the opposite conductivity type to the PD layer 71. For example, if the PD layer 71 is an N-type semiconductor layer, a P-type semiconductor layer having a high concentration and a small thickness is disposed on the surface on the wiring layer 72 side. The ground voltage (GND) is applied to the 1 st semiconductor substrate 7 as a substrate voltage. Various circuits for reading out signals from the photodiode 31 are arranged on the 2 nd semiconductor substrate 8. Specifically, the a/D conversion unit 302, the sampling unit 303, the pixel value holding unit 304, and the arithmetic unit 305, which will be described later, and a part of the pixel driving unit 307 (the transfer signal supply unit 307a and the 2 nd reset signal supply unit 307c of the processing voltage Vneg, which will be described later) are disposed on the 2 nd semiconductor substrate 8.
The image pickup device 3 includes a power supply unit 94 as a 1 st voltage source that supplies a 1 st voltage, i.e., a voltage Vneg, to each pixel 30. The voltage Vneg is a voltage lower than the substrate voltage of the 1 st semiconductor substrate 7. In this embodiment, the substrate voltage of the 1 st semiconductor substrate 7 is the ground voltage. Therefore, the voltage Vneg is a negative voltage lower than the ground voltage. The power supply section 94 is not provided separately for each pixel 30, but is provided in common for a plurality of pixels 30.
When a power supply unit for supplying a voltage Vneg lower than the substrate voltage of the 1 st semiconductor substrate 7 to each pixel 30 is separately provided for each pixel 30, a complicated circuit is required in the image pickup device. Therefore, the yield of the image pickup element may be deteriorated. The image pickup device 3 of the present embodiment can supply the voltage Vneg from the outside of the pixels 30 to the respective pixels 30 with a simple structure as described later, and this is to eliminate the fear.
Note that, although the details will be described later, the voltage Vneg lower than the substrate voltage of the 1 st semiconductor substrate 7 is required to avoid charge transfer from the photodiode 31 to the floating diffusion FD when the transfer transistor Tx is off.
The power supply section 94 for supplying the voltage Vneg is provided in the 1 st semiconductor substrate 7 in the present embodiment. The power supply portion 94 may be provided at a place other than the 1 st semiconductor substrate 7. For example, the power supply section 94 may be provided in the 2 nd semiconductor substrate 8, and the voltage Vneg may be supplied to the 1 st semiconductor substrate 7 via the bump to be electrically connected to each pixel 30.
A plurality of color filters 73 corresponding to the plurality of photodiodes 31, respectively, are provided on the incident side of incident light in the PD layer 71. The color filter 73 includes a plurality of types that transmit light in wavelength regions corresponding to red (R), green (G), and blue (B), for example. Three kinds of the color filters 73, for example, corresponding to red (R), green (G), and blue (B) are arranged in such a manner as to form a bayer array.
A plurality of microlenses 74 corresponding to the plurality of color filters 73, respectively, are provided on the incident side of incident light in the color filters 73. The microlenses 74 condense incident light toward the corresponding photodiodes 31. The incident light that has passed through the microlens 74 passes through the color filter 73, is filtered only in a part of the wavelength region, and enters the photodiode 31. The photodiode 31 photoelectrically converts incident light to generate electric charges.
A plurality of bumps 75 are arranged on the surface of the wiring layer 72. On a surface of the 2 nd semiconductor substrate 8 facing the wiring layer 72, a plurality of bumps 76 corresponding to the plurality of bumps 75 are arranged. The plurality of bumps 75 and the plurality of bumps 76 are bonded to each other. The 1 st semiconductor substrate 7 and the 2 nd semiconductor substrate 8 are electrically connected via a plurality of bumps 75 and a plurality of bumps 76.
The image pickup device 3 includes a plurality of pixels 30, which will be described in detail later. One pixel 30 includes a 1 st pixel 30x provided on the 1 st semiconductor substrate 7 and a 2 nd pixel 30y provided on the 2 nd semiconductor substrate 8. One microlens 74, one color filter 73, one photodiode 31, and the like are included in one 1 st pixel 30 x. In addition, the 1 st pixel 30x includes various circuits (described later) provided in the 1 st semiconductor substrate 7, such as an individual power supply unit 341 as a 2 nd voltage source that supplies a voltage V1 that is a 2 nd voltage. The 2 nd pixel 30y includes various circuits (described later) provided in the 2 nd semiconductor substrate 8.
Fig. 3 is a block diagram schematically showing the structure of the pixel 30. The pixel 30 includes an analog circuit portion 301, an a/D conversion portion 302, a sampling portion 303, a pixel value holding portion 304, a pixel driving portion 307, an individual pixel control portion 306, and an arithmetic portion 305.
The analog circuit section 301 outputs the result of photoelectric conversion of the incident light to the a/D conversion section 302 as an analog signal. The a/D converter 302 samples the analog signal output from the analog circuit 301, and outputs a digital signal doubled by a predetermined gain. The a/D conversion section 302 repeatedly samples the pixel reset signal and the pixel signal, and individually outputs the sampling result of the pixel reset signal and the sampling result of the pixel signal as digital signals.
The sampling unit 303 calculates and holds an integrated value of a sampling result of the pixel reset signal and a sampling result of the pixel signal. The sampling unit 303 includes a 1 st adder 308 and a 1 st memory 309 for pixel reset signals, and a 2 nd adder 310 and a 2 nd memory 311 for pixel signals.
The sampling section 303 adds the sampling result of the pixel reset signal output by the a/D conversion section 302 and the integrated value of the past sampling result held in the 1 st memory 309 by the 1 st adder 308. The sampling unit 303 stores the addition result in the 1 st memory 309. The sampling section 303 updates the value stored in the 1 st memory 309 each time the sampling result of the pixel reset signal is output by the a/D conversion section 302.
The sampling section 303 adds the sampling result of the pixel signal output by the a/D conversion section 302 and the integrated value of the past sampling result held in the 2 nd memory 311 by the 2 nd adder 310. The sampling unit 303 stores the addition result in the 2 nd memory 311. The sampling section 303 updates the value stored in the 2 nd memory 311 each time the sampling result of the pixel signal is output by the a/D conversion section 302.
As described above, the a/D conversion section 302 and the sampling section 303 perform a process of repeatedly sampling the pixel reset signal and the pixel signal and integrating the sampling result. This process is a so-called correlated multisampling process.
When the sampling by the individual pixel control section 306 is completed the predetermined number of times, the sampling section 303 outputs a digital value based on the value stored in the 1 st memory 309 and the value stored in the 2 nd memory 311 to the pixel value holding section 304. The pixel value holding unit 304 stores the digital value as a result of photoelectric conversion performed by the pixel 30. The pixel value holding section 304 is connected to the signal line 340. The digital value stored in the pixel value holding portion 304 can be read from the outside via the signal line 340.
The calculation unit 305 calculates the number of repetitions in the correlated multiple sampling process, the exposure time, the gain, and the like, based on the exposure time instructed from the outside and the previous photoelectric conversion result held in the pixel value holding unit 304. The individual pixel control unit 306 outputs the number of repetitions and the gain calculated by the calculation unit 305 to the a/D conversion unit 302. The individual pixel control unit 306 outputs the exposure time and the gain calculated by the calculation unit 305 to the pixel drive unit 307. The pixel driving section 307 outputs various driving signals (described later) for driving the respective sections of the analog circuit section 301 to the analog circuit section 301.
Fig. 4 is a circuit diagram of the analog circuit portion 301, the individual pixel control portion 306, and the pixel driving portion 307. In fig. 4, for convenience, only a part of the individual pixel control section 306 and the pixel driving section 307 is illustrated. A part of the individual pixel control section 306 is denoted by reference numerals as 306a and 306b, and a part of the pixel drive section 307 is denoted by reference numerals as 307a and 307 b.
The analog circuit section 301 has a photodiode 31, a transfer transistor Tx, a floating diffusion FD, a 1 st reset transistor RST1, a 2 nd reset transistor RST2, an amplification transistor AMI, a selection transistor SEL, a capacitance expansion transistor FDs, and a capacitance C1.
The photodiode 31 is a photoelectric conversion portion that performs photoelectric conversion on incident light to generate electric charge in an amount corresponding to the amount of the incident light. The transfer transistor Tx is a transfer unit that transfers the charge generated by the photodiode 31 to the floating diffusion FD based on a transfer signal supplied from a transfer signal supply unit 307a described later. The floating diffusion FD is a storage section that stores the electric charge transferred by the transfer transistor Tx. The amplification transistor AMI outputs a signal corresponding to the amount of electric charges stored in the floating diffusion FD. When the selection transistor SEL is turned on, the signal output by the amplification transistor AMI is input to the a/D conversion section 302.
The analog circuit portion 301 includes two reset transistors, a 1 st reset transistor RST1 and a 2 nd reset transistor RST 2. The 1 st reset transistor RST1 receives a 1 st reset signal from a 1 st reset signal supply portion 307b to be described later when the floating diffusion FD is reset. The 1 st reset signal supply section 307b described later supplies a signal of the voltage VDD as a 1 st reset signal. The 1 st reset transistor RST1 resets the floating diffusion FD based on the 1 st reset signal. The 2 nd reset transistor RST2 receives a supply of a 2 nd reset signal from a 2 nd reset signal supply portion 307c to be described later when the photodiode 31 is reset. The 2 nd reset signal supply section 307c described later supplies a signal of the voltage VDD as a 2 nd reset signal. The 2 nd reset transistor RST2 resets the photodiode 31 based on the 2 nd reset signal.
The capacitance expansion transistor FDS switches the connection between the floating diffusion FD and the capacitance C1 based on a capacitance expansion signal supplied from a capacitance expansion signal supply unit 307d to be described later. For example, when the amount of incident light to the photodiode 31 is large and the floating diffusion FD is saturated, the capacitance expansion transistor FDs is turned on, thereby connecting the floating diffusion FD and the capacitance C1. Thus, the capacitance of the floating diffusion FD can be substantially increased by the capacitance C1 to cope with a larger light amount.
The 1 st reset signal supply unit 307b is a CMOS circuit including a pMOS transistor Tr7 and an nMOS transistor Tr 8. The 1 st reset signal supply unit 307b supplies, as a 1 st reset signal, any one of a voltage VDD (a predetermined power supply voltage, the same applies hereinafter) and a ground voltage (GND) to the gate of the 1 st reset transistor RST1 based on the output signal of the 1 st reset control unit 306 b. As described above, the 1 st reset control section 306b is a part of the individual pixel control section 306, and the 1 st reset signal supply section 307b is a part of the pixel driving section 307. In addition, in the acceleration (overdrive), the 1 st reset control unit 306b may supply a voltage VRST1H higher than the voltage VDD to the gate of the 1 st reset transistor RST1 instead of the voltage VDD.
The capacitance extension signal supply unit 307d is a CMOS circuit including a pMOS transistor Tr11 and an nMOS transistor Tr 12. The capacitance expansion signal supply unit 307d supplies any one of the voltage VDD and the ground voltage (GND) as a capacitance expansion signal to the gate of the capacitance expansion transistor FDS based on the output signal of the capacitance expansion control unit 306 d. As described above, the capacitance expansion control unit 306d is a part of the individual pixel control unit 306, and the capacitance expansion signal supply unit 307d is a part of the pixel drive unit 307.
The transmission signal supply section 307a includes a buffer 340, a resistor R1, and a resistor R2. The transmission control unit 306a supplies a transmission control signal to the buffer 340. The transfer control unit 306a outputs any one of a predetermined high-level voltage (for example, the voltage VDD) and a predetermined low-level voltage (for example, the ground voltage which is the substrate voltage of the 1 st semiconductor substrate 7) to the buffer 340 as a transfer control signal. The buffer 340 outputs the voltage V1 supplied from the individual power supply unit 341 in the pixel 30 when the transfer control signal is a high-level voltage, and outputs the ground voltage which is the substrate voltage of the 1 st semiconductor substrate 7 when the transfer control signal is a low-level voltage. The voltage V1 is a voltage higher than the substrate voltage of the 1 st semiconductor substrate 7. In this embodiment, the substrate voltage of the 1 st semiconductor substrate 7 is the ground voltage. Therefore, the voltage V1 is a positive voltage higher than the ground voltage.
The output terminal of the buffer 340 is connected to the gate of the transfer transistor Tx via a resistor R2. The voltage Vneg is supplied from the power supply unit 94 through the resistor R1 between the resistor R2 and the transfer transistor Tx. That is, when viewed from the transfer transistor Tx, the wiring in front of the gate electrode branches into two branches, one branch is connected to the power supply section 94 via the resistor R1, and the other branch is connected to the buffer 340 via the resistor R2.
When the buffer 340 outputs the voltage V1, a voltage Vg1 determined by the following equation (1) is applied to the gate of the transmission transistor Tx. In the following formula (1), R1 is the resistance value of the resistor R1, and R2 is the resistance value of the resistor R2.
Vg1＝(Vneg×r2+V1×r1)/(r1+r2)…(1)
For example, if Vneg is equal to-2V, V1 and equal to 8V, r1 and equal to r2, the voltage Vg1 becomes 3V. That is, when the buffer 340 outputs the voltage V1, a positive voltage of 3V is applied to the gate of the transfer transistor Tx, and the transfer transistor Tx is turned on. In other words, in the case where the transfer control signal is a voltage of a high level, the transfer transistor Tx transfers the charge generated by the photodiode 31 to the floating diffusion FD.
On the other hand, when the buffer 340 outputs the ground voltage, the voltage Vg2 determined by the following expression (2) is applied to the gate of the transfer transistor Tx.
Vg2＝(Vneg×r2)/(r1+r2)…(2)
For example, if Vneg is equal to-2V, r1 and r2, the voltage Vg2 becomes-1V. That is, when the buffer 340 outputs the ground voltage which is the substrate voltage of the 1 st semiconductor substrate 7, a negative voltage of-1V lower than the substrate voltage of the 1 st semiconductor substrate 7 is applied to the gate of the transfer transistor Tx, and the transfer transistor Tx is turned off. In other words, in the case where the transfer control signal is a voltage of a low level, the transfer transistor Tx does not transfer the charge generated by the photodiode 31 to the floating diffusion FD.
The transfer signal supply unit 307a configured as described above supplies, as a transfer signal, either a positive voltage or a voltage lower than the substrate voltage of the 1 st semiconductor substrate 7 (negative voltage in the present embodiment) to the gate of the transfer transistor Tx based on the output signal of the transfer control unit 306 a. As described above, the transfer control section 306a is a part of the individual pixel control section 306, and the transfer signal supply section 307a is a part of the pixel drive section 307. Further, the application of a voltage lower than the substrate voltage of the 1 st semiconductor substrate 7 to the gate of the transfer transistor Tx is to avoid the transfer of charges from the photodiode 31 to the floating diffusion FD when the transfer transistor Tx is turned off.
The 2 nd reset signal supply section 307c has a buffer 350, a resistor R3, and a resistor R4. The 2 nd reset signal supply section 307c supplies, as a 2 nd reset signal, either a positive voltage or a voltage lower than the substrate voltage of the 1 st semiconductor substrate 7 (a negative voltage in this embodiment) to the gate of the 2 nd reset transistor RST2 based on the output signal of the 2 nd reset control section 306 c. The 2 nd reset signal supply section 307c has the same configuration as the transfer signal supply section 307a, and therefore, description thereof is omitted. As described above, the 2 nd reset control section 306c is a part of the individual pixel control section 306, and the 2 nd reset signal supply section 307c is a part of the pixel driving section 307.
Next, the layout of each portion to the semiconductor substrate shown in fig. 3 and 4 will be described. The analog circuit portion 301, the transfer driving portion 307a, and the individual power supply portion 341 (fig. 4) of the respective portions shown in fig. 3 and 4 are arranged on the 1 st semiconductor substrate 7. The 2 nd semiconductor substrate 8 is provided with the other parts of the parts shown in fig. 3 and 4.
The layout is such that the photodiode 31 is enlarged as much as possible. In this embodiment, since each part of the pixel 30 is disposed on the 2 nd semiconductor substrate 8 as much as possible, the area of the photodiode 31 can be increased, and it is expected that the efficiency of using incident light and the number of saturated electrons can be improved.
Fig. 5 is a timing chart showing an imaging sequence using the imaging element 3. The image pickup element 3 can selectively perform multiple exposure and correlated multiple sampling. First, the multiple exposure control will be described with reference to fig. 5 (a).
Fig. 5 (a) is a time chart in the case where multiple exposures are performed for each pixel 30. The horizontal axis of fig. 5 (a) represents time, and the time advances to the right. The quadrangle written with "Dark" in fig. 5 (a) shows the timing at which the a/D conversion section 302 performs sampling of the pixel reset signal. The quadrangle written with "Sig" in fig. 5 (a) shows the timing at which the a/D conversion section 302 samples the pixel signal. The quadrangle written with "Out" in fig. 5 (a) shows the timing at which the digital value (photoelectric conversion result) stored in the pixel value holding section 304 is output to the peripheral circuit via the signal line 340. In fig. 5 (a), the pixels 30 are classified into four pixels 30a to 30d according to the amount of incident light, and multiple exposure is performed.
The operation of resetting the photodiode 31 and the floating diffusion FD at the start time T0 of the exposure period T1 is the same for all the pixels 30. Then, in the pixel 30a with the extremely small incident light amount, the floating diffusion FD is reset at time t3, and the pixel reset signal is sampled. The time T3 is a time obtained by subtracting the time required for the reset of the floating diffusion FD and the sampling of the pixel reset signal from the end time T4 of the exposure period T1. At the end time T4 of the exposure period T1, the charges accumulated in the photodiode 31 generated at the times T0 to T4 are transferred to the floating diffusion FD, and the pixel signal is sampled. Then, at time t5, the photoelectric conversion result is stored in the pixel value holding section 304.
In the pixel 30b with a slightly smaller incident light amount, the exposure period T1 designated from the outside is equally divided into two periods, i.e., the period T2 and the period T3, and the above-described operation is performed twice. Specifically, at time t1 and time t3, the floating diffusion FD is reset, and the pixel reset signal is sampled. The time T1 is a time obtained by subtracting the time required for the reset of the floating diffusion FD and the sampling of the pixel reset signal from the end time T2 of the period T2. Then, at time t2, the charges accumulated in the photodiode 31 are transferred to the floating diffusion FD, and the pixel signal is sampled. The operation from time t3 to t5 is the same as in the case of the pixel 30 a.
In the pixel 30c having a slightly larger incident light amount, the exposure period T1 specified from the outside is divided into four equal parts, and the above-described operation is performed four times. In the pixel 30d having the extremely large amount of incident light, the exposure period T1 specified from the outside is divided into eight times, and the above-described operation is performed eight times.
As described above, according to the multiple exposure control, it is possible to perform imaging by changing the exposure time individually for the pixels 30 with a large incident light amount and the pixels 30 with a small incident light amount. Even when the amount of incident light is so large that the floating diffusion FD is saturated in normal imaging, the dynamic range can be expanded by dividing the exposure time into small portions and repeating imaging.
Next, the correlated multisampling control will be described with reference to fig. 5 (b). Fig. 5 (b) is a time chart in the case where the correlated multisampling control is performed for each pixel 30. The horizontal axis of fig. 5 (b) represents time, and the time advances to the right. The quadrangle written with "Dark" in fig. 5 (b) shows the timing at which the a/D conversion section 302 performs sampling of the pixel reset signal. The quadrangle written with "Sig" in fig. 5 (b) shows the timing at which the a/D conversion section 302 samples the pixel signal. The quadrangle written with "Out" in (b) of fig. 5 shows the timing at which the a/D conversion section 302 outputs the sampling result toward the sampling section 303. In fig. 5 (b), the pixels 30 are classified into four pixels 30a to 30d according to the amount of incident light, and correlated multisampling is performed.
The exposure time for pixel 30a is the longest and the exposure time for pixel 30d is the shortest. In the correlated multisampling control, the floating diffusion FD is reset at an earlier timing as the exposure time of the pixel 30 is longer. The longer the exposure time of the pixel 30, the more time is left after resetting the floating diffusion FD until sampling the pixel signal. During which the pixel reset signal is repeatedly sampled.
For example, in fig. 5 (b), the exposure time of the pixel 30a is longest. The floating diffusion FD is reset at a time T7 of a period T5 before the end time T6 of the exposure time T4 of the pixel 30 a. As a result, the pixel reset signal is sampled four times before the time t 6. The pixel signal is repeatedly sampled this time after the exposure time T4 is completed and before the next exposure time T6 is completed.
The long exposure time means that the amount of incident light is small, and means that the influence of noise of the amplification transistor AMI, the selection transistor SEL, and the a/D conversion unit 302 in the pixel signal is large. That is, the pixel 30 having a larger influence of the noise as described above is capable of performing imaging with higher sensitivity by sampling the pixel reset signal and the pixel signal more times.
The image pickup device 3 performs the above operations in parallel for each pixel 30. That is, each pixel 30 performs operations from photoelectric conversion by the photodiode 31 to storage of a digital value in the pixel value holding unit 304 in parallel. The readout of the imaging result from the pixel value holding unit 304 is performed sequentially for each pixel 30.
As described above, the image pickup device 3 of the present embodiment can control the exposure time for each pixel. In order to control the exposure time for each pixel, it is necessary to control the timing of turning on and off the transfer transistor Tx for each pixel. That is, the voltage supplied to the gate of the transfer transistor Tx (in the present embodiment, the voltage Vg1 and the voltage Vg2 based on the voltage V1 and the voltage Vneg) must be controlled for each pixel. That is, the 1 st power supply section that supplies the voltage Vneg and the 2 nd power supply section that supplies the voltage V1 must be provided for each pixel. Since the voltage processed by the 1 st semiconductor substrate 7 is different from the voltage Vneg and the voltage V1, if the 1 st power supply portion and the 2 nd power supply portion are provided in the pixel 30, the 1 st power supply portion and the 2 nd power supply portion occupy a large area. In particular, since the 1 st power supply section processes a voltage Vneg lower than the substrate voltage, a triple well (triple well) structure is required in order to avoid a positive bias against the substrate. Therefore, the 1 st power supply section requires a particularly large area. As a result, the area of the pixel 30 occupied by the photodiode 31 is greatly reduced. That is, the aperture ratio of the photodiode 31 is greatly reduced, and it is difficult to miniaturize the imaging element. In this embodiment, by providing the power supply portion 94 as the 1 st power supply portion as a power supply common to all pixels outside the pixels, the exposure time can be controlled for each pixel without separately providing the 1 st power supply portion and the 2 nd power supply portion in the vicinity of the photodiode 31 of the 1 st semiconductor substrate 7 (without lowering the aperture ratio of the photodiode 31). In addition, the image pickup device can be miniaturized.
According to the above embodiment, the following operational effects are obtained.
(1) The image pickup element 3 includes a power supply section 94 for supplying a negative voltage and a plurality of pixels 30. Each of the plurality of pixels 30 includes: a photodiode 31 that photoelectrically converts incident light; a floating diffusion FD that stores electric charges photoelectrically converted by the photodiode 31; a transfer transistor Tx that transfers the charge photoelectrically converted by the photodiode 31 to the floating diffusion FD based on a transfer signal; an individual power supply unit 341 supplying a positive voltage; and a transmission signal supply unit 307a that supplies either a 1 st voltage lower than the ground voltage or a 2 nd voltage higher than the ground voltage to the transmission transistor Tx as a transmission signal based on the negative voltage supplied from the power supply unit 94 and the positive voltage supplied from the individual power supply unit 341. With this configuration, parallel readout can be performed for each pixel without providing a power supply for supplying a negative voltage to each pixel 30.
(2) On the 1 st semiconductor substrate 7, a photodiode 31, a transfer transistor Tx, a floating diffusion unit FD, a transfer signal supply portion 307a, and an individual power supply portion 341 are provided. An a/D conversion section 302 and a sampling section 303 are provided on the 2 nd semiconductor substrate 8. In this way, since the circuit for processing the negative power supply is provided in the 2 nd semiconductor substrate 8 and is not present in the 1 st semiconductor substrate 7, it is not necessary to provide a diffusion layer or the like for processing the negative power supply on the 1 st semiconductor substrate 7, and the aperture ratio of the photodiode 31 can be improved.
(3) A transmission control signal composed of a ground voltage and a positive voltage is input to the transmission signal supply unit 307 a. The transmission signal supply section 307a converts the transmission control signal into a transmission signal composed of a negative voltage and a positive voltage, and outputs the transmission signal. With this configuration, the transmission signal including the negative voltage can be supplied without introducing a special circuit element for handling the negative voltage.
(4) Each of the plurality of pixels 30 includes a resistor R1 having one end connected to the power supply section 94 and the other end connected to the transfer transistor Tx, and a resistor R2 having one end to which a transfer signal is input and the other end connected to the transfer transistor Tx. With this configuration, the voltage supplied to the transfer transistor Tx can be easily controlled by the potential dividing circuit based on the combination of the resistance values of the resistor R1 and the resistor R2.
(embodiment 2)
Unlike the image pickup device 3 of embodiment 1, the image pickup device 3 of embodiment 2 does not have the 2 nd semiconductor substrate 8, and has only one semiconductor substrate 70. Hereinafter, the image pickup device 3 according to embodiment 2 will be described centering on differences from the image pickup device 3 according to embodiment 1. Note that the same portions as those in embodiment 1 are denoted by the same reference numerals as those in embodiment 1, and description thereof is omitted.
Fig. 6 is a sectional view of the image pickup device 3. Fig. 6 shows a cross section of only a part of the entire image pickup device 3. The imaging element 3 is a so-called back-illuminated imaging element. The image pickup element 3 photoelectrically converts incident light from above the paper surface.
The image pickup element 3 has a plurality of pixels 30. One pixel 30 includes a microlens 74 and a color filter 73 illustrated in fig. 6. In addition, the pixel 30 includes an analog circuit portion 301, an a/D conversion portion 302, a sampling portion 303, a pixel value holding portion 304, an arithmetic portion 305, an individual pixel control portion 306, and a pixel driving portion 307 shown in fig. 4. These regions are provided in region 710. Further, reference numeral 720 is a wiring layer.
Fig. 7 is a block diagram schematically showing the configuration of the image pickup device 3. A plurality of pixels 30 arranged in a two-dimensional shape are provided on the semiconductor substrate 70. In fig. 7, only nine pixels 30 in total of three rows and three columns among the plurality of pixels 30 provided on the semiconductor substrate 70 are illustrated.
The semiconductor substrate 70 has a power supply section 94 as a 1 st voltage source that supplies a 1 st voltage, i.e., a voltage Vneg, to each pixel 30. The voltage Vneg is a voltage lower than the substrate voltage of the 1 st semiconductor substrate 7. In this embodiment, the substrate voltage of the 1 st semiconductor substrate 7 is the ground voltage. Therefore, the voltage Vneg is a negative voltage lower than the ground voltage. The power supply section 94 is not provided separately for each pixel 30, but is provided in common for a plurality of pixels 30.
Each of the plurality of pixels 30 has an individual power supply 341 that supplies a predetermined voltage V1. The individual power supply unit 341 is provided for each pixel 30. The voltage V1 supplied from the individual power supply unit 341 is a voltage higher than the substrate voltage of the 1 st semiconductor substrate 7. In this embodiment, the substrate voltage of the 1 st semiconductor substrate 7 is the ground voltage. Therefore, the voltage V1 is a positive voltage higher than the ground voltage.
According to the above embodiment, the following effects are obtained in addition to the effects described in embodiment 1.
(5) All the portions constituting the pixel 30 are provided on a single semiconductor substrate 70. With this configuration, the manufacturing cost of the image pickup device 3 can be reduced. In addition, a process of stacking a plurality of semiconductor substrates can be omitted, and the manufacturing process can be simplified.
The following modifications are also within the scope of the present invention, and one or more of the modifications may be combined with the above-described embodiments.
(modification 1)
A switch for turning on/off the electrical connection between the power supply section 94 and the plurality of pixels 30 may be provided between the power supply section 94 and the plurality of pixels 30. When the switch is turned off, the current from the plurality of pixels 30 to the power supply section 94 is cut off. By providing this switch, when the imaging operation is not performed, no current flows between the power supply unit 94 and the transmission signal supply unit 307a, and power consumption can be reduced. Note that, when the electrical connection with the power supply portion 94 is turned on and off at the same timing for all the pixels 30, only one switch may be provided in front of the power supply portion 94. The power supply unit 94 may incorporate the above-described switch.
(modification 2)
In each of the above embodiments, a capacitor, a coil, or the like may be disposed instead of the resistor R1. The signal output from the buffer 340 is a signal having a fixed frequency, and an arbitrary impedance such as a capacitor or a coil can be combined to form a potential dividing circuit.
(modification 3)
In embodiment 1, the resistor R1 may be a silicon through electrode connecting the 1 st semiconductor substrate 7 and the 2 nd semiconductor substrate. With this configuration, the resistance value of the resistor R1 can be easily set to a desired value.
In the above, various embodiments and modifications have been described, but the present invention is not limited to these. Other modes that can be conceived within the scope of the technical idea of the present invention are also included in the scope of the present invention.
The above-described embodiments and modifications also include the following image pickup device and electronic camera.
(1) An image pickup element having a 1 st voltage source for supplying a 1 st voltage and a plurality of pixels to which the 1 st voltage is supplied, the pixels comprising: a photoelectric conversion unit that photoelectrically converts incident light; a storage unit that stores the electric charge obtained by photoelectric conversion by the photoelectric conversion unit; a transfer unit that transfers the electric charge from the photoelectric conversion unit to the storage unit; a 2 nd voltage source supplying a 2 nd voltage; and a supply unit configured to supply a transmission signal obtained based on one of the 1 st voltage generated by the 1 st voltage source and the 2 nd voltage generated by the 2 nd voltage source to the transmission unit.
(2) In the image pickup device as described in (1), the supply unit includes a 1 st resistor disposed between the 1 st voltage source and the transfer unit, and a 2 nd resistor disposed between the 2 nd voltage source and the transfer unit.
(3) In the image pickup device as in (2), a substrate voltage is applied to the image pickup device, the 1 st voltage source supplies a voltage lower than the substrate voltage, and the 2 nd voltage source supplies a voltage higher than the substrate voltage.
(4) In the image pickup device as recited in (3), the transfer unit electrically conducts between the photoelectric conversion unit and the storage unit to transfer the electric charge generated by the photoelectric conversion unit to the storage unit, and the supply unit supplies a transfer signal for electrically conducting or non-conducting between the photoelectric conversion unit and the storage unit to the transfer unit.
(5) The imaging element as described in (3) or (4) includes: and a 2 nd semiconductor substrate provided with an a/D conversion portion for each of the plurality of pixels, the a/D conversion portion outputting a digital signal based on an amount of electric charge stored in the storage portion.
(6) In the image pickup device as described in (5), the 1 st voltage source is provided in the 2 nd semiconductor substrate, and the 1 st resistor includes at least an electrode connecting the 1 st semiconductor substrate and the 2 nd semiconductor substrate.
(7) In the image pickup device as in (3) to (5), the supply unit has a capacitor disposed between the 1 st voltage source and the transfer unit.
(8) In the image pickup device as described in (3) to (7), the supply unit of one of the plurality of supply units transfers the electric charge generated by the photoelectric conversion unit to the storage unit in the 1 st period, and the supply unit of the other supply unit transfers the electric charge generated by the photoelectric conversion unit to the storage unit in the 2 nd period having a length different from that of the 1 st period.
(9) In the image pickup device as described in (3) to (8), the photoelectric conversion unit is an embedded photodiode, the transfer unit transfers the charge photoelectrically converted by the photoelectric conversion unit to the storage unit when the transfer signal is a 1 st voltage based on the voltage supplied from the 1 st voltage source, and does not transfer the charge photoelectrically converted by the photoelectric conversion unit to the storage unit when the transfer signal is a 2 nd voltage based on the voltage supplied from the 1 st voltage source.
(10) In the image pickup device as described in (3) to (9), the supply unit is input with any one of a 3 rd voltage equal to or higher than the substrate voltage and a 4 th voltage equal to or higher than the substrate voltage and higher than the 3 rd voltage, and the supply unit outputs the transmission signal as the 1 st voltage when the 3 rd voltage is input and supplies the transmission signal as the 2 nd voltage when the 4 th voltage is input.
(11) In the image pickup device as described in (1) to (10), each of the plurality of pixels includes a switching unit that electrically conducts or non-conducts between the supply unit and the 1 st voltage source.
(12) An electronic camera includes the imaging elements (1) to (11).
The above-described embodiments and modifications also include the following imaging devices.
(1) An image pickup element includes a negative voltage power supply unit that supplies a negative voltage, and a plurality of pixels each including: a photoelectric conversion unit that photoelectrically converts incident light; a storage unit for storing electric charges obtained by photoelectric conversion by the photoelectric conversion unit; a transfer unit that transfers the charge photoelectrically converted by the photoelectric conversion unit to the storage unit based on a transfer signal; a positive voltage power supply unit for supplying a positive voltage; and a transmission signal supply unit configured to supply either a 1 st voltage lower than a ground voltage or a 2 nd voltage higher than the ground voltage as the transmission signal to the transmission unit based on the negative voltage supplied from the negative voltage power supply unit and the positive voltage supplied from the positive voltage power supply unit.
(2) An image pickup device as described in (1) includes: and a 2 nd semiconductor substrate provided with an a/D conversion portion for each of the plurality of pixels, the a/D conversion portion outputting a digital signal based on an amount of electric charge stored in the storage portion.
(3) In the imaging device as described in (2), the transmission signal supply unit includes: a 1 st resistor having one end connected to the negative voltage power supply unit and the other end connected to the transmission unit, and a 2 nd resistor having one end to which the transmission signal is input and the other end connected to the transmission unit.
(4) In the image pickup device as described in (3), the negative voltage power supply portion is provided in the 2 nd semiconductor substrate, and the 1 st resistor includes at least an electrode connecting the 1 st semiconductor substrate and the 2 nd semiconductor substrate.
(5) In the image pickup device as described in (1) or (2), the transmission signal supply unit has a capacitor having one end connected to the negative voltage power supply unit and the other end connected to the transmission unit.
(6) In the image pickup device as described in (1) to (5), the transfer signal supply unit of one of the plurality of transfer signal supply units transfers the electric charge generated by the photoelectric conversion unit to the storage unit in the 1 st period, and the transfer signal supply unit of the other portion transfers the electric charge generated by the photoelectric conversion unit to the storage unit in the 2 nd period having a length different from the 1 st period.
(7) In the image pickup device as described in (1) to (6), the photoelectric conversion unit is an embedded photodiode, the transfer unit transfers the charge photoelectrically converted by the photoelectric conversion unit to the storage unit when the transfer signal is the 1 st voltage, and does not transfer the charge photoelectrically converted by the photoelectric conversion unit to the storage unit when the transfer signal is the 2 nd voltage.
(8) In the image pickup device as described in (1) to (7), the transmission signal supply unit receives, as a drive signal, either a 3 rd voltage that is equal to or higher than a ground voltage or a 4 th voltage that is equal to or higher than the ground voltage and higher than the 3 rd voltage, and outputs the transmission signal as the 1 st voltage when the drive signal is the 3 rd voltage and outputs the transmission signal as the 2 nd voltage when the drive signal is the 4 th voltage.
(9) In the image pickup device as described in (1) to (8), each of the plurality of pixels includes a switching unit that turns on and off electrical connection between the transmission signal supply unit and the negative voltage power supply unit.
The disclosure of the following application on which priority is based is hereby incorporated by reference.
Japanese patent application No. 195283 of 2015 (application is made on 9-30.2015)
Description of the reference numerals
3 … image pickup element, 7 … 1 st semiconductor substrate, 8 … nd 2 nd semiconductor substrate, 30 … pixel, 31 … photodiode, 70 … semiconductor substrate, 301 … analog circuit diagram, 302 … a/D conversion section, 303 … sampling section, 306 … individual pixel control section, 307 … pixel drive section

Claims (12)

1. An image pickup element, comprising:
a pixel having: a photoelectric conversion unit that photoelectrically converts light to generate electric charge; a storage unit that stores the electric charge generated by the photoelectric conversion unit; and a transfer portion that transfers the electric charge generated by the photoelectric conversion portion to the storage portion;
a 1 st voltage source that supplies a 1 st voltage, the 1 st voltage being a voltage lower than a voltage of a substrate having the pixel;
a 2 nd voltage source which supplies a 2 nd voltage, the 2 nd voltage being a voltage higher than a voltage of a substrate having the pixel; and
and a supply unit configured to supply a transmission signal obtained based on the 1 st voltage and the 2 nd voltage or a transmission signal obtained based on the 1 st voltage and a predetermined voltage to the transmission unit.
2. The image pickup element according to claim 1,
the supply unit has a 1 st resistor disposed between the 1 st voltage source and the transfer unit, and a 2 nd resistor disposed between the 2 nd voltage source and the transfer unit.
3. The image pickup element according to claim 2,
the transfer portion electrically conducts between the photoelectric conversion portion and the storage portion to transfer the electric charge generated by the photoelectric conversion portion to the storage portion,
the supply unit supplies a transmission signal obtained based on the 1 st voltage and the 2 nd voltage to the transmission unit so as to electrically conduct the photoelectric conversion unit and the storage unit, and supplies a transmission signal obtained based on the 1 st voltage and the predetermined voltage to the transmission unit so as to electrically non-conduct the photoelectric conversion unit and the storage unit.
4. The image pickup element according to claim 3,
the predetermined voltage is a ground voltage.
5. The image pickup element according to claim 3,
the 2 nd voltage source changes the 2 nd voltage at a voltage higher than the predetermined voltage.
6. The image pickup element according to claim 2,
the supply unit has a capacitor disposed between the 1 st voltage source and the transfer unit, and a 2 nd resistor disposed between the 2 nd voltage source and the transfer unit.
7. The image pickup element according to claim 6,
the supply unit is provided for each of the pixels,
some of the supply portions supply the transfer signal so as to transfer the electric charges generated by the photoelectric conversion portion to the storage portion during a 1 st period, and the other supply portions supply the transfer signal so as to transfer the electric charges generated by the photoelectric conversion portion to the storage portion during a 2 nd period different from the 1 st period.
8. The image pickup element according to claim 1,
the supply unit receives a 3 rd voltage equal to or higher than the predetermined voltage or a 4 th voltage higher than the 3 rd voltage,
the supply unit outputs the transmission signal at the 1 st voltage when the 3 rd voltage is input, and supplies the transmission signal at the 2 nd voltage when the 4 th voltage is input.
9. The image pickup element according to claim 1,
the pixel has a switching unit capable of switching connection between the 1 st voltage source and the 2 nd voltage source.
10. The image pickup element according to any one of claims 1 to 9, comprising:
a 1 st substrate provided with a plurality of the pixels; and
and a 2 nd substrate different from the 1 st substrate and provided with an a/D conversion portion for converting an analog signal based on the amount of electric charges stored in the storage portion into a digital signal, for each of the pixels.
11. The image pickup element according to claim 10,
the 1 st voltage source is arranged on the 2 nd substrate,
the 1 st resistor has a connection portion connecting the 1 st substrate and the 2 nd substrate.
12. An electronic camera is characterized in that a camera body is provided,
the image pickup element according to any one of claims 1 to 11.
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