CN108110081A - 新型异质结雪崩光电二极管 - Google Patents

新型异质结雪崩光电二极管 Download PDF

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CN108110081A
CN108110081A CN201810100176.2A CN201810100176A CN108110081A CN 108110081 A CN108110081 A CN 108110081A CN 201810100176 A CN201810100176 A CN 201810100176A CN 108110081 A CN108110081 A CN 108110081A
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石拓
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Beijing One Path Science And Technology Co Ltd
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Abstract

本发明公开了一种新型异质结雪崩光电二极管,包括衬底、第一外延层、第二外延层、第三外延层和第四外延层,第四外延层通过异质外延生长形成于第三外延层之上;第一外延层上形成有第一掺杂区,第一掺杂区包含第一掺杂类型掺杂;第一外延层上形成有第一电极接触区,第一电极接触区包含第一掺杂类型掺杂;第二外延层上形成有第二掺杂区,第二掺杂区包含第一掺杂类型掺杂;第三外延层顶部区域形成有制作有图形的防电场穿透保护层,制作有图形的防电场穿透保护层包含有第一掺杂剂量的第二掺杂类型掺杂;第三外延层顶部区域形成有电场穿透通孔阵列区,电场穿透通孔阵列区包含有第二掺杂剂量的第二掺杂类型掺杂。本发明可以降低器件暗电流,提高探测灵敏度。

Description

新型异质结雪崩光电二极管
技术领域
本发明涉及一种新型异质结雪崩光电二极管。
背景技术
如图2所示,为一种传统的异质外延雪崩光电二极管的典型结构,包括衬底201、第一外延层202、第二外延层203、第三外延层204和第四外延层205,在第一外延层202具有第一掺杂区211,在第一掺杂区211中形成有第一电极接触区212;在第二外延层203上具有第二掺杂区213,在第三外延层204上形成有防电场穿透保护层216,在防电场穿透保护层216上形成有增益区电场控制电荷掺杂层217,在第四外延层205上形成有第二电极接触区218。其中第一外延层202、第二外延层203和第三外延层204为硅(Si)材料,第四外延层205为锗(Ge)材料。由于Ge材料和Si材料之间存在较大的晶格失配,导致Ge材料在外延过程中形成大量的缺陷和错位,在工作偏压条件下电场渗透进入Ge材料区域时会形成较大的暗电流,从而影响探测信噪比和检测灵敏度。
发明内容
本发明的目的是解决目前异质外延雪崩光电二极管由于上述结构缺陷导致存在较大暗电流,从而影响探测信噪比和检测灵敏度的技术问题。
为实现以上目的,本发明提供一种新型异质结雪崩光电二极管,从下至上依次包括衬底、第一外延层、第二外延层、第三外延层和第四外延层,所述第四外延层通过异质外延生长形成于所述第三外延层之上;
所述第一外延层上形成有第一掺杂区,所述第一掺杂区包含第一掺杂类型掺杂;
所述第一外延层上形成有第一电极接触区,所述第一电极接触区包含第一掺杂类型掺杂;
所述第二外延层上形成有第二掺杂区,所述第二掺杂区包含第一掺杂类型掺杂;
所述第三外延层顶部区域形成有制作有图形的防电场穿透保护层,所述制作有图形的防电场穿透保护层包含有第一掺杂剂量的第二掺杂类型掺杂;
所述第三外延层顶部区域形成有电场穿透通孔阵列区,所述电场穿透通孔阵列区包含有第二掺杂剂量的第二掺杂类型掺杂;
所述第四外延层上形成有第二电极接触区,所述第二电极接触区包含第二掺杂类型掺杂。
进一步地,所述制作有图形的防电场穿透保护层通过离子注入或扩散工艺形成于所述第三外延层顶部区域。
进一步地,所述电场穿透通孔阵列区通过离子注入或扩散工艺形成于所述第三外延层顶部区域。
进一步地,所述第二外延层未掺杂、非故意掺杂或低浓度掺杂,其背景掺杂浓度低于5E15cm-3
进一步地,所述第三外延层未掺杂、非故意掺杂或低浓度掺杂,其背景掺杂浓度低于5E15cm-3
进一步地,所述衬底为硅衬底、绝缘体上硅衬底、砷化镓衬底、磷化铟称帝、石英衬底、碳化硅衬底和蓝宝石中的一种。
进一步地,所述第一外延层、第二外延层和第三外延层均包含第一半导体材料,所述第一半导体材料是硅、磷化铟、砷化镓、氮化铝和氮化镓中的一种。
进一步地,所述第四层外延层包含第二半导体材料,所述第二半导体材料是锗、锗硅、铟镓砷、铟镓砷磷、铟镓铝砷和铟镓氮中的一种。
进一步地,所述电场穿透通孔阵列区的所述第二掺杂剂量低于所述制作有图形的防电场穿透保护层的所述第一掺杂剂量。
进一步地,所述电场穿透通孔阵列区被所述制作有图形的防电场穿透保护层所包围。
进一步地,所述电场穿透通孔阵列区为均匀分布或非均匀分布。
进一步地,所述第一掺杂类型为N型掺杂,所述第二掺杂类型为P型掺杂。
根据本发明的一个方面,本发明的新型异质结雪崩光电二极管包括绝缘体上硅衬底,所述绝缘体上硅衬底顶部设有硅第一外延层,通过离子注入在所述硅第一外延层中形成N+型第一掺杂区,再通过离子注入在所述N+型第一掺杂区中形成N++型掺杂区,所述N++型掺杂区用于制作N型第一电极接触区;
通过外延生长在所述硅第一外延层上方形成本征薄膜硅第二外延层;
通过离子注入在所述本征薄膜硅第二外延层上形成N+型第二掺杂区;
通过外延生长在所述本征薄膜硅第二外延层上形成本征薄膜硅第三外延层;
通过离子注入在所述本征薄膜硅第三外延层顶部形成P型掺杂的所述制作有图形的防电场穿透保护层,通过离子注入在所述制作有图形的防电场穿透保护层上形成P型掺杂的所述电场穿透通孔阵列区,所述制作有图形的防电场穿透保护层的掺杂浓度高于所述电场穿透通孔阵列区的掺杂浓度;
通过选择性外延生长在所述本征薄膜硅第三外延层上形成锗薄膜第四外延层;
通过离子注入在所述锗薄膜第四外延层上部形成P++型掺杂区,所述P++型掺杂区用于制作P型第二电极接触区。
进一步地,所述N+型第一掺杂区的掺杂浓度为5E17cm-3
所述本征薄膜硅第二外延层为非故意掺杂区,其厚度为100-300nm,掺杂浓度低于5E14cm-3
所述N+型第二掺杂区的掺杂浓度为5E17cm-3~5E18cm-3
所述本征薄膜硅第三外延层的掺杂类型非故意掺杂,其厚度为400-3000nm,掺杂浓度低于5E14cm-3
与现有技术相比,本发明的有益效果是:
当对第一电极接触区和第二电极接触区之间施加合适方向的工作偏压时,所述电场穿透通孔阵列区的掺杂电荷被耗尽,电场穿透并进入所述第四外延层,第四外延层中所形成的光生载流子通过扩散和漂移作用被提取出来并进入第三外延层(或称倍增区);而由于制作有图形的防电场穿透保护层具有更高的掺杂剂量,其并不能够被耗尽,从而防止电场穿透进入到具有较高缺陷和错位分布的第四外延层,抑制了暗电流的产生,从而提高本发明的探测信噪比和检测灵敏度。
附图说明
下面结合附图对本发明的新型异质结雪崩光电二极管作进一步说明。
图1是本发明一个实施例的结构示意图;
图2是传统异质外延雪崩光电二极管的结构示意图;
图3是本发明一个实施例的制作有图形的防电场穿透保护层和电场穿透通孔阵列区的结构示意图;
图4是本发明一个实施例的制作有图形的防电场穿透保护层和电场穿透通孔阵列区的电场分布图;
图5是本发明一个实施例的通过离子注入形成制作有图形的防电场穿透保护层的工艺原理图;
图6是本发明一个实施例的通过离子注入形成电场穿透通孔阵列区的工艺原理图。
具体实施方式
实施例1
如图1、3-6所示,本发明的新型异质结雪崩光电二极管,包括绝缘体上硅衬底101,绝缘体上硅衬底101顶部设有硅第一外延层102,通过离子注入在硅第一外延层102中形成N+型第一掺杂区111,再通过离子注入在N+型第一掺杂区中形成N++型掺杂区112(重新N掺杂),N++型掺杂区112用于制作N型第一电极接触区,即N++型掺杂区112即为N型第一电极接触区112;
通过外延生长在硅第一外延层102上方形成本征薄膜硅第二外延层103;
通过离子注入在本征薄膜硅第二外延层103上形成N+型第二掺杂区113;
通过外延生长在本征薄膜硅第二外延层103上形成本征薄膜硅第三外延层104,本征薄膜硅第三外延层104即倍增层/区115;
通过离子注入在本征薄膜硅第三外延层104顶部形成P型掺杂的制作有图形的防电场穿透保护层116,通过离子注入在制作有图形的防电场穿透保护层116上形成P型掺杂的电场穿透通孔阵列区117,电场穿透通孔阵列区117被制作有图形的防电场穿透保护层116所包围(参见图3),制作有图形的防电场穿透保护层116的掺杂浓度高于电场穿透通孔阵列区117的掺杂浓度;
通过选择性外延生长在本征薄膜硅第三外延层104上形成锗薄膜第四外延层105;
通过离子注入在锗薄膜第四外延层105上部形成P++型掺杂区118,P++型掺杂区118用于制作P型第二电极接触区,即P++型掺杂区118即为P型第二电极接触区118。
当对N型第一电极接触区112和P型第二电极接触区118之间施加合适方向的工作偏压时,电场穿透通孔阵列区117的掺杂电荷被耗尽,电场穿透并进入锗薄膜第四外延层105,锗薄膜第四外延层105中所形成的光生载流子通过扩散和漂移作用被提取出来并进入本征薄膜硅第三外延层104;而由于制作有图形的防电场穿透保护层116相对于电场穿透通孔阵列区117具有更高的掺杂剂量,其并不能够被耗尽,从而防止电场穿透进入到具有较高缺陷和错位分布的锗薄膜第四外延层105,抑制了暗电流的产生,从而提高本新型异质结雪崩光电二极管的探测信噪比和检测灵敏度。
实施例2
为了进一步提高本发明抑制暗电流的性能,在实施例1的基础上,将N+型第一掺杂区111的掺杂浓度定为5E17cm-3;本征薄膜硅第二外延层103为非故意掺杂区,厚度为100-300nm,掺杂浓度低于5E14cm-3;N+型第二掺杂区113的掺杂浓度定为5E17cm-3~5E18cm-3;本征薄膜硅第三外延层104的掺杂类型为非故意掺杂,厚度为400-3000nm,掺杂浓度低于5E14cm-3
本发明的不局限于上述实施例,本发明的上述各个实施例的技术方案彼此可以交叉组合形成新的技术方案,另外凡采用等同替换形成的技术方案,均落在本发明要求的保护范围内。

Claims (10)

1.新型异质结雪崩光电二极管,其特征在于,从下至上依次包括衬底、第一外延层、第二外延层、第三外延层和第四外延层,所述第四外延层通过异质外延生长形成于所述第三外延层之上;
所述第一外延层上形成有第一掺杂区,所述第一掺杂区包含第一掺杂类型掺杂;
所述第一外延层上形成有第一电极接触区,所述第一电极接触区包含第一掺杂类型掺杂;
所述第二外延层上形成有第二掺杂区,所述第二掺杂区包含第一掺杂类型掺杂;
所述第三外延层顶部区域形成有制作有图形的防电场穿透保护层,所述制作有图形的防电场穿透保护层包含有第一掺杂剂量的第二掺杂类型掺杂;
所述第三外延层顶部区域形成有电场穿透通孔阵列区,所述电场穿透通孔阵列区包含有第二掺杂剂量的第二掺杂类型掺杂;
所述第四外延层上形成有第二电极接触区,所述第二电极接触区包含第二掺杂类型掺杂。
2.根据权利要求1所述的新型异质结雪崩光电二极管,其特征在于,所述制作有图形的防电场穿透保护层通过离子注入或扩散工艺形成于所述第三外延层顶部区域;
所述电场穿透通孔阵列区通过离子注入或扩散等工艺形成于所述第三外延层顶部区域。
3.根据权利要求1所述的新型异质结雪崩光电二极管,其特征在于,所述第二外延层未掺杂、非故意掺杂或低浓度掺杂,其背景掺杂浓度低于5E15cm-3
所述第三外延层未掺杂、非故意掺杂或低浓度掺杂,其背景掺杂浓度低于5E15cm-3
4.根据权利要求1所述的新型异质结雪崩光电二极管,其特征在于,所述衬底为硅衬底、绝缘体上硅衬底、砷化镓衬底、磷化铟称帝、石英衬底、碳化硅衬底和蓝宝石中的一种。
5.根据权利要求1所述的新型异质结雪崩光电二极管,其特征在于,所述第一外延层、第二外延层和第三外延层均包含第一半导体材料,所述第一半导体材料是硅、磷化铟、砷化镓、氮化铝和氮化镓中的一种;
所述第四层外延层包含第二半导体材料,所述第二半导体材料是锗、锗硅、铟镓砷、铟镓砷磷、铟镓铝砷和铟镓氮中的一种。
6.根据权利要求1所述的新型异质结雪崩光电二极管,其特征在于,所述电场穿透通孔阵列区的所述第二掺杂剂量低于所述制作有图形的防电场穿透保护层的所述第一掺杂剂量。
7.根据权利要求1所述的新型异质结雪崩光电二极管,其特征在于,所述电场穿透通孔阵列区被所述制作有图形的防电场穿透保护层所包围。
8.根据权利要求1所述的新型异质结雪崩光电二极管,其特征在于,所述电场穿透通孔阵列区为均匀分布或非均匀分布;
所述第一掺杂类型为N型掺杂,所述第二掺杂类型为P型掺杂。
9.新型异质结雪崩光电二极管,其特征在于,包括绝缘体上硅衬底,所述绝缘体上硅衬底顶部设有硅第一外延层,通过离子注入在所述硅第一外延层中形成N+型第一掺杂区,再通过离子注入在所述N+型第一掺杂区中形成N++型掺杂区,所述N++型掺杂区用于制作N型第一电极接触区;
通过外延生长在所述硅第一外延层上方形成本征薄膜硅第二外延层;
通过离子注入在所述本征薄膜硅第二外延层上形成N+型第二掺杂区;
通过外延生长在所述本征薄膜硅第二外延层上形成本征薄膜硅第三外延层;
通过离子注入在所述本征薄膜硅第三外延层顶部形成P型掺杂的所述制作有图形的防电场穿透保护层,通过离子注入在所述制作有图形的防电场穿透保护层上形成P型掺杂的所述电场穿透通孔阵列区,所述制作有图形的防电场穿透保护层的掺杂浓度高于所述电场穿透通孔阵列区的掺杂浓度;
通过选择性外延生长在所述本征薄膜硅第三外延层上形成锗薄膜第四外延层;
通过离子注入在所述锗薄膜第四外延层上部形成P++型掺杂区,所述P++型掺杂区用于制作P型第二电极接触区。
10.根据权利要求9所述的新型异质结雪崩光电二极管,其特征在于,所述N+型第一掺杂区的掺杂浓度为5E17cm-3
所述本征薄膜硅第二外延层为非故意掺杂区,其厚度为100-300nm,掺杂浓度低于5E14cm-3
所述N+型第二掺杂区的掺杂浓度为5E17cm-3~5E18cm-3
所述本征薄膜硅第三外延层的掺杂类型非故意掺杂,其厚度为400-3000nm,掺杂浓度低于5E14cm-3
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