CN108110046A - Inhibit vertical pulling silicon substrate of displacement irradiation damage and preparation method thereof based on oxygen precipitation - Google Patents
Inhibit vertical pulling silicon substrate of displacement irradiation damage and preparation method thereof based on oxygen precipitation Download PDFInfo
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- CN108110046A CN108110046A CN201711383711.1A CN201711383711A CN108110046A CN 108110046 A CN108110046 A CN 108110046A CN 201711383711 A CN201711383711 A CN 201711383711A CN 108110046 A CN108110046 A CN 108110046A
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- silicon substrate
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 67
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 65
- 239000010703 silicon Substances 0.000 title claims abstract description 64
- 239000000758 substrate Substances 0.000 title claims abstract description 50
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 title claims abstract description 42
- 239000001301 oxygen Substances 0.000 title claims abstract description 42
- 229910052760 oxygen Inorganic materials 0.000 title claims abstract description 42
- 238000001556 precipitation Methods 0.000 title claims abstract description 39
- 238000006073 displacement reaction Methods 0.000 title claims abstract description 32
- 238000002360 preparation method Methods 0.000 title claims abstract description 11
- 239000000463 material Substances 0.000 claims abstract description 44
- 230000007547 defect Effects 0.000 claims abstract description 10
- 230000002401 inhibitory effect Effects 0.000 claims abstract description 10
- 238000000034 method Methods 0.000 claims abstract description 9
- 238000000137 annealing Methods 0.000 claims description 27
- 238000010438 heat treatment Methods 0.000 claims description 18
- 230000014759 maintenance of location Effects 0.000 claims description 5
- 230000005764 inhibitory process Effects 0.000 claims description 2
- 239000002245 particle Substances 0.000 claims description 2
- 230000008569 process Effects 0.000 abstract description 3
- 238000004220 aggregation Methods 0.000 abstract description 2
- 230000002776 aggregation Effects 0.000 abstract description 2
- 239000012535 impurity Substances 0.000 abstract description 2
- 239000002184 metal Substances 0.000 abstract 1
- 230000008961 swelling Effects 0.000 abstract 1
- 238000007669 thermal treatment Methods 0.000 abstract 1
- 125000004429 atom Chemical group 0.000 description 8
- 239000012300 argon atmosphere Substances 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- -1 A1 regions in figure Chemical compound 0.000 description 1
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 125000004430 oxygen atom Chemical group O* 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
The invention discloses vertical pulling silicon substrates for inhibiting displacement irradiation damage based on oxygen precipitation and preparation method thereof：The substrate material includes the oxygen precipitation area below oxygen precipitate-free clean area and clean area by near surface, room and the complex centre of gap silicon is induced as displacement irradiation, so as to effectively inhibit displacement irradiation damage；This method is prepared by silicon substrate material progress rapid thermal treatment and low temperature, the high temperature anneal.Oxygen precipitation area in the present invention induces room and the complex centre of gap silicon as displacement irradiation, the defects of generated a large amount of interstitial atoms, room in irradiation process can be reduced, so as to which material bulk defect density be greatly lowered, it prevents the aggregation in interstitial atom, room etc. from forming elementide, cavity etc., greatly reduces the irradiation damages such as the swelling of material, hardening, decrystallized.In addition, oxygen precipitation can also effectively absorb the metal impurities on silicon substrate material surface, be conducive to improve the yield rate of integrated circuit.
Description
Technical field
Inhibit the vertical pulling of displacement irradiation damage the present invention relates to technical field of manufacturing semiconductors more particularly to based on oxygen precipitation
Silicon substrate and preparation method thereof.
Background technology
With science and technology it is growing, more and more silicon-based devices are applied in radiation environment.High-energy neutron,
Gamma-rays, atom and electronics etc. can generate displacement damage, mainly as caused by primary recoil atom.By displacement effect,
Substantial amounts of lattice atoms is made to obtain energy, displacement threshold energy is overcome, becomes primary recoil atom, primary recoil atom is further through mutual
Effect makes neighboring atom obtain kinetic energy, becomes secondary recoil original and gives, and so on, cascade collision is formed, ultimately forms many skies
Position-gap to defect cluster, cause electronic component performance be remarkably decreased so that the failure of circuit.Therefore, development can effectively inhale
The method for receiving the defects of displacement irradiation induces room, gap silicon is a significantly thing.
The content of the invention
The present invention is the defects of overcoming above-mentioned traditional technology, provides the vertical pulling for inhibiting displacement irradiation damage based on oxygen precipitation
Silicon substrate and preparation method thereof, the preparation method can effectively absorb displacement irradiation and induce room, gap silicon, silicon substrate material obtained
Material is clearly divided into clean area and oxygen precipitation area.
Technical scheme is as follows：
A kind of vertical pulling silicon substrate material for inhibiting displacement irradiation damage based on oxygen precipitation, it is characterised in that：The silicon substrate material
It is divided into clean area and oxygen precipitation area, is clean area close to upper surface, the lower section of clean area is oxygen precipitation area；The clean area
Oxygen precipitation density is less than 1 × 107cm-3, the oxygen precipitation density in the oxygen precipitation area is 1 × 108cm-3-1×1010cm-3Between.
Such as above-mentioned progress in Czochralski silicon substrate material, the clean area thickness is between 5-30 μm.
The application range of the vertical pulling silicon substrate material is including but not limited to for particles such as electronics, proton, heavy ions
The inhibition of displacement damage defect in irradiation.
The preparation method of the above-mentioned vertical pulling silicon substrate material for inhibiting displacement irradiation damage based on oxygen precipitation, including following step
Suddenly：
A) silicon substrate material from room temperature with R1Heating rate be heated to annealing temperature T1, and retention time S, then with R2
Rate of temperature fall be cooled to 800 DEG C, then naturally cool to room temperature with annealing furnace；
B) the two step common annealings that high temperature after first low temperature is carried out to the silicon substrate material for being cooled to room temperature are handled.
In the step a) of the above method, the rate R1Between 30-200 DEG C/sec, the temperature T1In 1150-1250
Between DEG C, the time S is between 10-100 seconds, the R2Between 10-200 DEG C/sec.
In the step b) of the above method, after elder generation's low temperature in the two step common annealings processing of high temperature, Low Temperature Heat Treatment temperature
Degree is 500-900 DEG C, when annealing time is 4-16 small；High-temperature heat treatment temperature is 900-1100 DEG C, and heat treatment time is 8-32
Hour.
The beneficial effects of the present invention are：
High density oxygen precipitation induces room and gap as displacement irradiation below the clean area of the vertical pulling silicon substrate material of the present invention
The complex centre of silicon, reduce irradiation process in generated a large amount of interstitial atoms, room the defects of, so as to which material be greatly lowered
Bulk defect density prevents the aggregation in interstitial atom, room etc. from forming elementide, cavity etc., greatly reduces the swollen of material
The irradiation damages such as swollen, hardening, decrystallized.In addition, the oxygen precipitation of the present invention can also effectively absorb the gold on silicon substrate material surface
Belong to impurity, be conducive to improve the yield rate of integrated circuit.Therefore, the present invention has important meaning to practical semiconductor manufacturing technology
Justice.
Description of the drawings
Fig. 1 is the vertical pulling silicon substrate material schematic diagram for inhibiting displacement irradiation damage based on oxygen precipitation according to the present invention.
Fig. 2 is the progress in Czochralski silicon substrate fabrication method flow chart according to the present invention.
Specific embodiment
Understand to make the object, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and reference
Attached drawing, the present invention is described in more detail, it is clear that described embodiment is only the part of the embodiment of the present invention, is not complete
The embodiment in portion.
As shown in Figure 1, the present invention provides it is a kind of based on oxygen precipitation inhibit displacement irradiation damage vertical pulling silicon substrate material,
Nearby approximate oxygen precipitate-free clean area thickness is 5-30 μm to the surface of silicon, such as A1 regions in figure, wherein oxygen precipitation density
Less than 1 × 107cm-3；Below the silicon substrate clean area, such as A2 regions in figure, oxygen precipitation density therein is 1 × 108cm-3-1
×1010cm-3Between.
As shown in Fig. 2, the present invention provides a kind of vertical pulling silicon substrate materials for inhibiting displacement irradiation damage based on oxygen precipitation
Preparation method comprise the following steps：
A) silicon substrate material is heated to 1150-1250 DEG C of annealing temperature from room temperature with 30-200 DEG C/sec of rate, and protects
Time 10-100 second is held, is then cooled to 800 DEG C with 10-200 DEG C/sec of rate of temperature fall, room temperature is naturally cooled to annealing furnace；
B) the two step common annealings that high temperature after first low temperature is carried out to the silicon substrate material for being cooled to room temperature are handled, wherein, low temperature
Heat treatment temperature is 500-900 DEG C, when annealing time is 4-16 small；High-temperature heat treatment temperature is 900-1100 DEG C, during heat treatment
Between when being 8-32 small.
Embodiment 1
Silicon substrate material upper and lower surface is cleaned with alcohol, impregnates silicon chip with diluted hydrofluoric acid solution, taking-up is dried with nitrogen.
Silicon substrate material is put into rapid thermal anneal stove, is added for 100 DEG C/sec from room temperature with rate under an argon atmosphere
Heat arrives 1200 DEG C of annealing temperature, and 20 seconds retention times.
The purpose being rapidly heated is to inspire substantial amounts of room in the silicon body and from interstitial silicon atoms pair；In soak 20
During second, make room and all reach equilibrium state from interstitial silicon atoms, since equilibrium density of the room in silicon crystal will
Higher than from interstitial silicon atoms, so the dominant point defect in silicon is room.
The silicon substrate material of soak is cooled to 800 DEG C for 80 DEG C/sec from 1200 DEG C with rate, then as annealing furnace certainly
So it is cooled to room temperature.During being quickly cooled down, the room in silicon body has little time external diffusion, is retained in silicon body.It room can be by between
Gap oxygen atom captures and generates and stablize and be not easy the VO spread relatively2Complex, VO2It is former that complex may proceed to capture interstitial oxygen concentration
Sub and formation has the VO of more high thermal stabilitymComplex.
The two step common annealings that high temperature after first low temperature is carried out to the silicon substrate material for being cooled to room temperature are handled.By silicon substrate
Material is put into conventional annealing stove, and Low Temperature Heat Treatment temperature is 650 DEG C, when annealing time is 8 small；High-temperature heat treatment temperature is
1050 DEG C, when heat treatment time is 10 small.The VO during process annealingmComplex is evolved as in the forming core of oxygen precipitation
The heart, promotes the heterogeneous forming core of oxygen precipitation, and high annealing promotes the growth of oxygen precipitation.The silicon substrate material ultimately forms relatively thin cleaning
Area, thickness are less than 30 μm；Silicon substrate main body Midst density about 1 × 107cm-3-1×1010cm-3Oxygen precipitation, as displacement irradiation lure
Raw room and the complex centre of gap silicon, for inhibiting displacement irradiation damage.
Embodiment 2
Silicon substrate material after cleaning is put into rapid thermal anneal stove, under an argon atmosphere from room temperature with 30 DEG C of rate/
Second is heated to 1150 DEG C of annealing temperature, and 100 seconds retention times.The silicon substrate material of soak with 10 DEG C/sec of rate from
1150 DEG C are cooled to 800 DEG C, and room temperature is naturally cooled to then as annealing furnace.The silicon substrate material for being cooled to room temperature is put into
In conventional annealing stove, Low Temperature Heat Treatment temperature is 500 DEG C, when annealing time is 16 small；High-temperature heat treatment temperature is 900 DEG C, heat
When processing time is 32 small.The final silicon substrate material surface forms relatively thin clean area, and thickness is less than 30 μm；In silicon substrate main body
Oxygen precipitation the complex centre of room and gap silicon is induced as displacement irradiation, for inhibiting displacement irradiation damage.
Embodiment 3
Silicon substrate material after cleaning is put into rapid thermal anneal stove, under an argon atmosphere from room temperature with 200 DEG C of rate/
Second is heated to 1250 DEG C of annealing temperature, and 10 seconds retention times.The silicon substrate material of soak with 100 DEG C/sec of rate from
1250 DEG C are cooled to 800 DEG C, and room temperature is naturally cooled to then as annealing furnace.The silicon substrate material for being cooled to room temperature is put into
In conventional annealing stove, Low Temperature Heat Treatment temperature is 900 DEG C, when annealing time is 4 small；High-temperature heat treatment temperature is 1100 DEG C, heat
When processing time is 8 small.Oxygen precipitation in the final silicon substrate main body is irradiated as displacement induces the compound of room and gap silicon
Center, for inhibiting displacement irradiation damage.
Particular embodiments described above has carried out the purpose of the present invention, technical solution and advantageous effect further in detail
Describe in detail bright, it should be understood that the above is only a specific embodiment of the present invention, is not intended to limit the invention, it is all
Within the spirit and principles in the present invention, any modification, equivalent substitution, improvement and etc. done should be included in the protection of the present invention
Within the scope of.
Claims (7)
1. inhibit the vertical pulling silicon substrate material of displacement irradiation damage based on oxygen precipitation, it is characterised in that：One kind is pressed down based on oxygen precipitation
The vertical pulling silicon substrate material of displacement irradiation damage processed, it is characterised in that：The silicon substrate material is divided into clean area and oxygen precipitation area,
It is clean area close to upper surface, the lower section of clean area is oxygen precipitation area；The oxygen precipitation density of the clean area be less than 1 ×
107cm-3, the oxygen precipitation density in the oxygen precipitation area is 1 × 108cm-3-1×1010cm-3Between.
2. the vertical pulling silicon substrate material according to claim 1 for being inhibited displacement irradiation damage based on oxygen precipitation, feature are existed
In：The clean area thickness is between 5-30 μm.
3. the vertical pulling silicon substrate material according to claim 1 for being inhibited displacement irradiation damage based on oxygen precipitation, feature are existed
In：The vertical pulling silicon substrate material is suitable for the inhibition for displacement damage defect particle irradiation.
4. prepare the side of the vertical pulling silicon substrate for inhibiting displacement irradiation damage based on oxygen precipitation described in claim 1-3 any one
Method, it is characterised in that comprise the following steps：
A) silicon substrate material from room temperature with R1Heating rate be heated to annealing temperature T1, and retention time S, then with R2
Rate of temperature fall be cooled to 800 DEG C, then naturally cool to room temperature with annealing furnace；
B) double annealing that high temperature after first low temperature is carried out to the silicon substrate material for being cooled to room temperature is handled.
5. preparation method according to claim 4, it is characterised in that：In step a), the rate R1At 30-200 DEG C/sec
Between, the temperature T1Between 1150-1250 DEG C, the time S is between 10-100 seconds, the R210-200 DEG C/sec it
Between.
6. preparation method according to claim 4, it is characterised in that：The Low Temperature Heat Treatment temperature is 500-900 DEG C, is moved back
When the fiery time is 4-16 small.
7. preparation method according to claim 4, it is characterised in that：The high-temperature heat treatment temperature is 900-1100 DEG C,
When heat treatment time is 8-32 small.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711383711.1A CN108110046A (en) | 2017-12-20 | 2017-12-20 | Inhibit vertical pulling silicon substrate of displacement irradiation damage and preparation method thereof based on oxygen precipitation |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711383711.1A CN108110046A (en) | 2017-12-20 | 2017-12-20 | Inhibit vertical pulling silicon substrate of displacement irradiation damage and preparation method thereof based on oxygen precipitation |
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| Publication Number | Publication Date |
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| CN108110046A true CN108110046A (en) | 2018-06-01 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711383711.1A Pending CN108110046A (en) | 2017-12-20 | 2017-12-20 | Inhibit vertical pulling silicon substrate of displacement irradiation damage and preparation method thereof based on oxygen precipitation |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050074970A1 (en) * | 2000-03-17 | 2005-04-07 | Flaminia Serina | Mis hydrogen sensors |
| CN101447447A (en) * | 2007-11-27 | 2009-06-03 | 上海华虹Nec电子有限公司 | Method of intrinsic gettering for trench isolation |
| CN101748491A (en) * | 2008-12-18 | 2010-06-23 | 硅电子股份公司 | Annealed wafer and method for producing annealed wafer |
| CN103094316A (en) * | 2013-01-25 | 2013-05-08 | 浙江大学 | N/n+ silicon epitaxial wafer with high metal impurity absorption capacity and preparation method thereof |
-
2017
- 2017-12-20 CN CN201711383711.1A patent/CN108110046A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050074970A1 (en) * | 2000-03-17 | 2005-04-07 | Flaminia Serina | Mis hydrogen sensors |
| CN101447447A (en) * | 2007-11-27 | 2009-06-03 | 上海华虹Nec电子有限公司 | Method of intrinsic gettering for trench isolation |
| CN101748491A (en) * | 2008-12-18 | 2010-06-23 | 硅电子股份公司 | Annealed wafer and method for producing annealed wafer |
| CN103094316A (en) * | 2013-01-25 | 2013-05-08 | 浙江大学 | N/n+ silicon epitaxial wafer with high metal impurity absorption capacity and preparation method thereof |
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Application publication date: 20180601 |