CN108108323A - Signal picker and its method for multiplexing interface - Google Patents
Signal picker and its method for multiplexing interface Download PDFInfo
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- CN108108323A CN108108323A CN201810012157.4A CN201810012157A CN108108323A CN 108108323 A CN108108323 A CN 108108323A CN 201810012157 A CN201810012157 A CN 201810012157A CN 108108323 A CN108108323 A CN 108108323A
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- 238000003909 pattern recognition Methods 0.000 claims abstract description 30
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/387—Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0026—PCI express
Abstract
The present invention relates to data acquisition technology fields, disclose a kind of signal picker and its method for multiplexing interface, to improve the flexibility of collector and scalability.Signal picker of the present invention includes：Mainboard is provided with CPU, which is connected at least one multiplex interface and each multiplex interface of identification accesses the pattern recognition unit for the type for gathering signal front-end processing module；The multiplex interface is for at least two different types of acquisition signal front-end processing module reuses；The respectively acquisition signal front-end processing module is provided with the functional unit for signal acquisition and the coding unit for the pattern recognition unit identification types；Wherein, the CPU is additionally operable to when any acquisition signal front-end processing module accesses any multiplex interface, the type of the acquisition signal front-end processing module is identified by the pattern recognition unit, the functional status of each pin in the multiplex interface is redefined according to the type identified.
Description
Technical field
The present invention relates to data acquisition technology field more particularly to a kind of signal pickers and its method for multiplexing interface.
Background technology
Signal picker is the electronic equipment for being widely used in each field.Such as：Dynamic environment available for computer room base station
Monitoring, the various signal acquisitions etc. of industrial or agricultural.
Existing signal picker is roughly divided into monoblock type and split type two class, its main feature is that the type of each interface is fixed,
Flexibility is short of, usage scenario is limited.
Existing CN201320487188 patents disclose a kind of power ＆ environment supervision system, which is to realize mould by bus
Block.Existing split type equipment is divided into host and acquisition module mostly, and host is containing functions such as uplink communication and general supplies, with adopting
Collect intermodule and pass through bus (such as RS-485 either RS232 or CAN) communication.Its advantage is：The extension quantity of sub-module is often
It can accomplish very much；But in actual installation and application, product form is not one complete whole, for some requirement one
The occasion for changing equipment does not apply to.Moreover, because acquisition module needs are communicated with host, it is necessary to design master on acquisition module
It controls chip and carries out corresponding software development, Material Cost and development cost are all bigger.
The content of the invention
Present invention aims at a kind of signal picker and its method for multiplexing interface is disclosed, to improve the flexibility of collector
And scalability.
To achieve the above object, the invention discloses a kind of signal picker, including：
Mainboard, is provided with CPU, and the CPU is connected at least one multiplex interface and each multiplex interface institute of identification
The pattern recognition unit of the type of access acquisition signal front-end processing module；The multiplex interface is different types of at least two
The acquisition signal front-end processing module reuse；
Each acquisition signal front-end processing module, is provided with for the functional unit of signal acquisition and knows for the pattern
The coding unit of other unit identification types；
Wherein, the CPU is additionally operable to access any multiplex interface in any acquisition signal front-end processing module
When, the type for gathering signal front-end processing module is identified by the pattern recognition unit, according to the type weight identified
Define the functional status of each pin in the multiplex interface.
To achieve the above object, the invention also discloses a kind of method for multiplexing interface of signal picker, including：
CPU is connected at least one multiplex interface；The multiplex interface supplies at least two different types of acquisition signals
Front end processing block is multiplexed；
The CPU identifies that each multiplex interface accesses acquisition signal front-end processing module by pattern recognition unit
Type, the acquisition signal front-end processing module are provided with for the functional unit of signal acquisition and for the pattern recognition unit
The coding unit of identification types；
The CPU is when any acquisition signal front-end processing module accesses any multiplex interface, by described
The type of the pattern recognition unit identification acquisition signal front-end processing module, the multiplexing is redefined according to the type identified
The functional status of each pin in interface.
Based on the above-mentioned signal picker and its method for multiplexing interface of the present invention, optionally, above-mentioned multiplex interface is compatible with
The interface type for each acquisition signal front-end processing module access include at least arbitrary two kinds in following types：
The compound expansion modules of 4AI/DI, 4DI expansion modules, 2DO expansion modules, 2COM expansion modules, 2DI＆1COM expand
Open up module.
Optionally, the above-mentioned pattern recognition unit of the present invention includes the pull-up resistor being connected with CPU respective pins, corresponding
, it is provided on above-mentioned coding unit and the matched pull down resistor of the pull-up resistor；Thereby, pattern recognition unit can pass through
It identifies the presence or absence of corresponding pull-up resistor or is known by identifying corresponding pull-up resistance value partial pressure ID voltages relative value be calculated
The other type for accessing acquisition signal front-end processing module.
The invention has the advantages that：
The degree of modularity of product is high, and cost is easy to control, and when use can not only keep the unification of product form, but also can move
State configures the type of all kinds of interfaces, may be such that multiplex interface signal may be performed under disparate modules, different time it is different
Function greatly improves flexibility and the scalability of collector.Further, when the quantity of multiplex interface of the present invention is extremely
When few more than two, each multiplex interface as the cloth line morphology between CPU for gathering signal front-end processing module mixed insertion, into
One step improves flexibility and the convenience of system.
Below with reference to accompanying drawings, the present invention is described in further detail.
Description of the drawings
The attached drawing for forming the part of the application is used for providing a further understanding of the present invention, schematic reality of the invention
Example and its explanation are applied for explaining the present invention, is not constituted improper limitations of the present invention.In the accompanying drawings：
Fig. 1 is the terminal panel schematic diagram of signal picker disclosed by the embodiments of the present invention；
Fig. 2 is the system block diagram of signal picker disclosed by the embodiments of the present invention；
Fig. 3 is that a kind of multiplex interface pin disclosed by the embodiments of the present invention redefines mapping graph；
Fig. 4 is that a kind of multiplex interface pin disclosed by the embodiments of the present invention redefines mapping graph.
Specific embodiment
The embodiment of the present invention is described in detail below in conjunction with attached drawing, but the present invention can be defined by the claims
Implement with the multitude of different ways of covering.
Embodiment 1
The present embodiment discloses a kind of signal picker, equipment being integrated form, as shown in Figure 1, being set at terminal panel end
Two class expansion slot are put, one kind is general extension slot, is multiplex interface (or being " multiplexing slot ")；Another kind of is proprietary extensions
Slot (or being " special purpose interface ").Expansion slot can be used and hide at no expansion module (gathering signal front-end processing module)
Cover panel covered empty slot；During using expansion module, the terminal of panel cooperation institute AM access module can both be used to cover together
Empty slot only can also be filled up completely the slot opened in equipment with the terminal of module.
As shown in Fig. 2, the signal picker of the present embodiment includes：
Mainboard is provided with CPU, which is connected at least one multiplex interface and each multiplex interface of identification is accessed and adopted
Collect the pattern recognition unit of the type of signal front-end processing module；The multiplex interface supplies at least two different types of acquisition signals
Front end processing block is multiplexed；
The respectively acquisition signal front-end processing module, is provided with for the functional unit of signal acquisition and for pattern recognition unit
The coding unit of identification types；
Wherein, CPU is additionally operable to, when any acquisition signal front-end processing module accesses any multiplex interface, by pattern know
The type of other unit identification acquisition signal front-end processing module, each pin in multiplex interface is redefined according to the type identified
Functional status, and loading with powering after the driving of the type matching identified to the power pins of multiplex interface.
As shown in Figure 3 and Figure 4, optionally, each acquisition signal front-end processing of the confession that the present embodiment multiplex interface is compatible with
Module access interface type include following five types in it is arbitrary two or more：
The compound expansion modules of 4AI/DI, 4DI expansion modules, 2DO expansion modules, 2COM expansion modules, 2DI＆1COM expand
Open up module.Wherein, AI represents analog input；AO represents analog output；DI represents digital quantity input；DO represents that digital quantity is defeated
Go out；COM (cluster communication port) i.e. serial communication interfaces.
With reference to Fig. 2 and Fig. 3, general extension interface contains 6 signals, is respectively：IO1, IO2, power supply just, power supply bear, IO3 and
IO4.The physical implementation of signal connection, can be conducting wire connection or socket connects, and specific on-link mode (OLM) is unlimited；4
A I/O signal is divided into two pairs, i.e., 1 and 2 be a pair, and 3 and 4 be a pair, is signally attached on CPU, belongs to the configurable letter of CPU
Number, optionally difference can be configured to UART (Universal Asynchronous Receiver/ among software
Transmitter, universal asynchronous receiving-transmitting transmitter) or GPIO (General Purpose Input Output, it is general defeated
Enter/export)).
The identification method of the pattern recognition unit of corresponding diagram 3 can be：Pattern recognition unit includes being connected with CPU respective pins
Pull-up resistor, be provided with and the matched pull down resistor of pull-up resistor on coding unit；Pattern recognition unit is used to pass through identification
The presence or absence of corresponding pull-up resistor accesses the type for gathering signal front-end processing module to identify.Specially：
When being not inserted into module, the logic state of 1,2,3,4 four signal on each interface is " 1111 " (on mainboard
CPU pins are pulled up using larger resistance, such as 47K Ω, therefore default conditions are high level), what power supply was turned off.Module is inserted into
Afterwards, at least can there are one signal can switch to " 0 " state (the corresponding signal foot of module can use a smaller resistance, under 2k Ω
It draws, this pull down resistor combines with the pull-up resistor on motherboard circuit to switch to low electricity by the high level given tacit consent to by this signal
It is flat), system can be into flow be judged after detecting this state, and mainboard can just be supplied to the supply pin of interface after judging flow
Electricity.
Wherein, the coding (also known as " block code ") and multiplex interface of the acquisition signal front-end processing module of corresponding diagram 3
The mapping relations of pin such as the following table 1.
Table 1：
In more detail, the system work process of corresponding above-mentioned Fig. 2, Fig. 3 and table 1 is:
(process of system electrification initialization is such as from about scheduled on when system detects acquisition signal front-end processing module type
In), 1,2,3,4 signals are all configured to DI patterns by CPU, as module insertion and type indication signal.It is being not inserted into extension
The logic state of four signals is " 1111 " during module, at least one signal can switch to " 0 " state, system after expansion module insertion
It detects to enter after this changes and judges flow.
In module judges flow, system judges insertion module according to the block code of acquisition signal front-end processing module
Type specifically can refer to above-mentioned table 1；After module judges flow, CPU can switch to 1,2,3,4 signals and module type pair
The functional mode answered；It specifically includes：
The compound expansion modules of 4AI/DI, 1,2 are defined as UART signal to (i.e. T and R, T represent to send, and R represents to receive),
3rd, 4 is undefined, is spacing wave；This expansion module measures AI signals using the converter with UART interface, and CPU passes through
UART interface obtains the data of converter, and then calculates the signal value of AI passages；Functions of modules code is 0000.
4DI expansion modules, 1,2,3,4 are defined as GPIO signals, this signal is configured to input by CPU, for receiving electricity
The digital signal that road is nursed one's health out, functions of modules code are 0001.
2DO expansion modules, 1,2 are defined as GPIO signals, this signal is configured to output by CPU, for controlling output letter
Number；Functions of modules code is 0010.
2COM expansion modules, 1,2 and 3,4 are defined as UART signal to (i.e. T and R), and the circuit in module can will
UART is converted into RS485, RS422 or RS232 bus signals；Functions of modules code is 0011.
2DI＆1COM expansion modules, 1,2 are defined as GPIO signals, this signal is configured to input by CPU, and 3,4 are defined as
UART signal is to (i.e. T and R).
Further, the confession that the present embodiment multiplex interface the is compatible with interface that respectively the acquisition signal front-end processing module accesses
Type can also include the other types such as 4AI, 6AI/DI, 2DO+1COM, 4DO, as long as can be made of GPIO or UART signal
Interface can be implemented with obtaining the circuit module of data.
Embodiment 2
The present embodiment is similar with above-described embodiment 1, the difference is that, as shown in figure 4, the multiplexing in the present embodiment connects
Mouth be provided with 7 signals be respectively IO1, IO2, power supply just, ID, power supply bear, IO3, IO4.Wherein, ID signals are a simulation electricity
Signal is pressed, CPU detects the type that this voltage signal carrys out judgment module.
The identification method of the pattern recognition unit of corresponding the present embodiment is：Pattern recognition unit includes and CPU respective pins
The pull-up resistor of connection is provided with and the matched pull down resistor of the pull-up resistor on above-mentioned coding unit；The pattern-recognition list
Member is accessed to identify at acquisition signal front end by identifying that corresponding pull-up resistance value divides ID voltages relative value be calculated
Manage the type of module.It specifically includes：
On the ADCIN signal groups of mainboard CPU, stay there are one pull-up resistor, such as 47K Ω；At acquisition signal front end
It manages above module, ID signals are connected to ground by a pull down resistor.Different modules is assigned with different ID voltage values, this electricity
Pressure value is generated by the resistance value of its pull down resistor.When being not inserted into expansion module, the ID signals on interface can be identified as 16/
16 full signal value, that is to say, that the ID signals on interface do not have pull down resistor.In table, ID voltage relative values refer to divide
The voltage value and the ratio of total voltage that network generates such as generate 1/16 relative value, need to use in the case of 47K Ω pull-up resistors
The pull down resistor of 3.13K Ω.This voltage relative value, can be there are error due to production, and when identification can set a mistake
Difference allows region, when such as designing for 1/16 voltage relative value, when identification can be relaxed to 0.8/16~1.2/16, in this section all
It is identified as 1/16 value.
Thereby, the present embodiment is additionally arranged an additional expansion module type identification in the identification method of above-described embodiment
With pin, and expansion module type identification with pin is multiplexed (i.e. with the pin subsequently redefined in above-described embodiment 1：
There are Chong Die with the functional leads that subsequently redefine for the pin of identification types)；The present embodiment mode is sacrificing pin number
On the basis of reduce the quantity of related pull-up and pull down resistor (in general, in the mode of above-described embodiment 1, multiplex interface draw
The pin of foot and CPU correspond it is direct-connected, and be respectively provided on the respectively direct-connected circuit electric connecting point with pull-up resistor
It connects one to one)；But then, using additional identification pin mode to design and develop easily, the tune of software and hardware
Try workload it is small and because identification pin and functional pin completely no conflict and cause practical work process in it is also more stable；Cause
This two kinds of identification methods cut both ways, compare under, the pin resource of CPU is more rare, so that above-described embodiment 1
The synthesis cost of identification method is more excellent.
What deserves to be explained is the present invention in, when using embodiment 1 by identifying that the presence or absence of pull-up resistor is accessed to identify
When gathering the type of signal front-end processing module, if there is weight in the pin of identification types and the functional leads subsequently redefined
Folded, then preferably, CPU is supplied after the type of acquisition signal front-end processing module has been identified to the power pins of the multiplex interface again
Electricity, avoiding module with this, functional pin generates signal immediately and is unfavorable for CPU to acquisition signal front-end processing module after the power is turned on
Type identification；If aforementioned delay is not used to power on scheme, alternatively, corresponding software processing can also be passed through
To eliminate this unfavorable factor.And when using the respective independent pattern of the present embodiment identification pin and functional pin, then no matter being multiplexed
When interface, which powers on, does not affect recognition effect.
Optionally, the expansion module type identification in the present embodiment has been accessible to the ADC or onboard of CPU with pin
The ADC of CPU is placed outside, for identifying this divider resistance.
The coding (or " ID voltages relative value ") of acquisition signal front-end processing module type for reference connects with multiplexing
Mapping relations such as the following table 2 of the pin of mouth.
Table 2
It is with above-described embodiment 1 that other, which correspond to above-mentioned Fig. 4 and the system work process of table 2, is not repeated.
In addition, the special purpose interface in the present embodiment and above-described embodiment 1 is not generally applicable, it is only capable of and mating proprietary extensions mould
Block carries out data interaction.Such as AI proprietary extensions modules, module can be designed to AI signal conditioning circuits, the signal after conditioning is direct
The converter of mainboard is accessed, the signal of special purpose interface can be as the analog signal required by onboard ADC；It can also be designed to
Autonomous system with microcontroller voluntarily handles AI channel signals by the microcontroller in module, then by onboard bus by data
CPU is sent to, the signal of such expansion interface is just defined as the signal of bus；It is also designed to carry an AD turns in module
Parallel operation is gone by CPU by the digital interface of converter to read the data of AI signals, and the signal on such case lower interface is just fixed
Justice is into the digital interface signal of converter.For another example COM proprietary extensions module can be designed to that UART turns other lattice such as RS485
The circuit form of formula signal, in such cases, the signal on expansion interface are exactly UART signal；Or it is designed to that SPI changes into it
The circuit form of his rs 232 serial interface signal, the signal on expansion interface should just be defined as spi bus.It designs in any case, it is special to connect
Signal definition on mouth is fixed, dedicated, and module must be designed to the circuit using such signal format, otherwise just not
The use of this expansion interface can be inserted into.
Embodiment 3
With reference to the content of above-mentioned two embodiment, the present embodiment discloses a kind of interface duplex side of corresponding signal picker
Method, including：
Step S1, CPU is connected at least one multiplex interface.The multiplex interface supplies at least two different types of acquisitions
Signal front-end processing module reuse.
Step S2, the CPU identifies that respectively the multiplex interface accesses acquisition signal front-end processing mould by pattern recognition unit
The type of block, the acquisition signal front-end processing module are provided with for the functional unit of signal acquisition and for the pattern recognition unit
The coding unit of identification types.
Step S3, the CPU passes through the mould when any acquisition signal front-end processing module accesses any multiplex interface
Formula recognition unit identifies the type of the acquisition signal front-end processing module, is redefined according to the type identified in the multiplex interface
The functional status of each pin.
Optionally, respectively the acquisition signal front-end processing module connects for the confession that at least one multiplex interface of the present embodiment is compatible with
The interface type entered include following five types in it is arbitrary two or more：
The compound expansion modules of 4AI/DI, 4DI expansion modules, 2DO expansion modules, 2COM expansion modules, 2DI＆1COM expand
Open up module.
Similarly, with reference to above-mentioned two embodiment, pattern recognition unit can be by identifying the presence or absence of corresponding pull-up resistor or passing through
The corresponding pull-up resistance value of identification divides ID voltages relative value be calculated and accesses acquisition signal front-end processing module to identify
Type.
Further, special purpose interface is additionally provided on mainboard to access for proprietary extensions module, the proprietary extensions module is through plate
It carries bus and sends data to the CPU；And analog-to-digital conversion module is set on the mainboard with to signal collected carry out modulus
Conversion；Or in the acquisition signal front-end processing module and proprietary extensions module set analog-to-digital conversion module with to acquisition letter
Number carry out analog-to-digital conversion.It is what deserves to be explained is special for the signal acquisition of some special data interface types, especially part
Expansion module can omit analog-to-digital conversion module described in this paragraph.
To sum up, signal picker and its method for multiplexing interface disclosed by the embodiments of the present invention, tool have the advantage that：
The degree of modularity of product is high, and cost is easy to control, and when use can not only keep the unification of product form, but also can move
State configures the type of all kinds of interfaces, may be such that multiplex interface signal may be performed under disparate modules, different time it is different
Function greatly improves flexibility and the scalability of collector.Further, when the quantity of multiplex interface of the present invention is extremely
When few more than two, each multiplex interface as the cloth line morphology between CPU for gathering signal front-end processing module mixed insertion, into
One step improves flexibility and the convenience of system.Wherein, so-called cloth line morphology is the same, it usually needs meets：First, position is different
Each multiplex interface, the physical location deployment of internal each signal pins is the same, spacing between pin and pin etc.；2nd,
Different multiplex interfaces between the corresponding one group of pin in position, signal logic that is reconfigurable or redefining is consistent.
The foregoing is only a preferred embodiment of the present invention, is not intended to limit the invention, for the skill of this field
For art personnel, the invention may be variously modified and varied.Within the spirit and principles of the invention, that is made any repaiies
Change, equivalent substitution, improvement etc., should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of signal picker, which is characterized in that including：
Mainboard is provided with CPU, and the CPU is connected at least one multiplex interface and each multiplex interface of identification is accessed
Gather the pattern recognition unit of the type of signal front-end processing module；The multiplex interface is different types of described at least two
Gather signal front-end processing module reuse；
Each acquisition signal front-end processing module, is provided with for the functional unit of signal acquisition and for the pattern-recognition list
The coding unit of first identification types；
Wherein, the CPU is additionally operable to, when any acquisition signal front-end processing module accesses any multiplex interface, lead to
The type of the pattern recognition unit identification acquisition signal front-end processing module is crossed, institute is redefined according to the type identified
State the functional status of each pin in multiplex interface.
2. signal picker according to claim 1, which is characterized in that the confession that at least one multiplex interface is compatible with
The interface type of each acquisition signal front-end processing module access includes at least arbitrary two kinds in following types：
The compound expansion modules of 4AI/DI, 4DI expansion modules, 2DO expansion modules, 2COM expansion modules, 2DI＆1COM expanded modes
Block.
3. signal picker according to claim 1 or 2, which is characterized in that the pattern recognition unit include with it is described
The pull-up resistor of CPU respective pins connection, is provided with and the matched pull down resistor of the pull-up resistor on the coding unit；
The pattern recognition unit is used for by identifying the presence or absence of corresponding pull-up resistor or by identifying that corresponding pull-up resistance value divides
The ID voltages relative value being calculated accesses the type of acquisition signal front-end processing module to identify.
4. signal picker according to claim 3, which is characterized in that when the quantity of the multiplex interface is at least two
More than when, each multiplex interface as the cloth line morphology between the CPU for it is each it is described acquisition signal front-end processing module mix
It inserts.
5. signal picker according to claim 4, which is characterized in that identified when by identifying the presence or absence of pull-up resistor
When accessing the type of acquisition signal front-end processing module, if the pin of identification types and the functional leads subsequently redefined
There are overlapping, then the CPU draws after the type of acquisition signal front-end processing module has been identified to the power supply of the multiplex interface again
Foot is powered.
6. a kind of method for multiplexing interface of signal picker, which is characterized in that including：
CPU is connected at least one multiplex interface；The multiplex interface is at least two different types of acquisition signal front ends
Processing module is multiplexed；
The CPU identifies that each multiplex interface accesses the class of acquisition signal front-end processing module by pattern recognition unit
Type, the acquisition signal front-end processing module are provided with for the functional unit of signal acquisition and know for the pattern recognition unit
The coding unit of other type；
The CPU passes through the pattern when any acquisition signal front-end processing module accesses any multiplex interface
The type of the recognition unit identification acquisition signal front-end processing module, the multiplex interface is redefined according to the type identified
The functional status of interior each pin.
7. the method for multiplexing interface of signal picker according to claim 6, which is characterized in that at least one multiplexing
The interface type for each acquisition signal front-end processing module access that interface is compatible with includes at least appointing in following types
Two kinds of meaning：
The compound expansion modules of 4AI/DI, 4DI expansion modules, 2DO expansion modules, 2COM expansion modules, 2DI＆1COM expanded modes
Block.
8. the method for multiplexing interface of the signal picker according to claim 6 or 7, which is characterized in that the pattern-recognition
Unit includes the pull-up resistor being connected with the CPU respective pins, is provided with and the pull-up resistor on the coding unit
The pull down resistor matched somebody with somebody；The method further includes：
The pattern recognition unit is by identifying the presence or absence of corresponding pull-up resistor or by identifying that corresponding pull-up resistance value partial pressure is counted
The ID voltages relative value drawn accesses the type of acquisition signal front-end processing module to identify.
9. the method for multiplexing interface of signal picker according to claim 8, which is characterized in that when the multiplex interface
When quantity is at least two, each multiplex interface is as the cloth line morphology between the CPU for each acquisition signal
Front end processing block mixed insertion.
10. the method for multiplexing interface of signal picker according to claim 9, which is characterized in that pulled up when by identifying
When the presence or absence of resistance accesses the type for gathering signal front-end processing module to identify, if the pin of identification types and follow-up weight
There is overlapping in the functional leads of definition, then CPU after the type for gathering signal front-end processing module identify again to the multiplexing
The power pins power supply of interface.
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| CN109086235A (en) * | 2018-08-10 | 2018-12-25 | 深圳市吉影科技有限公司 | A kind of underwater common apparatus detection identification and control method and system |
| CN109356739A (en) * | 2018-12-10 | 2019-02-19 | 重庆红江机械有限责任公司 | Engine intelligent Modular electrical sub-controller |
| CN109450518A (en) * | 2018-09-11 | 2019-03-08 | 陕西千山航空电子有限责任公司 | A kind of general acquisition and interpretation method of flight parameter |
| CN110426082A (en) * | 2019-08-30 | 2019-11-08 | 福州福沃垦电子科技有限公司 | A kind of assemblnig acquisition module and battery acquisition module |
| CN110442119A (en) * | 2019-09-20 | 2019-11-12 | 潍柴动力股份有限公司 | ECU stitch repeats configuration detection method and equipment |
| CN113687625A (en) * | 2021-10-26 | 2021-11-23 | 菲尼克斯(南京)智能制造技术工程有限公司 | Configurable circuit module of analog channel type |
| CN113986786A (en) * | 2021-09-26 | 2022-01-28 | 夏文祥 | Method for realizing mixed insertion of multiple types of communication board cards in gateway of Internet of things |
| CN114739543A (en) * | 2022-04-21 | 2022-07-12 | 深圳国微感知技术有限公司 | Adaptive identification system for pressure distribution measurement |
| CN113986786B (en) * | 2021-09-26 | 2024-04-26 | 中国人民解放军国防大学军事管理学院 | Method for realizing mixed insertion of multiple types of communication boards in gateway of Internet of things |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109086235A (en) * | 2018-08-10 | 2018-12-25 | 深圳市吉影科技有限公司 | A kind of underwater common apparatus detection identification and control method and system |
| CN109450518A (en) * | 2018-09-11 | 2019-03-08 | 陕西千山航空电子有限责任公司 | A kind of general acquisition and interpretation method of flight parameter |
| CN109356739A (en) * | 2018-12-10 | 2019-02-19 | 重庆红江机械有限责任公司 | Engine intelligent Modular electrical sub-controller |
| CN110426082A (en) * | 2019-08-30 | 2019-11-08 | 福州福沃垦电子科技有限公司 | A kind of assemblnig acquisition module and battery acquisition module |
| CN110442119A (en) * | 2019-09-20 | 2019-11-12 | 潍柴动力股份有限公司 | ECU stitch repeats configuration detection method and equipment |
| CN113986786A (en) * | 2021-09-26 | 2022-01-28 | 夏文祥 | Method for realizing mixed insertion of multiple types of communication board cards in gateway of Internet of things |
| CN113986786B (en) * | 2021-09-26 | 2024-04-26 | 中国人民解放军国防大学军事管理学院 | Method for realizing mixed insertion of multiple types of communication boards in gateway of Internet of things |
| CN113687625A (en) * | 2021-10-26 | 2021-11-23 | 菲尼克斯(南京)智能制造技术工程有限公司 | Configurable circuit module of analog channel type |
| CN114739543A (en) * | 2022-04-21 | 2022-07-12 | 深圳国微感知技术有限公司 | Adaptive identification system for pressure distribution measurement |
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