CN108063101A - A kind of methods of sampling of wafer defect test - Google Patents
A kind of methods of sampling of wafer defect test Download PDFInfo
- Publication number
- CN108063101A CN108063101A CN201711350738.0A CN201711350738A CN108063101A CN 108063101 A CN108063101 A CN 108063101A CN 201711350738 A CN201711350738 A CN 201711350738A CN 108063101 A CN108063101 A CN 108063101A
- Authority
- CN
- China
- Prior art keywords
- wafer batch
- tester table
- board group
- relevant
- wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
Abstract
The present invention relates to the methods of sampling that technical field of semiconductors more particularly to a kind of wafer defect are tested, wherein, including：Step S1 obtains one or more wafer batch applications and enters the application that first board group is tested；Step S2 is searched so that the wafer batch of the indicia matched found in list is marked enters step S3 according to the mark of each wafer batch in the mark list of current board group；Step S3 is obtained with marking the actual loading situation of relevant each tester table in current board group, and is judged whether relevant tester table can accommodate matched wafer batch according to actual loading situation and load threshold；Step S4 is sent by the application for the wafer batch that can be accommodated, and by the corresponding wafer batch of mark not found in list is marked and the wafer batch that cannot be accommodated to next board group；It can be considered that the load capacity of tester table so that the load balancing of tester table, testing efficiency is high, and board utilization rate is high.
Description
Technical field
The present invention relates to the methods of samplings that technical field of semiconductors more particularly to a kind of wafer defect are tested.
Background technology
The process included with the relevant manufacturing process of product wafer is more, and the slight errors of any link are likely to cause
Product failure, therefore test just becomes particularly critical the defects of to wafer.
But in existing testing process, the species of wafer is different, it is therefore desirable to which corresponding wafer is sent into energy
The board of defect test is enough carried out, since the limited amount of tester table is, it is necessary to by being sampled in wafer wafer
It is balanced on detection efficiency.
But existing sampling major part is carried out using fixed rule, without considering the load capacity of board, test
The workload of board is unbalanced, and testing efficiency is low.
The content of the invention
In view of the above-mentioned problems, the present invention proposes a kind of methods of sampling of wafer defect test, wherein, including default step
Suddenly：The mark of the test request of the wafer batch is reacted in setting in each wafer batch, and provides multiple tester tables and make
For each board group, record reacts the mark list for the test request that each board group meets and is each survey
Commissioning stage sets a load threshold；It further includes：
Step S1 obtains one or more wafer batch applications and enters the application that the first board group is tested；
Step S2, according to the mark of each wafer batch in the mark list of presently described board group
It is searched so that the wafer batch of the indicia matched found in the mark list enters step S3；
Step S3 obtains the actual loading with the relevant each tester table of the mark in presently described board group
Situation, and judge whether the relevant tester table can accommodate according to the actual loading situation and the load threshold
The wafer batch matched somebody with somebody；
Step S4 by the application for the wafer batch that can be accommodated, and will not found in the mark list
The corresponding wafer batch of the mark and the wafer batch that cannot accommodate send to next board group.
The above-mentioned methods of sampling, wherein, in the step S3, the actual loading situation is specially relevant each described
The actual loading value of tester table.
The above-mentioned methods of sampling, wherein, in the step S3, the specific method for judging whether to accommodate is：
The matched wafer batch simulation is distributed into the relevant tester table using a preset rules, and root
Judge that the relevant tester table whether can according to the situation of the actual loading value and the load threshold after simulation distributes
Enough accommodate the matched wafer batch.
The above-mentioned methods of sampling, wherein, the preset rules are mean allocation；
The minimal difference of the actual loading value according to the relevant tester table and the load threshold is scale
Judge whether the relevant tester table can accommodate the matched wafer batch.
The above-mentioned methods of sampling, wherein, the preset rules are allocated using the following formula：
The pre-set ratio value of board apportioning cost=matched wafer batch size * boards；
Wherein, when the board apportioning cost of each tester table is not less than the load threshold, correlation is judged
The tester table can accommodate the matched wafer batch.
The above-mentioned methods of sampling, wherein, the load threshold phase of each tester table in the same board group
Together.
The above-mentioned methods of sampling, wherein, the mark list for the test request that each board group of reaction meets is deposited
Be stored in in the server that each tester table is connected in the board group.
Advantageous effect：A kind of methods of sampling of wafer defect test proposed by the present invention is it can be considered that the load of tester table
Ability so that the load balancing of tester table, testing efficiency is high, and board utilization rate is high.
Description of the drawings
Fig. 1 is the step flow chart of the methods of sampling that wafer defect is tested in one embodiment of the invention.
Specific embodiment
The present invention is further described with reference to the accompanying drawings and examples.
In a preferred embodiment, as shown in Figure 1, it is proposed that a kind of methods of sampling of wafer defect test, wherein,
It can include default step：The mark of the test request of setting reaction wafer batch in each wafer batch, and provide multiple
As each board group, record reacts the mark list for the test request that each board group meets and is each tester table
Tester table sets a load threshold；It can also include：
Step S1 obtains one or more wafer batch applications and enters the application that first board group is tested；
Step S2 is searched according to the mark of each wafer batch in the mark list of current board group so that
The wafer batch of the indicia matched found in mark list enters step S3；
Step S3, obtain in current board group with the actual loading situation for marking relevant each tester table, and according to
Actual loading situation and load threshold judge whether relevant tester table can accommodate matched wafer batch；
Step S4, by the application for the wafer batch that can be accommodated, and the mark pair that will do not found in list is marked
The wafer batch answered and the wafer batch that cannot be accommodated are sent to next board group.
In above-mentioned technical proposal, load threshold should be the maximum quantity for the wafer batch that corresponding board can undertake；Do not exist
The corresponding wafer batch of mark and/or the quantity for the wafer batch that cannot be accommodated found in mark list can be 0.
In a preferred embodiment, in step S3, actual loading situation is specially relevant each tester table
Actual loading value.
In above-mentioned technical proposal, actual loading value should be the quantity of the wafer batch of actual loading in corresponding board.
In above-described embodiment, it is preferable that in step S3, the specific method for judging whether to accommodate is：
The simulation of matched wafer batch is distributed into relevant tester table using a preset rules, and according to actual negative
The situation of load value and load threshold after simulation distributes judges whether relevant tester table can accommodate matched wafer batch.
In above-described embodiment, it is preferable that preset rules are mean allocation；
Relevant survey is judged for scale according to the minimal difference of actual loading value and load threshold in relevant tester table
Whether commissioning stage can accommodate matched wafer batch.
In above-mentioned technical proposal, since preset rules are mean allocation, whether the board of residual capacity minimum is enough at this time
Determine that can the application that current wafer batch enters be received.
In above-described embodiment, it is preferable that preset rules are allocated using the following formula：
The pre-set ratio value of board apportioning cost=matched wafer batch size * boards；
Wherein, when the board apportioning cost of each tester table is not less than load threshold, relevant tester table energy is judged
Enough accommodate matched wafer batch.
In a preferred embodiment, the load threshold of each tester table is identical in same board group, but this is
A kind of preferred situation can also voluntarily be set according to actual conditions.
In a preferred embodiment, the mark list for reacting the test request that each board group meets is stored in and machine
In platform group in a server of each tester table connection.
By explanation and attached drawing, the exemplary embodiments of the specific structure of specific embodiment are given, it is smart based on the present invention
God can also make other conversions.Although foregoing invention proposes existing preferred embodiment, however, these contents are not intended as
Limitation.
For a person skilled in the art, after reading above description, various changes and modifications undoubtedly will be evident.
Therefore, appended claims should regard whole variations and modifications of the true intention and scope that cover the present invention as.It is weighing
The scope and content of any and all equivalence, are all considered as still belonging to the intent and scope of the invention in the range of sharp claim.
Claims (7)
1. a kind of methods of sampling of wafer defect test, which is characterized in that including presetting step：It is set in each wafer batch
The mark of the test request of the wafer batch is reacted, and provides multiple tester tables as each board group, record reaction is every
The mark list for the test request that a board group meets and one load threshold is set for each tester table；Also
Including：
Step S1 obtains one or more wafer batch applications and enters the application that the first board group is tested；
Step S2 is carried out according to the mark of each wafer batch in the mark list of presently described board group
It searches so that the wafer batch of the indicia matched found in the mark list enters step S3；
Step S3 obtains the actual loading feelings with the relevant each tester table of the mark in presently described board group
Condition, and judge whether the relevant tester table can accommodate matching according to the actual loading situation and the load threshold
The wafer batch；
Step S4, by the application for the wafer batch that can be accommodated, and the institute that will do not found in the mark list
It states and the corresponding wafer batch and the wafer batch that cannot be accommodated is marked to send to next board group.
2. the methods of sampling according to claim 1, which is characterized in that in the step S3, the actual loading situation tool
Body is the actual loading value of relevant each tester table.
3. the methods of sampling according to claim 2, which is characterized in that in the step S3, judge whether what can be accommodated
Specific method is：
The matched wafer batch simulation is distributed into the relevant tester table using a preset rules, and according to institute
It states the situation of actual loading value and the load threshold after simulation distributes and judges whether the relevant tester table can hold
Receive the matched wafer batch.
4. the methods of sampling according to claim 3, which is characterized in that the preset rules are mean allocation；
The minimal difference of the actual loading value according to the relevant tester table and the load threshold judges for scale
Whether the relevant tester table can accommodate the matched wafer batch.
5. the methods of sampling according to claim 3, which is characterized in that the preset rules are divided using the following formula
Match somebody with somebody：
The pre-set ratio value of board apportioning cost=matched wafer batch size * boards；
Wherein, when the board apportioning cost of each tester table is not less than the load threshold, relevant institute is judged
The matched wafer batch can be accommodated by stating tester table.
6. the methods of sampling according to claim 1, which is characterized in that each tester table in the same board group
The load threshold it is identical.
7. the methods of sampling according to claim 1, which is characterized in that the test request that each board group of reaction meets
The mark list be stored in in the server that each tester table is connected in the board group.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711350738.0A CN108063101B (en) | 2017-12-15 | 2017-12-15 | Sampling method for wafer defect test |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711350738.0A CN108063101B (en) | 2017-12-15 | 2017-12-15 | Sampling method for wafer defect test |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108063101A true CN108063101A (en) | 2018-05-22 |
| CN108063101B CN108063101B (en) | 2021-01-12 |
Family
ID=62139027
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711350738.0A Active CN108063101B (en) | 2017-12-15 | 2017-12-15 | Sampling method for wafer defect test |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108063101B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108899288A (en) * | 2018-07-20 | 2018-11-27 | 上海华虹宏力半导体制造有限公司 | The determination method of monitoring method and laser incising board the alignment position of wafer mark |
| CN112103221A (en) * | 2020-11-10 | 2020-12-18 | 杭州长川科技股份有限公司 | Wafer testing method, wafer testing machine, electronic device and storage medium |
| CN112255531A (en) * | 2020-12-23 | 2021-01-22 | 上海伟测半导体科技股份有限公司 | Test machine matching system and matching method thereof |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070020782A1 (en) * | 2005-07-18 | 2007-01-25 | Dieter Rathei | Method of monitoring a semiconductor manufacturing trend |
| CN104977903A (en) * | 2014-04-03 | 2015-10-14 | 中芯国际集成电路制造(上海)有限公司 | Real time dispatch system-based method and system for wafer batch dispatch under machine set |
| CN105446281A (en) * | 2014-09-01 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | Goods delivery method and system for process chambers |
| CN105843180A (en) * | 2015-01-15 | 2016-08-10 | 中芯国际集成电路制造(上海)有限公司 | Dispatching system and dispatching method based on semiconductor processing equipment production recipe |
| CN106128970A (en) * | 2016-06-30 | 2016-11-16 | 上海华力微电子有限公司 | A kind of intelligent sampling approach measuring operation and system |
-
2017
- 2017-12-15 CN CN201711350738.0A patent/CN108063101B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070020782A1 (en) * | 2005-07-18 | 2007-01-25 | Dieter Rathei | Method of monitoring a semiconductor manufacturing trend |
| CN104977903A (en) * | 2014-04-03 | 2015-10-14 | 中芯国际集成电路制造(上海)有限公司 | Real time dispatch system-based method and system for wafer batch dispatch under machine set |
| CN105446281A (en) * | 2014-09-01 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | Goods delivery method and system for process chambers |
| CN105843180A (en) * | 2015-01-15 | 2016-08-10 | 中芯国际集成电路制造(上海)有限公司 | Dispatching system and dispatching method based on semiconductor processing equipment production recipe |
| CN106128970A (en) * | 2016-06-30 | 2016-11-16 | 上海华力微电子有限公司 | A kind of intelligent sampling approach measuring operation and system |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108899288A (en) * | 2018-07-20 | 2018-11-27 | 上海华虹宏力半导体制造有限公司 | The determination method of monitoring method and laser incising board the alignment position of wafer mark |
| CN108899288B (en) * | 2018-07-20 | 2020-11-13 | 上海华虹宏力半导体制造有限公司 | Wafer mark monitoring method and method for judging alignment position of laser marking machine |
| CN112103221A (en) * | 2020-11-10 | 2020-12-18 | 杭州长川科技股份有限公司 | Wafer testing method, wafer testing machine, electronic device and storage medium |
| CN112255531A (en) * | 2020-12-23 | 2021-01-22 | 上海伟测半导体科技股份有限公司 | Test machine matching system and matching method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108063101B (en) | 2021-01-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108063101A (en) | A kind of methods of sampling of wafer defect test | |
| CN105446281B (en) | Processing chamber sends pallet piling up method and system | |
| CN101261285A (en) | Method and system for automatically managing probe mark shifts | |
| CN107703318A (en) | The method of testing and device of sample, computer-readable recording medium | |
| US7557598B2 (en) | Method of inspecting quiescent power supply current in semiconductor integrated circuit and device for executing the method | |
| CN105699730A (en) | Electronic voltage transformer | |
| CN108037433A (en) | The screening technique and device of a kind of integrated circuit test data | |
| CN103954877B (en) | IC testing method and test device | |
| CN212160007U (en) | Automatic chip testing device | |
| CN106033210A (en) | Wafer testing data processing method and wafer testing data processing device | |
| CN105866574A (en) | Auxiliary identifying method and auxiliary identifying system for automated testing | |
| CN107451408B (en) | Coal-fired heating value data checking method | |
| CN110782941B (en) | Method, device and equipment for testing storage equipment and automatically distributing BIN | |
| CN108054113A (en) | A kind of sampling Detection method | |
| CN109597013A (en) | The method and readable storage medium storing program for executing that battery test apparatus current precision determines | |
| CN206002570U (en) | A kind of precision measurement probe | |
| CN109211159B (en) | Metering device verification task scheduling method and device | |
| CN117310454B (en) | Chip testing method and related device | |
| WO2022028101A1 (en) | Semiconductor manufacturing process detection system and semiconductor manufacturing process detection method | |
| CN109107908A (en) | System for sheet material sorting | |
| CN117313856B (en) | Reliability test planning system and method | |
| CN112804709B (en) | Method and device for determining overlapping coverage condition between serving cells | |
| CN106941552A (en) | A kind of mobile terminal shutdown performance estimating method | |
| CN110969373B (en) | To-be-inspected material pushing method and system, storage medium and device | |
| CN113108889A (en) | Scale body performance evaluation method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |