CN108055212B - Method and device compatible with PSE chip - Google Patents

Method and device compatible with PSE chip Download PDF

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Publication number
CN108055212B
CN108055212B CN201711270212.1A CN201711270212A CN108055212B CN 108055212 B CN108055212 B CN 108055212B CN 201711270212 A CN201711270212 A CN 201711270212A CN 108055212 B CN108055212 B CN 108055212B
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channel
pse chip
iic
pse
uart
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CN108055212A (en
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黄鹄泉
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Ruijie Networks Co Ltd
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Ruijie Networks Co Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/10—Packet switching elements characterised by the switching fabric construction
    • H04L49/109—Integrated on microchip, e.g. switch-on-chip
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/02—Details
    • H04L12/10—Current supply arrangements

Abstract

The invention provides a method and a device for being compatible with PSE chips, which are used for solving the problem that a switch cannot be used after the PSE chips using IIC interfaces or UART interfaces stop production in the prior art and realizing the compatibility of the same POE switch mainboard on different types of PSE chips. The method is applied to a POE switch mainboard, an interface arranged on the POE switch mainboard is connected with a PSE chip, and the method comprises the following steps: a Central Processing Unit (CPU) scans a PSE chip through channels corresponding to interfaces arranged on a POE switch mainboard in sequence; the channels corresponding to the interfaces arranged on the POE switch mainboard comprise an IIC channel and a UART channel; if the PSE chip is scanned through any channel in the channels corresponding to the interface arranged on the POE switch main board, determining a driving function corresponding to the PSE chip according to any channel; and the CPU calls a driving function and sends a control instruction to the PSE chip through any channel to complete the control of the PSE chip.

Description

Method and device compatible with PSE chip
Technical Field
The invention relates to the technical field of communication, in particular to a method and a device compatible with a PSE chip.
Background
POE (Power Over Ethernet ) refers to a technology that can provide dc Power for some terminals based on IP (Internet Protocol) while transmitting data signals for such devices, without changing the existing Ethernet wiring infrastructure. The difference between the POE switch and the ordinary switch is that a Power Sourcing Equipment (PSE) chip is built in the POE switch and used for controlling a Power supply function. And a CPU (Central Processing Unit) of the POE switch may obtain the state of the PSE chip through a fixed interface.
However, in the prior art, a PSE chip can only communicate with a CPU through one interface, and the most commonly used interface is an IIC (Inter-Integrated Circuit) interface and a UART (Universal Asynchronous Receiver/Transmitter) interface. When designing a POE switch motherboard, only one interface, i.e., an IIC interface or a UART interface, is usually reserved on the POE switch motherboard. However, in practical applications, if a PSE chip using an IIC interface or a UART interface is down and a switch using the PSE chip is not yet down, the switch cannot be used because there is no PSE chip that can be replaced.
Disclosure of Invention
The embodiment of the invention provides a method and a device for being compatible with PSE chips, which are used for solving the problem that a switch cannot be used after the PSE chips using IIC interfaces or UART interfaces stop production in the prior art and realizing the compatibility of the same POE switch mainboard on different types of PSE chips.
In a first aspect, the present invention provides a method for being compatible with a PSE chip, which is applied to a POE switch motherboard, where an interface provided on the POE switch motherboard is connected with the PSE chip, and the method includes:
a Central Processing Unit (CPU) scans a PSE chip through channels corresponding to interfaces arranged on a POE switch mainboard in sequence; the channels corresponding to the interfaces arranged on the POE switch mainboard comprise an IIC channel and a UART channel;
if the PSE chip is scanned through any channel in channels corresponding to an interface arranged on the POE switch main board, determining a driving function corresponding to the PSE chip according to the any channel;
and the CPU calls the driving function and sends a control instruction to the PSE chip through any channel to complete the control of the PSE chip.
Optionally, before the CPU sequentially scans the PSE chip through the channels corresponding to the interfaces set on the main board of the POE switch, the method further includes:
setting the priority of a channel corresponding to an interface arranged on the POE switch main board; wherein the priority is used for selecting to scan the PSE chip through the IIC channel or the UART channel first.
Optionally, when the priority of the IIC channel is higher than the priority of the UART channel, the CPU sequentially scans the PSE chip through the channel corresponding to the interface set on the POE switch motherboard, including:
scanning the PSE chip through the IIC channel, and if the PSE chip is scanned, determining a driving function corresponding to the PSE chip according to the IIC channel;
scanning the PSE chip through the UART channel if the PSE chip cannot be scanned through an IIC channel;
and if the PSE chip is scanned through the UART channel, determining a driving function corresponding to the PSE chip according to the UART channel.
Optionally, when the priority of the UART channel is higher than the priority of the IIC channel, the CPU sequentially scans the PSE chip through the channel corresponding to the interface set on the POE switch motherboard, including:
scanning the PSE chip through the UART channel, and if the PSE chip is scanned, determining a driving function corresponding to the PSE chip according to the UART channel;
scanning the PSE chip through the IIC channel if the PSE chip cannot be scanned through a UART channel;
and if the PSE chip is scanned through the IIC channel, determining a driving function corresponding to the PSE chip according to the IIC channel.
In a second aspect, the present invention further provides a device compatible with a PSE chip, including a POE switch motherboard, where an interface provided on the POE switch motherboard is connected to the PSE chip, and the device further includes:
the scanning module is used for scanning the PSE chip sequentially through channels corresponding to interfaces arranged on the POE switch mainboard; the channels corresponding to the interfaces arranged on the POE switch mainboard comprise an IIC channel and a UART channel;
the processing module is used for determining a driving function corresponding to the PSE chip according to any channel if the PSE chip is scanned through any channel in the channels corresponding to the interfaces arranged on the POE switch mainboard; and calling the driving function and sending a control instruction to the PSE chip through any channel to complete the control of the PSE chip.
Optionally, the apparatus further includes a priority setting module;
the priority setting module is used for setting the priority of a channel corresponding to an interface set on the POE switch mainboard; wherein the priority is used for selecting to scan the PSE chip through the IIC channel or the UART channel first.
Optionally, when the priority of the IIC channel is higher than the priority of the UART channel, the scanning module is specifically configured to scan the PSE chip through the IIC channel, and if the PSE chip is scanned, determine a driving function corresponding to the PSE chip according to the IIC channel; scanning the PSE chip through the UART channel if the PSE chip cannot be scanned through an IIC channel; and if the PSE chip is scanned through the UART channel, determining a driving function corresponding to the PSE chip according to the UART channel.
Optionally, when the priority of the UART channel is higher than the priority of the IIC channel, the scanning module is specifically configured to scan the PSE chip through the UART channel, and if the PSE chip is scanned, determine a driving function corresponding to the PSE chip according to the UART channel; scanning the PSE chip through the IIC channel if the PSE chip cannot be scanned through a UART channel; and if the PSE chip is scanned through the IIC channel, determining a driving function corresponding to the PSE chip according to the IIC channel.
In a third aspect, the present invention further provides a device compatible with a PSE chip, including:
the POE switch comprises a POE switch main board, wherein a CPU, an IIC channel, a UART channel and interfaces for connecting the IIC channel and the UART channel with other equipment are arranged on the POE switch main board; the CPU is configured to: scanning the PSE chip sequentially through the channels corresponding to the interfaces connected with other equipment; if any channel in the channels corresponding to the interfaces connected with other equipment is scanned to the PSE chip, determining a driving function corresponding to the PSE chip according to the any channel; calling the driving function and sending a control instruction to the PSE chip through any one channel to complete control over the PSE chip;
the PSE board is provided with the PSE chip on this PSE board, the PSE board passes through interface on the POE switch mainboard with POE switch mainboard swing joint.
Optionally, the two interfaces are respectively corresponding to the IIC channel and the UART channel, so that the IIC channel and the UART channel are connected to other devices.
In the embodiment of the invention, the IIC channel and the UART channel are simultaneously arranged on the main board of the POE switch, the PSE chip is scanned through the IIC channel or the UART channel, if the PSE chip is scanned through any one of the IIC channel or the UART channel, a driving function corresponding to the PSE chip is determined, and then the driving function is called to complete the control of the PSE chip. The invention can realize that different PSE chips are compatible on the main board of the POE switch, and solves the problem that the POE switch using the PSE chip stops production after the PSE chip of a certain interface stops production.
Drawings
Fig. 1 is a schematic flowchart of a method for compatible with a PSE chip according to an embodiment of the present invention;
FIG. 2 is a schematic flow chart of a method for compatible with a PSE chip according to a first embodiment of the present invention;
FIG. 3 is a schematic flowchart of a method for compatible with a PSE chip according to a first embodiment of the present invention, wherein the priority of the IIC channel is higher than that of the UART channel;
FIG. 4 is a flowchart illustrating a process of determining a driving function according to an embodiment of the present invention;
fig. 5 is a block diagram of a compatible PSE chip device according to a second embodiment of the present invention;
fig. 6 is a block diagram of a compatible PSE chip device according to a third embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example one
As shown in fig. 1, an embodiment of the present invention provides a method for compatible with a PSE chip, where the method includes:
s101, a Central Processing Unit (CPU) scans a PSE chip through channels corresponding to interfaces arranged on a POE switch mainboard in sequence; the channels corresponding to the interfaces arranged on the POE switch mainboard comprise an IIC channel and a UART channel;
s102, if the PSE chip is scanned through any one of the channels corresponding to the interfaces arranged on the main board of the POE switch, determining a driving function corresponding to the PSE chip according to any one of the channels;
s103, the CPU calls a driving function and sends a control instruction to the PSE chip through any channel to complete the control of the PSE chip.
It should be noted that the function of the driving function in S102 is to enable the CPU to control the PSE chip to supply power to the port of the POE switch through the IIC channel or the UART channel. And S103, completing control over the PSE chip, wherein the control over power supply of the PSE chip is mainly performed, so that a CPU (central processing unit) can control a port for supplying power in a POE (power over Ethernet) switch through the PSE chip.
Further, as shown in fig. 2, before S101, the method further includes:
s111, setting the priority of a channel corresponding to an interface arranged on a POE switch mainboard; wherein, the priority is used for selecting to scan the PSE chip through the IIC channel or the UART channel;
specifically, the user can set the priority of the channel corresponding to the interface set on the POE switch motherboard by himself or herself according to the requirement, for example, the user can set the priority of the IIC channel to be higher than the priority of the UART channel, and then the PSE chip is scanned through the IIC channel first, or the user can set the priority of the UART channel to be higher than the priority of the IIC channel, and then the PSE chip is scanned through the UART channel first. For the specific way of setting the channel scanning priority, the embodiment of the present invention is not limited as long as scanning the PSE chip through the IIC channel or the UART channel can be achieved.
After adding S111, S101 is:
and the CPU selects one of the channels corresponding to the interfaces arranged on the POE switch mainboard to scan the PSE chip according to the priority.
For example, when the user sets the priority of the UART channel to be higher than that of the IIC channel, the CPU will first select to scan the PSE chip through the UART channel according to the set priority. Or the user sets the priority of the IIC channel to be higher than that of the UART channel, the CPU firstly selects to scan the PSE chip through the IIC channel according to the set priority.
Further, considering that the PSE chip using the IIC channel is widely applied, the priority may be set by default to be that the IIC channel has a higher priority than the UART channel, and as shown in fig. 3, the method includes:
s121, scanning the PSE chip through the IIC channel, and if the PSE chip is scanned, entering S122, otherwise, entering S123;
s122, determining a driving function corresponding to the PSE chip according to the IIC channel;
s123, scanning the PSE chip through the UART channel, and if the PSE chip is scanned, determining a driving function corresponding to the PSE chip according to the UART channel.
Specifically, when the set priority is that the priority of the IIC channel is higher than that of the UART channel, the PSE chip is scanned through the IIC channel, and if the PSE chip is scanned through the IIC channel, a driving function corresponding to the PSE chip is determined through the IIC channel; but if the PSE chip is not scanned through the IIC channel, which indicates that the PSE chip uses the IIC channel, the PSE chip is scanned through the UART channel. If the PSE chip is scanned through the UART channel, the fact that the UART channel is used by the PSE chip is shown, and then the corresponding driving function of the PSE chip can be determined according to the UART channel.
Specifically, when the set priority is that the priority of the UART channel is higher than that of the IIC channel, the PSE chip is scanned through the UART channel, and if the PSE chip is scanned through the UART channel, a driving function corresponding to the PSE chip is determined through the UART channel; but if the PSE chip is not scanned through the UART channels, which indicates that the PSE chip uses the UART channels, the PSE chip is scanned through the IIC channels. If the PSE chip is scanned through the IIC channel, the fact that the PSE chip uses the IIC channel is shown, and then the corresponding driving function of the PSE chip can be determined according to the IIC channel.
For example, if the PSE chip manufactured by manufacturer a uses the IIC channel, the PSE chip manufactured by manufacturer B uses the UART channel. When the whole machine is started, the CPU firstly uses the IIC channel to detect whether a PSE chip exists under the IIC channel, if the PSE chip can be scanned, the PSE chip of a manufacturer A is used on the POE mainboard, a PSE module suitable for the manufacturer A is called, and the PSE chip is initialized correspondingly; then the drive function of the PSE chip of the mounted A manufacturer can carry out corresponding management on the PSE chip, the mounted drive function is provided for the POE power management module to be called, finally, the whole machine is started and completed, POE is normally supplied with power to the outside, and the CPU controls the PSE chip through the IIC channel.
If the PSE chip cannot be scanned through the IIC channel during starting, the CPU is switched to a UART channel and detects the PSE chip through the UART channel; if the PSE chip can be scanned, the PSE chip of a B manufacturer is used on the main board of the POE switch, a PSE module suitable for the B manufacturer is called, and the PSE chip is initialized correspondingly; then software mount B producer's PSE chip's drive function can carry out corresponding management to the PSE chip, and the drive function of mount provides POE power management module and calls, and final complete machine starts to accomplish, and POE normally supplies power to the outside, and CPU controls the PSE chip through the UART passageway.
It should be noted that, in the embodiment of the present invention, the driving functions of the IIC channel and the UART channel need to be loaded into software, so that the channels can be switched during power-on scanning.
Further, as shown in fig. 4, in S102, determining a driving function corresponding to the PSE chip according to the any channel includes:
s141, acquiring version information corresponding to the PSE chip according to the scanned PSE chip;
s142, determining a driving function corresponding to the PSE chip according to the version information of the PSE chip.
Specifically, the version information of the PSE chip is stored in an internal register of the PSE chip, and the driving function used by the PSE chip can be determined according to the version information. Therefore, in the specific implementation process, the version information corresponding to the PSE chip is obtained according to the scanned PSE chip, and then the driving function corresponding to the PSE chip is determined according to the obtained version information.
It should be noted that, in the embodiment of the present invention, a specific manner for acquiring the version information of the PSE chip is not limited, as long as the drive function corresponding to the PSE chip can be determined according to the acquired version information of the PSE chip.
Example two
As shown in fig. 5, a second embodiment of the present invention provides a device compatible with a PSE chip, including a POE switch motherboard 201, where an interface provided on the POE switch motherboard 201 is connected to the PSE chip 202, and the device further includes:
the scanning module 203 is configured to scan the PSE chip 202 sequentially through channels corresponding to interfaces set on the POE switch motherboard 201; the channels corresponding to the interfaces arranged on the POE switch main board 201 include an IIC channel and a UART channel;
a processing module 204, configured to determine, if the PSE chip 202 is scanned through any one of channels corresponding to interfaces set on the POE switch motherboard 201, a driving function corresponding to the PSE chip 202 according to any one of the channels; and calling a driving function and sending a control instruction to the PSE chip 202 through any channel to complete the control of the PSE chip 202.
Optionally, the apparatus further comprises a priority setting module 205;
a priority setting module 205, configured to set a priority of a channel corresponding to an interface set on the POE switch motherboard 201; the priority is used for selecting to scan the PSE chip through the IIC channel or the UART channel.
Optionally, when the priority of the IIC channel is higher than that of the UART channel, the scanning module 203 is specifically configured to scan the PSE chip through the IIC channel, and if the PSE chip is scanned, determine a driving function corresponding to the PSE chip according to the IIC channel; if the PSE chip can not be scanned through the IIC channel, scanning the PSE chip through the UART channel; and if the PSE chip is scanned through the UART channel, determining a corresponding driving function of the PSE chip according to the UART channel.
Optionally, when the priority of the UART channel is higher than that of the IIC channel, the scanning module 203 is specifically configured to scan the PSE chip through the UART channel, and if the PSE chip is scanned, determine a driving function corresponding to the PSE chip according to the UART channel; if the PSE chip can not be scanned through the UART channel, the PSE chip is scanned through the IIC channel; and if the PSE chip is scanned through the IIC channel, determining a driving function corresponding to the PSE chip according to the IIC channel.
The apparatus may be configured to execute the method provided in the embodiment shown in fig. 1 to fig. 4, and therefore, for the flow of the method and the like, reference may be made to the description of the embodiment shown in fig. 1 to fig. 4, which is not repeated. The priority setting module 205 is also shown in fig. 5, but it should be understood that the priority setting module 205 is not an optional functional module and is therefore shown in fig. 5 by a dotted line.
EXAMPLE III
As shown in fig. 6, a third embodiment of the present invention further provides a device compatible with a PSE chip, where the device includes:
a POE switch motherboard 301, on which a CPU 302, an IIC channel 303, a UART channel 304, and interfaces for connecting the IIC channel 303 and the UART channel 304 to other devices are provided;
the CPU 302 is configured to: scanning the PSE chip 306 sequentially through channels corresponding to interfaces connected with other equipment; if any channel in the channels corresponding to interfaces connected with other equipment is scanned to the PSE chip 306, determining a driving function corresponding to the PSE chip 306 according to the any channel; calling the driving function and sending a control instruction to the PSE chip 306 through any channel to complete control over the PSE chip 306;
the PSE board 305 is provided with a PSE chip 306, and the PSE board 305 is movably connected with the POE switch main board 301 through an interface of the POE switch main board 301.
Specifically, the POE switch motherboard and the PSE board may be movably connected by inserting the PSE board into the POE switch motherboard when in use, but for the specific manner of movably connecting the POE switch motherboard and the PSE board, the embodiment of the present invention is not limited as long as the POE switch motherboard and the PSE board are movably connected to realize switching of PSE chips with different interfaces.
It is worth noting that the sizes of the main board of the POE switch and the PSE board need to be adapted so that the user can use the POE switch. Simultaneously, in order to let PSE board and POE switch mainboard swing joint back, the work that the PSE chip can be normal still need to guarantee the pin one-to-one of the pin of PSE chip on the PSE board and the pin one-to-one of POE switch mainboard interface.
Optionally, as shown in fig. 6, the two interfaces connected to the other devices are respectively corresponding to the IIC channel and the UART channel, so that the IIC channel and the UART channel are connected to the other devices.
It should be noted that in the method and apparatus in the embodiment of the present invention, a POE switch motherboard corresponds to a PSE chip, so the PSE board connected to the CPU 302 through the UART channel 304 in fig. 6 is identified by a dashed box, which indicates that the CPU 302 is connected to the PSE board through the IIC channel 303 at this time. But if the CPU is connected to the PSE board through the UART channel, the PSE board connected to the CPU through the IIC channel is represented by a dotted box. It should be noted that fig. 6 only shows one of the above cases in the embodiment of the present invention, but the embodiment of the present invention is not limited to the case shown in fig. 6.
The embodiment of the invention provides a method and a device for being compatible with a PSE chip. The embodiment of the invention can realize that different PSE chips are compatible on the main board of the POE switch, and solves the problem that the POE switch using the PSE chip stops production after the PSE chip of a certain interface stops production.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims (8)

1. A method compatible with a PSE chip is applied to a POE switch mainboard, an interface arranged on the POE switch mainboard is connected with the PSE chip, and the method is characterized by comprising the following steps:
a Central Processing Unit (CPU) scans a PSE chip through channels corresponding to interfaces arranged on a POE switch mainboard in sequence; the channels corresponding to the interfaces arranged on the POE switch mainboard comprise an IIC channel and a UART channel;
if the PSE chip is scanned through any channel in channels corresponding to an interface arranged on the POE switch main board, determining a driving function corresponding to the PSE chip according to the any channel;
the CPU calls the driving function and sends a control instruction to the PSE chip through any one channel to complete control over the PSE chip;
before the CPU sequentially scans the PSE chip through the channels corresponding to the interfaces set on the POE switch motherboard, the method further includes:
setting the priority of a channel corresponding to an interface arranged on the POE switch main board; wherein the priority is used for selecting to scan the PSE chip through the IIC channel or the UART channel first.
2. The method of claim 1, wherein when the priority of the IIC channel is higher than the priority of the UART channel, the CPU sequentially scans a PSE chip through channels corresponding to interfaces provided on a POE switch motherboard, including:
scanning the PSE chip through the IIC channel, and if the PSE chip is scanned, determining a driving function corresponding to the PSE chip according to the IIC channel;
scanning the PSE chip through the UART channel if the PSE chip cannot be scanned through an IIC channel;
and if the PSE chip is scanned through the UART channel, determining a driving function corresponding to the PSE chip according to the UART channel.
3. The method of claim 1, wherein when the priority of the UART channel is higher than the priority of the IIC channel, the CPU sequentially scans PSE chips through channels corresponding to interfaces provided on a POE switch motherboard, including:
scanning the PSE chip through the UART channel, and if the PSE chip is scanned, determining a driving function corresponding to the PSE chip according to the UART channel;
scanning the PSE chip through the IIC channel if the PSE chip cannot be scanned through a UART channel;
and if the PSE chip is scanned through the IIC channel, determining a driving function corresponding to the PSE chip according to the IIC channel.
4. The utility model provides a device of compatible PSE chip, includes POE switch mainboard, the interface that sets up on the POE switch mainboard is connected with the PSE chip, its characterized in that, the device still includes:
the scanning module is used for scanning the PSE chip sequentially through channels corresponding to interfaces arranged on the POE switch mainboard; the channels corresponding to the interfaces arranged on the POE switch mainboard comprise an IIC channel and a UART channel;
the processing module is used for determining a driving function corresponding to the PSE chip according to any channel if the PSE chip is scanned through any channel in the channels corresponding to the interfaces arranged on the POE switch mainboard; calling the driving function and sending a control instruction to the PSE chip through any one channel to complete control over the PSE chip;
wherein the device further comprises a priority setting module;
the priority setting module is used for setting the priority of a channel corresponding to an interface set on the POE switch mainboard; wherein the priority is used for selecting to scan the PSE chip through the IIC channel or the UART channel first.
5. The apparatus of claim 4, wherein the scanning module is specifically configured to scan the PSE chip through the IIC channel when the IIC channel has a higher priority than the UART channel, and if the IIC channel is scanned, determine a driving function corresponding to the PSE chip according to the IIC channel; scanning the PSE chip through the UART channel if the PSE chip cannot be scanned through an IIC channel; and if the PSE chip is scanned through the UART channel, determining a driving function corresponding to the PSE chip according to the UART channel.
6. The apparatus of claim 4, wherein the scanning module is specifically configured to scan the PSE chip through the UART channel when the priority of the UART channel is higher than the priority of the IIC channel, and if the PSE chip is scanned, determine a driving function corresponding to the PSE chip according to the UART channel; scanning the PSE chip through the IIC channel if the PSE chip cannot be scanned through a UART channel; and if the PSE chip is scanned through the IIC channel, determining a driving function corresponding to the PSE chip according to the IIC channel.
7. An apparatus compatible with a PSE chip, the apparatus comprising:
the POE switch comprises a POE switch main board, wherein a CPU, an IIC channel, a UART channel and interfaces for connecting the IIC channel and the UART channel with other equipment are arranged on the POE switch main board; the CPU is configured to: scanning the PSE chip sequentially through the channels corresponding to the interfaces connected with other equipment; if any channel in the channels corresponding to the interfaces connected with other equipment is scanned to the PSE chip, determining a driving function corresponding to the PSE chip according to the any channel; calling the driving function and sending a control instruction to the PSE chip through any one channel to complete control over the PSE chip;
the PSE board is provided with a PSE chip and is movably connected with the POE switch main board through an interface on the POE switch main board;
wherein the CPU is further configured to: setting the priority of a channel corresponding to an interface arranged on the POE switch main board; wherein the priority is used for selecting to scan the PSE chip through the IIC channel or the UART channel first.
8. The apparatus of claim 7, wherein the two interfaces connected to the other devices are corresponding to the IIC channel and the UART channel, respectively, so that the IIC channel and the UART channel are connected to the other devices.
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CN115396243B (en) * 2022-10-27 2023-03-14 武汉思创易控科技有限公司 PoE power supply control method, storage medium and terminal
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