CN102109604A - GPS/GALILEO navigation baseband processing chip and navigation receiver - Google Patents
GPS/GALILEO navigation baseband processing chip and navigation receiver Download PDFInfo
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Abstract
The invention relates to a GPS/GALILEO navigation baseband processing chip and a navigation receiver, belonging to the technical field of receivers of global satellite positioning systems. The navigation baseband processing chip comprises a capture engine, a tracking channel, an embedded processor and an interface control logic, wherein the embedded processor consists of the control logic, an embedded processor core, a mathematical operation module and a double-port RAM. The navigation baseband processing chip works together with an external main control microprocessor, and calculates the position of a user by providing information such as satellite orbit parameters, pseudo-range measurement and the like for the main control microprocessor; the main control microprocessor interacts with the navigation baseband processing chip through a double-port RAM; the control logic circuit can turn off the clock or voltage of an idle circuit in the navigation baseband processing chip, so that the power consumption of the navigation baseband processing is greatly reduced; meanwhile, the interface of the navigation baseband processing chip and the master control microprocessor has the advantages of flexibility, convenience, strong expansibility and the like.
Description
Technical field
The present invention relates to a kind of navigation baseband processing chip and navigation neceiver, relate in particular to a kind of GPS/GALILEO navigation baseband processing chip and navigation neceiver, belong to the receiver technical field of Global Positioning System (GPS) (GPS and GALILEO).
Background technology
Global Positioning System (GPS) (GPS, GlobalPositioning Satellite) is the satellite system by U.S.'s exploitation and operation.This system can provide to the user in the global range with suitable receiver device accurately, continuous three-dimensional position and velocity information.The gps satellite constellation is made up of 24 satellites on 6 orbital planes, comprises 4 satellites on each plane.System utilizes the notion of unidirectional range finding time of arrival, make satellite do benchmark with high-precision spaceborne atomic frequency standard and launch, and spaceborne atomic frequency standard is synchronous with the gps time benchmark.Satellite adopts the technology of CDMA to broadcast ranging code and navigation data on two frequencies, also is L1 (1575.42MHz) and L2 (1227.6MHz).
Gps signal adopts the modulation system of direct sequence spread spectrum (DSSS, DirectSequence Spread Spectrum) and binary phase shift keying (BPSK, Binary Phase Shift Keying).Signal in the L1 frequency is modulated by C/A sign indicating number and two PRN of P sign indicating number (pseudorandom) sign indicating number.The bit rate of C/A sign indicating number is 1.023MHz, and employing length is 1023 GOLD sign indicating number, and every satellite is corresponding to a C/A sign indicating number.And the bit rate of P sign indicating number is 10.23MHz, and it can only used for PPS user (mainly towards military).GPS PRN sign indicating number has good auto-correlation and their cross correlation, and this has determined which satellite receiver user can be by selecting local code and receiving code sequence to carry out that related operation differentiates on earth.
The navigation message speed of GPS is per second 50 bits.It by 5 subframes totally 1500 bits form each subframe 300 bit.Each subframe itself is made up of the word of 10 30 bits.Last 6 bits of each word are used for parity checking in the navigation message, so that provide the ability that timing detects the bit mistake of separating for subscriber equipment.Under normal mode of operation, navigation data is repeated broadcast in 2 hours time.Subframe 1 has comprised GPS number of weeks, satellite precision, health data and clock correction etc.Subframe 2 and subframe 3 have comprised ephemeris parameter.Subframe 4 and subframe 5 comprise the almanac of satellite health data, special text, satellite configuration sign, ionosphere and UTC data and 1-32 satellite.Almanac is the simplified subset of satellite ephemeris parameter, and the life-span is a week, and broadcasting in per 12.5 minutes once.
GPS receiver computed user locations needs the ephemeris information of known four satellites and four satellites to arrive user's distance.This distance is to obtain by the transmission time of calculating the PN sign indicating number.Because the gps signal x time is different with local moment starting point, therefore can only obtain a pseudorange.By follow-up interative computation, can obtain the difference in this initial moment, and then obtain the actual distance of satellite to the user.
The GALILEO global position system is the Global Positioning System (GPS) of being initiated by European various countries.As the GPS (Global Position System) of starting late, the development starting point of GALILEO system is also higher, has used the newest fruits of a series of current satellite technologies.The GALILEO system is made up of 30 satellites on three orbital planes.Each track has 9 satellites and 1 backup satellite.The GALILEO system will provide six kinds of navigation signals on frequency range 1164-1215MHz (E5 frequency range), 1260-1300MHz (E6 frequency range) and 1559-1592MHz (E2-L1-E1), note is done respectively: L1F, L1P, E6C, E6P, E5a and E5b.Wherein L1F, E5a and E5b are the signals that can openly visit, and it is formed by a data passage and a navigation passage.
GALILEO signal format is more, is example with the L1F signal, is described as follows: the L1F signal adopts BOC (1,1) modulation system, and bit rate is 1.023MHz, and code length is 2046.The character rate of data and pilot channel is per second 250 bits.
The navigation message of GALILEO system complete transmits on each data channel with the form of superframe sequence.A superframe is made up of several frames, and a frame is made up of several subframes again.Subframe is to form the basic structure of navigation message, comprises following components: synchronization character, be used for the cyclic redundancy check (CRC) position of error detection and be used for the tail bit of FEC scrambler.The convolution FEC coding that all subframe through-rates reduce by half and the mode of block interleaving are protected, and symbol sebolic addressing that is produced and corresponding PRN sign indicating number carry out addition then, are used for modulating the navigation signal component.
The positioning principle and the gps system of GALILEO system are similar, its all by calculate satellite to user distance with obtain satellite ephemeris information and come computed user locations.Concrete principle can repeat no more here with reference to the navigation type article.
General navigation neceiver is made up of antenna, low noise amplifier, radio frequency chip, baseband processing chip, the outer FLASH of sheet and RAM etc.Baseband processing chip is the core of whole navigation neceiver.Traditional navigation neceiver baseband processing chip generally comprises: embedded microprocessor and internal bus thereof, ram in slice, in-chip FLASH, correlator and clock generation circuit etc., representative products is the GP4020GPS baseband processing chip of ZARLINK.In order to satisfy the requirements at the higher level of receiver user for start-up time and receiver sensitivity, many receiver chips design the mentality of designing that manufacturer has adopted extensive capture engine+AGPS, this scheme can obtain the smaller TTFF time (primary positioning time) and-the following tracking sensitivity of 158dBm, representative products is the UBX-G5000 GPS/GALILEO/SBAS baseband processing chip of U-BLOX.
Fig. 1 is the structural representation of navigation neceiver in the prior art.As shown in Figure 1, navigation neceiver comprises antenna 201, the radio circuit 223 that links to each other with described antenna 201, the navigation baseband processing chip 220 that links to each other with described radio circuit 223, the 32KHz crystal 2 06 that links to each other with described navigation baseband processing chip 220.Described antenna 201 receives satellite-signal after low noise amplifier 202 amplifies, enter SAW (Surface Acoustic Wave) filter 203, enter radio frequency chip 204 then, radiofrequency signal carries out giving navigation baseband processing chip 220 by analog to digital converter adc circuit conversion output digital medium-frequency signal again and handling after down-conversion operation obtains the medium-frequency IF signal.TCXO205 is used to radio frequency chip 204 and navigation baseband processing chip 220 that work clock is provided.
Described digital medium-frequency signal is delivered to capture engine 209 earlier after entering navigation baseband processing chip 220, the code phase of described capture engine 209 search visible satellites and the drift of Doppler's carrier wave.Catch finish after, follow the tracks of 210 pairs of signals of passage and follow the tracks of, flush bonding processor 218 is realized continuing synchronously of signal by control carrier generator and code generator.The mode that the capture engine of navigation baseband processing chip 220 and tracking passage are realized has a variety of, and the efficient of catching is also different with the number of following the tracks of passage.Increase capture engine and can improve the speed of sprocket channel and improve tracking sensitivity with the quantity of following the tracks of passage, but can increase power consumption, the area of chip, this also needs compromise consideration.
Described flush bonding processor 218 is responsible for the control of entire chip and is resolved customer location.Flush bonding processor nuclear 217 is by the inner ROM 213 of internal bus 222 visits, internal RAM 214, dma controller 218, timer/counter 215 and interruptable controller 216.The program of described flush bonding processor 218 operations is positioned at ROM213; Simultaneously, flush bonding processor 218 generally can provide the interface that connects outside FLASH, is used to visit the more jumbo storer of sheet outward.Except the program code of storage running, also be used for storing satellite ephemeris information, temporal information and channel status etc. among the FLASH, can provide prior imformation for starting next time like this.Satellite information that flush bonding processor 218 calculates and customer position information send the external piloting control processor to by UART interface 221.This data layout generally adopts NMEA0183, and promptly a kind of use is outputting standard widely, and some navigation baseband processing chip manufacturers have also formulated own proprietary output format.
The inside of described navigation baseband processing chip 220 generally also comprises real-time clock generator 207, system clock generator 208, watchdog circuit 211, system reset logic 212 and system reset logic 217 etc.Described 32KHz crystal 2 06 is used to produce real-time clock RTK 207, in the time of the chip power down, system guarantees the real-time clock operate as normal by battery, when working on power once more, system can just can accurately predict current visible satellite and Doppler shift thereof in conjunction with satellite ephemeris and almanac for it provides local zone time.
Fig. 2 is applied to the structural representation of mobile device for navigation neceiver in the prior art.As shown in Figure 2, it mainly is made up of navigation neceiver module 323, main system control module 336 and Communications Processor Module 328.There is not Communications Processor Module 328 for equipment such as automatic navigators, remaining similar.Navigation neceiver module 323 be responsible for navigation signals reception, catch, tracking, demodulation, resolve and export.Communication module 328 is responsible for the processing of communications portion, comprises conversation and the various data service processing of 2G/3G, and main control module mainly is responsible for the control of total system, the application of navigation module, and some other system-level application.
Described navigation neceiver module 323 mainly is made up of antenna 301, radio circuit 337, navigation baseband processing chip 320 and 32KHz crystal 3 06, the course of work of inner structure of baseband processing chip 320 of wherein navigating and navigation neceiver module 323 is the same with the description among Fig. 1, does not repeat them here.
Described Communications Processor Module 328 mainly is made up of communication antenna 324, external crystal-controlled oscillation 327, radio frequency chip 325 and the baseband processing circuitry 326 of communicating by letter.It mainly finishes transmission and reception with the information such as relevant voice, data, image of communicating by letter.
The described main system control module 336 main controls of being responsible for whole mobile device.It is mainly by main control microprocessor 329, bus 330, ROM331, RAM332, FLASH333, and LCD334 and other peripheral hardwares 335 are formed.Described main control microprocessor 329 is not only wanted voice communications, data transmission and multimedia application, the control of the baseband chip of also will being responsible for navigating, the demonstration of electronic chart etc.The high performance microprocessor chip of described main control microprocessor 329 general employings.
Particularly for the consumer electronics product, cost and power consumption are two the most responsive indexs for mobile device.Traditional receiver baseband processing chip, embedded microprocessor and ram in slice/FLASH thereof have occupied no small area, and along with the complicacy of system constantly promotes, procedure quantity can increase greatly, make that the power consumption of chip and cost are high.
Summary of the invention
The present invention is directed to traditional receiver baseband chip, embedded microprocessor and ram in slice/FLASH thereof have occupied no small area, and along with the complicacy of system constantly promotes, procedure quantity increases greatly, make and the power consumption of chip and the deficiency that cost remains high provide a kind of GPS/GALILEO navigation baseband processing chip and navigation neceiver.
The technical scheme that the present invention solves the problems of the technologies described above is as follows: a kind of GPS/GALILEO navigation baseband processing chip comprises capture engine, follows the tracks of passage, flush bonding processor and interface control logic;
Described capture engine is used under the control of described flush bonding processor, searches for and catch the code phase and the drift of Doppler's carrier wave of GPS/GALILEO signal;
Described tracking passage comprises carrier generator unit, code generator unit and related operation unit in it, be used under the control of described flush bonding processor the GPS/GALILEO signal being followed the tracks of;
Described flush bonding processor, be used for adopting different acquisition and tracking strategies respectively at the GPS/GALILEO signal, it realizes continuing synchronously of GPS/GALILEO signal by control capture engine and tracking passage, and then obtains being used for the navigation message and the pseudo range measurement information of computed user locations;
Described interface control logic is used to described flush bonding processor to provide different access modes with the external piloting control processor that links to each other with described GPS/GALILEO navigation baseband processing chip;
Described flush bonding processor is made up of steering logic, flush bonding processor nuclear, mathematical operation module and dual port RAM;
Described flush bonding processor nuclear, thereby be used for obtaining GPS/GALILEO signal capture code phase and the drift of Doppler's carrier wave by disposing described capture engine, it realizes the GPS/GALILEO signal is continued synchronously by the described tracking passage of control then, and then obtain navigation message, read the pseudo range measurement information of described tracking passage simultaneously, and the navigation message and the pseudo range measurement information that will be used for computed user locations deposit described dual port RAM in;
Described mathematical operation module, it is as the accessory module of described flush bonding processor nuclear, is used for following the tracks of the passage control variable in signals tracking process in according to described dual port RAM and performs mathematical calculations, and then upgrade the controlled quentity controlled variable of described tracking channel interior;
Described steering logic is used to control program loading, operation and the dormancy of described flush bonding processor nuclear, and the startup and the dormancy that are used to control described capture engine and follow the tracks of passage;
Described dual port RAM, be used to described GPS/GALILEO navigation baseband processing chip to provide the interactive access passage with the external piloting control processor that links to each other with described GPS/GALILEO navigation baseband processing chip, storage simultaneously is used for the navigation message and the pseudo range measurement information of computed user locations.
Further, described dual port RAM stored overall control variable, capture engine control variable, follow the tracks of the passage control variable and resolve correlated variables.
Further, described interface control logic comprises one or several in SPI interface, HPI interface, UART interface, IIC interface and the BUS interface.
Further, also comprise real-time clock generator, system clock generator, watchdog circuit and system reset logic; Described real-time clock generator is used to described GPS/GALILEO navigation baseband processing chip to carry out clock count; Described system clock generator is used to produce the clock that inner each module of described GPS/GALILEO navigation baseband processing chip is used; Described watchdog circuit is used to avoid the deadlock of chip; The system reset logic is used to inner each module of described GPS/GALILEO navigation baseband processing chip that reset signal is provided.
The present invention also provides a kind of technical scheme as follows for solving the problems of the technologies described above: a kind of navigation neceiver is made up of antenna, radio circuit, GPS/GALILEO navigation baseband processing chip and 32KHz crystal;
Described antenna is used to receive the GPS/GALILEO signal, and sends it to radio circuit;
Described radio circuit is used for the GPS/GALILEO conversion of signals is become digital medium-frequency signal, and sends GPS/GALILEO navigation baseband processing chip to;
Described GPS/GALILEO navigation baseband processing chip, be used for the catching of described digital medium-frequency signal, tracking and demodulation, provide the information of satellite orbit parameter and pseudo range measurement to come computed user locations for the external piloting control processor that links to each other with described GPS/GALILEO navigation baseband processing chip simultaneously;
Described 32KHz crystal is used to produce real-time clock.
Further, described GPS/GALILEO navigation baseband processing chip comprises capture engine, follows the tracks of passage, flush bonding processor and interface control logic;
Described capture engine is used under the control of described flush bonding processor, searches for and catch the code phase and the drift of Doppler's carrier wave of GPS/GALILEO signal;
Described tracking passage comprises carrier generator unit, code generator unit and related operation unit in it, be used under the control of described flush bonding processor the GPS/GALILEO signal being followed the tracks of;
Described flush bonding processor, be used for adopting different acquisition and tracking strategies respectively at the GPS/GALILEO signal, it realizes continuing synchronously of GPS/GALILEO signal by control capture engine and tracking passage, and then obtains being used for the navigation message and the pseudo range measurement information of computed user locations;
Described interface control logic is used to described flush bonding processor to provide different access modes with the external piloting control processor that links to each other with described GPS/GALILEO navigation baseband processing chip;
Described flush bonding processor is made up of steering logic, flush bonding processor nuclear, mathematical operation module and dual port RAM;
Described flush bonding processor nuclear, thereby be used for obtaining GPS/GALILEO signal capture code phase and the drift of Doppler's carrier wave by disposing described capture engine, it realizes the GPS/GALILEO signal is continued synchronously by the described tracking passage of control then, and then obtain navigation message, read the pseudo range measurement information of described tracking passage simultaneously, and the navigation message and the pseudo range measurement information that will be used for computed user locations deposit described dual port RAM in;
Described mathematical operation module, it is as the accessory module of described flush bonding processor nuclear, is used for following the tracks of the passage control variable in signals tracking process in according to described dual port RAM and performs mathematical calculations, and then upgrade the controlled quentity controlled variable of described tracking channel interior;
Described steering logic is used to control program loading, operation and the dormancy of described flush bonding processor nuclear, and the startup and the dormancy that are used to control described capture engine and follow the tracks of passage;
Described dual port RAM, be used to described GPS/GALILEO navigation baseband processing chip to provide the interactive access passage with the external piloting control processor that links to each other with described GPS/GALILEO navigation baseband processing chip, storage simultaneously is used for the navigation message and the pseudo range measurement information of computed user locations.
Further, described dual port RAM stored capture engine and follow the tracks of passage overall control variable, capture engine control variable, follow the tracks of the passage control variable and resolve correlated variables.
Further, described interface control logic comprises one or several in SPI interface, HPI interface, UART interface, IIC interface and the BUS interface.
Further, described GPS/GALILEO navigation baseband processing chip also comprises real-time clock generator, system clock generator, watchdog circuit and system reset logic; Described real-time clock generator is used to described GPS/GALILEO navigation baseband processing chip to carry out clock count; Described system clock generator is used to produce the clock that inner each module of described GPS/GALILEO navigation baseband processing chip is used; Described watchdog circuit is used to avoid the deadlock of chip; The system reset logic is used to inner each module of described GPS/GALILEO navigation baseband processing chip that reset signal is provided.
The invention has the beneficial effects as follows: GPS/GALILEO navigation baseband processing chip of the present invention is worked with the main control microprocessor of outside, comes computed user locations by information such as satellite orbit parameter and pseudo range measurement are provided for main control microprocessor; Main control microprocessor is mutual by a dual port RAM and GPS/GALILEO navigation baseband processing chip; Main control microprocessor can also utilize communication module to obtain tracking sensitivity and reduction primary positioning time that outside supplementary improves system; The control logic circuit of GPS/GALILEO navigation baseband processing chip can turn-off the clock or the voltage of idle circuit in the GPS/GALILEO navigation baseband processing chip, greatly reduces the power consumption of navigation Base-Band Processing; Advantages such as simultaneously, the interface of this navigation baseband processing chip and main control microprocessor has flexible, and extendability is strong.
Beneficial effect of the present invention specifically comprise following some:
(1) the present invention is transplanted to main control microprocessor with complex calculations such as positioning calculations and finishes, operations such as the navigation baseband processing chip only finishes that real-time has relatively high expectations catches, tracking and demodulation, so just reduced the processing load of navigation baseband processing chip greatly, it can be moved under lower speed, reduced the power consumption of navigation baseband processing chip.
(2) flush bonding processor in the navigation baseband processing chip improves, timer, dma circuit, interruptable controller etc. have been simplified, increased the mathematical operation module simultaneously, transformation can reduce chip area so targetedly, increases code simultaneously and carries out efficient.
(3) mobile device generally all has bigger accumulator system, the code that moves in the navigation baseband processing chip can be stored among the FLASH of external system, during each run, the external piloting control microprocessor is according to the program of the pattern load operating of operation, save nonvolatile memories such as the inner FLASH of navigation baseband processing chip like this, reduced system cost.
(4) the flush bonding processor nuclear in the navigation baseband processing chip is as a slave module, its loading, operation, dormancy all are to be controlled by the control logic module of navigation baseband processing chip inside, flush bonding processor nuclear is mainly finished the tracking of signal, realize loop filter, operations such as channel decoding, it is in dormant state in the most of the time, and each related operation just can be called after finishing, and its power consumption just can maintain a very low level like this.
Description of drawings
Fig. 1 is the structural representation of navigation neceiver in the prior art;
Fig. 2 is applied to the structural representation of mobile device for navigation neceiver in the prior art;
Fig. 3 is the workflow diagram of embodiment of the invention navigation neceiver;
Fig. 4 is the structural representation of embodiment of the invention navigation neceiver;
Fig. 5 is applied to the structural representation of mobile device for embodiment of the invention navigation neceiver.
Embodiment
Below in conjunction with accompanying drawing principle of the present invention and feature are described, institute gives an actual example and only is used to explain the present invention, is not to be used to limit scope of the present invention.
Often contain a more intense big microprocessor of performance in the mobile device, if can make full use of the resource that external microprocessor provides, can reduce system cost and power consumption greatly, have at present some chip manufacturers to propose receiver architecture based on this thought.Mobile device often has a communication module, the supplementary that it can obtain locating by the outside, and for example: AGPS information just can improve locating speed and the tracking sensitivity of GPS.Utilize the mobile device existing resources, can simplified system design usually, the overall cost of navigational system is reduced greatly, power consumption also can maintain a lower level simultaneously.This mentality of designing is accepted by a lot of manufacturers that design, and becomes the important directions in the navigation chip architecture designs gradually.
Fig. 3 is the workflow diagram of embodiment of the invention navigation neceiver.As shown in Figure 3, the external piloting control microprocessor at first carries out initialization 101 to its mode of operation, clock work speed, sign indicating number generator etc. behind the chip power, then with the working procedure 102 of slide glass inner treater.For cold start-up (prior imformation that does not have known satellite), chip at first carries out blind search, and this process is generally caught more intense satellite-signal 103, and the frequency interval of catching generally has the hundreds of hertz.After capturing satellite-signal, processor starts follows the tracks of passage, make passage enter frequency pulling state 104, at this moment the sheet inner treater can be adjusted the frequency of local carrier generator and code generator according to the program that pre-sets, and local frequency and the satellite frequency that receives are consistent.For gps signal, also need to carry out bit synchronous.After frequency pulling is finished, this passage enters tracking mode 105, for the GALILEO signal, also need to carry out the processing 106 of channel decoding and deinterleaving, carry out frame synchronization process 107, at last the text after synchronous is stored in the dual port RAM according to certain location mode separating the data that mix up, certain location mode here mainly refers to the reference position of depositing, the length of depositing text etc., because GPS is different with the form of GALILEO signal, therefore may treat with a certain discrimination and system design has certain.Processor needs to carry out verification and parameter extraction 108 after reading text, so be used for customer location resolve 109.For navigation operation, also need to export post-processing operation 110 such as filtering, at last with the result with literal or ground map logo form be shown to user 111.
Fig. 4 is the structural representation of embodiment of the invention navigation neceiver.As shown in Figure 4, described navigation neceiver is made up of antenna 401, radio circuit 406, GPS/GALILEO navigation baseband processing chip 423 and 32KHz crystal 4 07.Described antenna 401 receives satellite-signal after low noise amplifier 402 amplifies, and enters RF wave filter 403, enters radio frequency chip 404 then.Radiofrequency signal is carried out down-conversion operation and is obtained the medium-frequency IF signal, gives baseband processing chip 423 by analog to digital converter adc circuit conversion output digital medium-frequency signal and handles.TCXO205 is used to radio frequency chip 404 and navigation baseband processing chip 423 that work clock is provided.Flush bonding processor 424 parts are made up of steering logic 414, flush bonding processor nuclear 415, mathematical operation module 416 and dual port RAM 417.Described flush bonding processor nuclear 415 can add, subtracts, takes advantage of, with or, the action of conventional processors such as non-and redirect.Described mathematical operation module 416 can be finished arctan, sin, cos, log and high precision fixed point division arithmetic, it and flush bonding processor 424 adopt internal register or bus mode Data transmission, simplified the instruction code space of flush bonding processor 424 so greatly, complicacy that can bigger simplification flush bonding processor 424 codes, and have arithmetic speed and higher operational precision faster.With respect to the navigation neceiver of prior art, the program of flush bonding processor 424 is loaded by the external piloting control microprocessor, has saved nonvolatile memories such as FLASH.
After described digital medium-frequency signal enters baseband processing chip, deliver to capture engine 410 earlier, the code phase of capture engine 410 search visible satellites and the drift of Doppler's carrier wave.Catch finish after, following the tracks of 411 pairs of signals of passage follows the tracks of, flush bonding processor nuclear 415 is realized continuing synchronously of signal by control carrier generator and code generator, it realizes the GPS/GALILEO signal is continued synchronously by the described tracking passage 411 of control then, read the pseudo range measurement information of described tracking passage 411 simultaneously, and according in the described dual port RAM 417 configuration parameter perform mathematical calculations, and then upgrade the controlled quentity controlled variable of described tracking passage 411 inside, for gps signal, after tracking is stable, flush bonding processor nuclear 415 and mathematical operation module 416 also can be carried out bit synchronous and frame synchronization successively, for the GALILEO signal, after tracking is stable, flush bonding processor nuclear 415 and mathematical operation module 416 also can be carried out frame synchronization and channel decoding successively, and then obtain navigation message and be used to resolve customer location.Described flush bonding processor nuclear 415 and mathematical operation module 416 are in dormant state at ordinary times, when needs are configured, when upgrading, wake flush bonding processor nuclear 415 and mathematical operation module 416 up by steering logic 414 capture engine 410 and tracking passage 411.
Because the pseudo-code length of GPS and GALILEO is different, capture engine and tracking passage need compatible with GPS and two kinds of signal formats of GALILEO; Simultaneously, at different signals, flush bonding processor 424 needs to adopt different tracking strategy, and for example: the signal for varying strength can adopt different filter constructions, the exponent number of main wave filter, the precision of coefficient etc.In addition, different with GALILEO signal format for GPS, the algorithm of its tracking is also different, and directly embodying is exactly that phase detector and filter construction have very big difference.The mode that the capture engine of described GPS/GALILEO navigation baseband processing chip 423 and tracking passage are realized has a variety of, and the efficient of catching is also different with the number of following the tracks of passage.Increase capture engine and can improve the speed of sprocket channel and improve tracking sensitivity with the quantity of following the tracks of passage, but can increase power consumption, the area of chip, this also needs compromise consideration.Present embodiment adopts 1 capture engine 410 and 24 structures of following the tracks of passage 411.
Stored the program of inner flush bonding processor 424 operations in the described dual port RAM 417, it can be by providing multiple interfaces realizing and the butt joint of various types of external piloting control microprocessor, is external piloting control microprocessor and the GPS/GALILEO mutual bridge of baseband processing chip 423 that navigates.Described dual port RAM 417 can be configured by the external piloting control microprocessor, the external piloting control microprocessor is realized control to GPS/GALILEO navigation baseband processing chip 423 by configuration dual port RAM 417, the external piloting control module can the timer access dual port RAM 417 li variable, the perhaps variable by 417 li of interrupt mode visit dual port RAMs.Described steering logic 414 is controlled flush bonding processor nuclear 415 according to the parameter of exterior arrangement.When working at ordinary times, flush bonding processor 424 is in dormant state, and steering logic 414 can be turn-offed the clock of flush bonding processor nuclear 415 or the purpose that voltage realizes reaching low-power consumption.When needs are caught the visible satellite signal, adopt following method:
(1) steering logic 414 is opened capture engine 410;
(2) steering logic 414 is opened flush bonding processor nuclear 415, and operating rate, the start address of program run and the mapping address of data storage of configuration flush bonding processor 424;
(3) flush bonding processor nuclear 415 operation prize procedures are configured capture engine 410, catch intermediate result to be write back dual port RAM 417 after finishing, and after finishing dealing with, steering logic 414 is turn-offed the clock or the voltage of flush bonding processors nuclear 415;
(4) when capturing satellite-signal, steering logic 414 starts follows the tracks of passage 411;
(5) after tracking passage 411 is finished the associative operation in a pseudo-code cycle, steering logic 414 is opened flush bonding processor nuclear 415 again, and disposes the operating rate of flush bonding processor 424, the start address of program run, the mapping address of data storage:
(6) passage 411 operation results are followed the tracks of in 415 operations of flush bonding processor nuclear, and the generation rate that calculates carrier wave and sign indicating number generator is to realize the lasting tracking to satellite-signal.Demodulation navigation message when signal trace is stablized, decoding is done frame synchronization, and the result is write back dual port RAM 417, and after finishing dealing with, steering logic 414 is turn-offed the clock or the voltage of flush bonding processor nuclear 415;
(7) when needs are searched for another visible satellite, repeat said process.
The external piloting control microprocessor is by the value of inquiry mode or interrupt mode visit dual port RAM 417 the insides, and the operation of resolving customer location.Described GPS/GALILEO navigation baseband processing chip 423 provides the multiple interfaces access mode: SPI interface 418, HPI interface 419, UART interface 420, IIC interface 421, BUS interface 422.Which kind of interface mode is concrete system adopt, can be according to the demand flexible configuration of system.
The inside of described GPS/GALILEO navigation baseband processing chip 423 also comprises real-time clock generator 408, system clock generator 409, watchdog circuit 412 and system reset logic 413 etc.Described system clock generator 409 provides clock for modular circuits all in the flush bonding processor 424.Described system reset logic 413 resets for modular circuits all in the flush bonding processor 424 provides.Described external crystal 407 is used to produce real-time clock, in the time of the chip power down, when 423 power down of GPS/GALILEO navigation baseband processing chip, guarantee real-time clock generator 408 operate as normal by external connection battery, when GPS/GALILEO navigation baseband processing chip 423 powers on, relatively accurate local zone time is provided, just can accurately predicts current visible satellite and Doppler shift thereof in conjunction with satellite ephemeris and almanac.Described GPS/GALILEO navigation baseband processing chip 423 can adopt same clock with radio frequency chip 404, can reduce system cost like this.In addition, the clock of described GPS/GALILEO navigation baseband processing chip 423 also can be provided by the inner PLL of radio frequency chip, can obtain stable clock signal more like this.
Radio frequency chip 404 and GPS/GALILEO navigation baseband processing chip 423 can adopt the method for SIP mode to be encapsulated in same chip internal in the concrete process of implementing, also can adopt discrete method, specific implementation will be decided according to the demand of equipment operation.
Fig. 5 is applied to the structural representation of mobile device for embodiment of the invention navigation neceiver.As shown in Figure 5, it mainly is made up of navigation neceiver module 526, main system control module 539 and Communications Processor Module 531.There is not Communications Processor Module 531 for equipment such as automatic navigators, remaining similar.Different with Fig. 2 scheme is: navigation neceiver module 526 only be responsible for navigation signal reception, catch, tracking, demodulation, decoding and synchronously.The positioning calculation and the upper layer application of the initialization of navigation baseband processing chip and control, customer location are all finished by main system control module 539 in the navigation neceiver module 526, and in other words, i.e. Dao Hang part operation is shared by main system control module 539.Described communication module 531 is responsible for the relevant processing of communication, comprises conversation and the various data service processing of 2G/3G, thereby obtains the navigation supplementary.
Described navigation neceiver module 526 mainly is made up of antenna 501, radio circuit 506, GPS/GALILEO navigation baseband processing chip 523 and 32KHz crystal 5 07.Described antenna 501 receives satellite-signal after low noise amplifier 502 amplifies, and enters RF wave filter 503, enters radio frequency chip 504 then.Radiofrequency signal is carried out down-conversion operation and is obtained the medium-frequency IF signal, gives baseband chip by analog to digital converter adc circuit output digital medium-frequency signal and handles.Described digital medium-frequency signal is delivered to capture engine 510 earlier after entering GPS/GALILEO navigation baseband processing chip 523, the code phase of capture engine 510 search visible satellites and the drift of Doppler's carrier wave.Catch finish after, follow the tracks of 511 pairs of signals of passage and follow the tracks of, flush bonding processor 524 is realized continuing synchronously of signal by control carrier generator and code generator.After tracking was stable, flush bonding processor 524 need carry out operations such as bit synchronous (only at GPS), channel decoding (only at GALILEO), frame synchronization to the signal after the demodulation.Described flush bonding processor 524 parts are made up of steering logic 514, flush bonding processor nuclear 515, mathematical operation module 516 and dual port RAM 517.The program of described flush bonding processor 524 operations is positioned at dual port RAM 517, and the operation of flush bonding processor nuclear 515 and dormancy etc. all are responsible for by steering logic 514, and concrete control flow sees that Fig. 5 illustrates.Except the program code of storage running, also stored flush bonding processor and examined control informations such as the address realm of 515 working procedures, clock work speed in the described dual port RAM 517.Comprise satellite ephemeris information, temporal information and channel status etc. in addition, can provide prior imformation for starting next time like this.Ppu visit dual port RAM 517 can pass through interface control logic 525, and the interface that GPS/GALILEO navigation baseband processing chip 523 provides can be one or more combinations in SPI interface 518, HPI interface 519, UART interface 520, IIC interface 521 and the BUS interface 522.
Described Communications Processor Module 531 mainly is made up of communication antenna 527, external crystal-controlled oscillation 530, radio frequency chip 528 and the baseband processing circuitry 529 of communicating by letter, and it mainly finishes transmission and reception with the information such as relevant voice, data, image of communicating by letter.Described main system control module 539 can obtain navigation application such as information such as AGPS are used for catching fast, high sensitivity tracking by Communications Processor Module 531, and it can improve bearing accuracy greatly.For mobile unit, there is not this part circuit.
The described main system control module 539 main controls of being responsible for whole mobile device.It mainly is made up of main control microprocessor 532, bus 533, ROM534, RAM535, FLASH536, LCD537 and other peripheral hardwares 538.Described main control microprocessor 532 is not only wanted voice communications, data transmission and multimedia application, also will be responsible for the control of GPS/GALILEO navigation baseband processing chip 523, the demonstration of electronic chart etc.The high performance microprocessor chip of described main control microprocessor 532 general employings.Described main system control module 539 can obtain navigation information by the dual port RAM 517 that reads navigation baseband processing chip inside, is used for the calculating of customer location, and uses it for navigation, map demonstration etc.In addition, described main system control module 539 can also be controlled initialization, application configuration and the mode of operation switching etc. of navigation baseband processing chip.This structure is followed the tracks of signal capture and is separated with the work of computed user locations information, has been born partly by main system control module 539 and has worked, and has reduced the procedure quantity of navigation baseband processing chip, has made full use of the resource of total system.In embodiments of the present invention, the calculating of customer location and upper layer application are that main control microprocessor 532 is finished, so both reduce the program code quantity of GPS/GALILEO navigation baseband processing chip 523 inner flush bonding processor nuclears 515, can reduce the clock rate of its operation again.Simultaneously, in the relevant ephemeris information of navigation, RAM 535 or FLASH 536 that customer position information can be stored in main system control module 539, thereby greatly reduce the navigate storage space of baseband processing chip 523 inside of GPS/GALILEO.Described main system control module 539 can and be followed the tracks of passage 511 for the capture engine in the navigation neceiver module 526 510 provides prior imformation to accelerate acquisition speed and raising tracking sensitivity, and these prior imformations comprise: the Doppler shift of the visible satellite model of user, user's visible satellite, the code phase offset of user's visible satellite and the ephemeris information of user's visible satellite.
In the present embodiment, described dual port RAM preferably is divided into four zones: overall control variable, capture engine control variable, follow the tracks of the passage control variable and resolve correlated variables.Described overall control variable comprises: the dormancy and the control that resets, front end filter coefficient, each module work clock of system, system's constant, microprocessor operation start address, microprocessor operational mode and microprocessor code.Described capture engine control variable comprises: acquisition mode, catch priority, catch initial frequency (being equivalent to initial Doppler's carrier wave drift), catch initial code speed, catch Doppler effect correction, the detection threshold coefficient, catch accumulative frequency, acquisition search step-length, catch the satellite numbering and catch pseudo-code.Described tracking passage control variable comprises: sign indicating number ring correlation parameter, carrier wave ring correlation parameter, bit synchronous correlation parameter, frame synchronization correlation parameter, deinterleaving correlation parameter, channel decoding correlation parameter, wave filter correlation parameter and passage enable control.The described correlated variables that resolves comprises: each passage satellite intensity, each passage ephemeris, almanac, each channel time register and carrier wave measuring amount.The discharging order in four zones dividing in the described dual port RAM is not determinate, but the composition in its four zones is determinate.
It needs to be noted that above-described navigation neceiver at mobile device is to be that example is set forth in GPS/GALILEO bimodulus mode, but it stands good to similar navigational system not only at the GPS/GALILEO dual mode system.For example, the Big Dipper 1 system and the Big Dipper 2 systems of China, Muscovite GLONASS system.Its embodiment also may be wherein one or several combination.
GPS/GALILEO navigation baseband processing chip of the present invention is worked with the main control microprocessor of outside, comes computed user locations by information such as satellite orbit parameter and pseudo range measurement are provided for main control microprocessor; Main control microprocessor is mutual by a dual port RAM and GPS/GALILEO navigation baseband processing chip; Main control microprocessor can also utilize communication module to obtain tracking sensitivity and reduction primary positioning time that outside supplementary improves system; The control logic circuit of GPS/GALILEO navigation baseband processing chip can turn-off the clock or the voltage of idle circuit in the GPS/GALILEO navigation baseband processing chip, greatly reduces the power consumption of navigation Base-Band Processing; Advantages such as simultaneously, the interface of this navigation baseband processing chip and main control microprocessor has flexible, and extendability is strong.
The above only is preferred embodiment of the present invention, and is in order to restriction the present invention, within the spirit and principles in the present invention not all, any modification of being done, is equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (9)
1. a GPS/GALILEO navigation baseband processing chip comprises capture engine (410), follows the tracks of passage (411), flush bonding processor (424) and interface control logic (425);
Described capture engine (410) is used under the control of described flush bonding processor (424), searches for and catch the code phase and the drift of Doppler's carrier wave of GPS/GALILEO signal;
Described tracking passage (411) comprises carrier generator unit, code generator unit and related operation unit in it, be used under the control of described flush bonding processor (424) the GPS/GALILEO signal being followed the tracks of;
Described flush bonding processor (424), be used for adopting different acquisition and tracking strategies respectively at the GPS/GALILEO signal, it realizes continuing synchronously of GPS/GALILEO signal by control capture engine (410) and tracking passage (411), and then obtains being used for the navigation message and the pseudo range measurement information of computed user locations;
Described interface control logic (425) is used to described flush bonding processor (424) to provide different access modes with the external piloting control processor that links to each other with described GPS/GALILEO navigation baseband processing chip;
It is characterized in that described flush bonding processor (424) is made up of steering logic (414), flush bonding processor nuclear (415), mathematical operation module (416) and dual port RAM (417);
Described flush bonding processor nuclear (415), be used for by disposing described capture engine (410) thus obtain GPS/GALILEO signal capture code phase and the drift of Doppler's carrier wave, it realizes the GPS/GALILEO signal is continued synchronously by the described tracking passage of control (411) then, and then obtain navigation message, read the pseudo range measurement information of described tracking passage (411) simultaneously, and the navigation message and the pseudo range measurement information that will be used for computed user locations deposit described dual port RAM (417) in;
Described mathematical operation module (416), it examines the accessory module of (415) as described flush bonding processor, be used for following the tracks of the passage control variable in according to described dual port RAM (417) and perform mathematical calculations, and then upgrade the inner controlled quentity controlled variable of described tracking passage (411) in signals tracking process;
Described steering logic (414) is used to control program loading, operation and the dormancy of described flush bonding processor nuclear (415), and the startup and the dormancy that are used to control described capture engine (410) and follow the tracks of passage (411);
Described dual port RAM (417), be used to described GPS/GALILEO navigation baseband processing chip to provide the interactive access passage with the external piloting control processor that links to each other with described GPS/GALILEO navigation baseband processing chip, storage simultaneously is used for the navigation message and the pseudo range measurement information of computed user locations.
2. GPS/GALILEO according to claim 1 navigation baseband processing chip is characterized in that, described dual port RAM (417) stored overall control variable, capture engine control variable, follow the tracks of the passage control variable and resolve correlated variables.
3. GPS/GALILEO navigation baseband processing chip according to claim 1, it is characterized in that described interface control logic (425) comprises one or several in SPI interface (418), HPI interface (419), UART interface (420), IIC interface (421) and the BUS interface (422).
4. GPS/GALILEO navigation baseband processing chip according to claim 1 is characterized in that, also comprises real-time clock generator (408), system clock generator (409), watchdog circuit (412) and system reset logic (413); Described real-time clock generator (408) is used to described GPS/GALILEO navigation baseband processing chip to carry out clock count; Described system clock generator (409) is used to produce the clock that inner each module of described GPS/GALILEO navigation baseband processing chip is used; Described watchdog circuit (412) is used to avoid the deadlock of chip; System reset logic (413) is used to inner each module of described GPS/GALILEO navigation baseband processing chip that reset signal is provided.
5. a navigation neceiver is characterized in that, described navigation neceiver is made up of antenna (401), radio circuit (406), GPS/GALILEO navigation baseband processing chip (423) and 32KHz crystal (407);
Described antenna (401) is used to receive the GPS/GALILEO signal, and sends it to described radio circuit (406);
Described radio circuit (406) is used for described GPS/GALILEO conversion of signals is become digital medium-frequency signal, and sends described GPS/GALILEO navigation baseband processing chip (423) to;
Described GPS/GALILEO navigation baseband processing chip (423), be used to control the catching of described digital medium-frequency signal, tracking and demodulation, provide the information of satellite orbit parameter and pseudo range measurement to come computed user locations for the external piloting control processor that links to each other with described GPS/GALILEO navigation baseband processing chip (423) simultaneously;
Described 32KHz crystal (407) is used to produce real-time clock.
6. navigation neceiver according to claim 5 is characterized in that, described GPS/GALILEO navigation baseband processing chip (423) comprises capture engine (410), follows the tracks of passage (411), flush bonding processor (424) and interface control logic (425);
Described capture engine (410) is used under the control of described flush bonding processor (424), searches for and catch the code phase and the drift of Doppler's carrier wave of GPS/GALILEO signal;
Described tracking passage (411) comprises carrier generator unit, code generator unit and related operation unit in it, be used under the control of described flush bonding processor (424) the GPS/GALILEO signal being followed the tracks of;
Described flush bonding processor (424), be used for adopting different acquisition and tracking strategies respectively at the GPS/GALILEO signal, it realizes continuing synchronously of GPS/GALILEO signal by control capture engine (410) and tracking passage (411), and then obtains being used for the navigation message and the pseudo range measurement information of computed user locations;
Described interface control logic (425) is used to described flush bonding processor (424) to provide different access modes with the external piloting control processor that links to each other with described GPS/GALILEO navigation baseband processing chip;
Described flush bonding processor (424) is made up of steering logic (414), flush bonding processor nuclear (415), mathematical operation module (416) and dual port RAM (417);
Described flush bonding processor nuclear (415), be used for by disposing described capture engine (410) thus obtain GPS/GALILEO signal capture code phase and the drift of Doppler's carrier wave, it realizes the GPS/GALILEO signal is continued synchronously by the described tracking passage of control (411) then, and then obtain navigation message, read the pseudo range measurement information of described tracking passage (411) simultaneously, and the navigation message and the pseudo range measurement information that will be used for computed user locations deposit described dual port RAM (417) in;
Described mathematical operation module (416), it examines the accessory module of (415) as described flush bonding processor, be used for following the tracks of the passage control variable in according to described dual port RAM (417) and perform mathematical calculations, and then upgrade the inner controlled quentity controlled variable of described tracking passage (411) in signals tracking process;
Described steering logic (414) is used to control program loading, operation and the dormancy of described flush bonding processor nuclear (415), and the startup and the dormancy that are used to control described capture engine (410) and follow the tracks of passage (411);
Described dual port RAM (417), be used to described GPS/GALILEO navigation baseband processing chip to provide the interactive access passage with the external piloting control processor that links to each other with described GPS/GALILEO navigation baseband processing chip, storage simultaneously is used for the navigation message and the pseudo range measurement information of computed user locations.
7. navigation neceiver according to claim 6, it is characterized in that, described dual port RAM (417) stored capture engine (410) and follow the tracks of passage (411) overall control variable, capture engine control variable, follow the tracks of the passage control variable and resolve correlated variables.
8. navigation neceiver according to claim 6, it is characterized in that described interface control logic (425) comprises one or several in SPI interface (418), HPI interface (419), UART interface (420), IIC interface (421) and the BUS interface (422).
9. navigation neceiver according to claim 6, it is characterized in that described GPS/GALILEO navigation baseband processing chip (423) also comprises real-time clock generator (408), system clock generator (409), watchdog circuit (412) and system reset logic (413); Described real-time clock generator (408) is used to described GPS/GALILEO navigation baseband processing chip to carry out clock count; Described system clock generator (409) is used to produce the clock that inner each module of described GPS/GALILEO navigation baseband processing chip is used; Described watchdog circuit (412) is used to avoid the deadlock of chip; System reset logic (413) is used to inner each module of described GPS/GALILEO navigation baseband processing chip that reset signal is provided.
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