CN108020774B

CN108020774B - Method for removing layer of small sample

Info

Publication number: CN108020774B
Application number: CN201711234859.9A
Authority: CN
Inventors: 杨领叶
Original assignee: Shanghai Huali Microelectronics Corp
Current assignee: Shanghai Huali Microelectronics Corp
Priority date: 2017-11-30
Filing date: 2017-11-30
Publication date: 2020-03-20
Anticipated expiration: 2037-11-30
Also published as: CN108020774A

Abstract

The invention discloses a layer removing method of a small sample, which comprises the following steps: step 1, manufacturing a base chip; step 2, manufacturing a RIE barrier layer according to the size and the shape of the ground sample; step 3, bonding a barrier layer on the base chip according to the size and the shape of a grinding sample; step 4, manufacturing a mould capable of embedding the grinding sample on the product manufactured in the step 3; step 5, heating to remove the barrier layer; step 6, embedding the grinding sample into a mold; and 7, manually grinding the front surface of the sample to a target position. The invention can quickly and uniformly remove layers and stay in the area to be analyzed.

Description

Method for removing layer of small sample

Technical Field

The invention relates to the field of semiconductor integrated circuits, in particular to a method for removing layers of small samples in integrated circuit failure analysis.

Background

With the continuous development of the semiconductor industry and the continuous improvement of the technology, the chip size is continuously reduced, and the difficulty of failure analysis is more and more increased. Grinding and delamination are the foundation of failure analysis work and the key point, and the quality of the failure analysis work is directly influenced by the grinding and delamination effect of the sample. In the failure analysis process, when a specific point or a specific structure is to be analyzed, the layer is required to be removed to a specific position, and the surface is required to be even and flat. The manual grinding sample preparation is the most common layering removing means at present, and is characterized by simple operation and high sample preparation speed. But the smaller the sample size, the greater the gradient with grinding, the greater the difficulty. For small samples, such as those having dimensions less than 3mm by 3mm in length and width (the "+" indicates a multiple), because of the small sample size, it is not easy to hold the sample on the grinding plate during manual grinding, and the sample can only be kept grinding in one direction, resulting in uneven grinding. The power of the traditional manual grinding is almost zero.

On the other hand, the sample size is very little, and the finger is difficult to control the sample during manual grinding, and the sample can overturn on the abrasive disc often in the grinding process, and the abrasive disc that flies out even has greatly reduced work efficiency, in case the sample loses can directly lead to the system appearance to fail.

Disclosure of Invention

The invention aims to provide a method for removing layers of a small sample, which can quickly and uniformly remove layers and stay in an area to be analyzed.

In order to solve the technical problem, the method for removing the layer of the small sample comprises the following steps:

step 1, manufacturing a base chip;

step 2, manufacturing a barrier layer of RIE (reactive ion etching) according to the size and the shape of the ground sample;

step 3, bonding a barrier layer on the base chip according to the size and the shape of a grinding sample;

step 4, manufacturing a mould capable of embedding the grinding sample on the product manufactured in the step 3;

step 5, heating to remove the barrier layer;

step 6, embedding the grinding sample into a mold;

and 7, manually grinding the front surface of the sample to a target position.

The method for removing the layers of the small-size sample can quickly and uniformly remove the layers and stay in the area to be analyzed, solves the problems that the small-size sample is not easy to control in the layer removing process, the sample is overturned in the grinding process, the uniformity of the sample after grinding is poor and the like, and obviously improves the success rate of sample preparation.

Drawings

The invention will be described in further detail with reference to the following detailed description and accompanying drawings:

FIG. 1 is a schematic view of a submount chip (top view);

FIG. 2 is a schematic view (top view) of the barrier layer adhered to the base;

FIG. 3 is a schematic view (side view) of the barrier layer attached to the base;

FIG. 4 is a schematic view (top view) of a production mold;

FIG. 5 is a schematic view of a production mold (side view one);

FIG. 6 is a schematic view of the production mold (side view two);

FIG. 7 is a side view with the barrier layer removed;

FIG. 8 is a sample inserted into a mold (top view);

FIG. 9 is a sample inserted into a mold (side view);

fig. 10 is a layer-removal to a target layer (side view).

Detailed Description

The following is a specific example, which illustrates the implementation process of the layer removing method for the small sample in detail, and the specific steps are as follows:

step one, as shown in fig. 1, a base chip is manufactured. A waste chip with the length and width of about 0.8 cm-1.2 cm is cut from the waste chip and used as a base chip.

And step two, manufacturing a barrier layer. The RIE barrier layer is made according to the size and shape of the ground sample, and can be made of waste silicon wafers with the thickness higher than that of the sample.

And step three, as shown in the combined

drawings

2 and 3, adhering the barrier layer 1 on the base chip 3 by using a hot melt adhesive 2 according to the size and the shape of the ground sample.

And step four, manufacturing a mould on the product manufactured in the step three in combination with the steps shown in figures 4-6. By means of reactive ion etching, the conditions for etching the silicon are selected to form a hole 4 which penetrates the barrier layer and extends into the base chip. Meanwhile, the etching time is set according to the thickness of the sample, and the etched depth is larger than the thickness of the sample. Fig. 5 is a schematic diagram before reactive ion etching, fig. 6 is a schematic diagram before reactive ion etching, and it can be seen from fig. 6 that a hole 4 is formed on the base chip 3 through etching.

And step five, combining with the figure 7, heating to remove the barrier layer.

And step six, as shown in the combined drawings of fig. 8 and 9, embedding and bonding the grinding sample 5 in the die by using the hot melt adhesive 2.

Step seven, as shown in fig. 10, the front surface of the sample 5 is manually ground to the target position 6.

By small sample (i.e., small size sample) is meant a sample having a size of less than 3mm by 3mm in length and width.

For small-size samples, particularly when the area to be analyzed is at the edge of the sample, the method of the invention can be adopted, the RIE is used for manufacturing the die, and then the sample is embedded into the die, so that the size of the sample is increased, the observation area is moved to the center of the ground sample, the problems of sample overturning, poor uniformity of the ground sample and the like in the grinding process of the small-size sample are solved, and the success rate of sample preparation is obviously improved.

The present invention has been described in detail with reference to the specific embodiments, but these are not to be construed as limiting the invention. Many variations and modifications may be made by one of ordinary skill in the art without departing from the principles of the present invention, which should also be considered as within the scope of the present invention.

Claims

1. A method for delaminating a small sample, comprising the steps of:

step 1, manufacturing a base chip;

step 2, manufacturing a barrier layer for reactive ion etching according to the size and the shape of the ground sample;

step 5, heating to remove the barrier layer;

step 6, embedding the grinding sample into a mold;

and 7, manually grinding the front surface of the sample to a target position.

2. The method of claim 1, wherein: the base chip in the step 1 is used as a base chip by intercepting a waste chip with the length and width of 0.8 cm-1.2 cm.

3. The method of claim 1, wherein: and 2, manufacturing the barrier layer by using a waste silicon wafer with the thickness higher than that of the sample.

4. The method of claim 1, wherein: and 3, adhering the barrier layer on the base chip by using hot melt adhesive.

5. The method of claim 1, wherein: when the step 4 is implemented, reactive ion etching is utilized, and the condition of etching silicon is selected to form a hole which penetrates through the barrier layer and extends into the base chip; meanwhile, the etching time is set according to the thickness of the sample, and the depth of the etched hole is larger than the thickness of the sample.

6. The method of claim 1, wherein: step 6 is carried out by embedding and bonding the ground sample in a mold by using a hot melt adhesive.

7. The method of claim 1, wherein: the small sample, i.e. the small-sized sample, means that the size length and width of the sample are less than 3mm x 3mm, wherein "+" represents a multiplication sign.