CN108011005A - Light emitting semiconductor device and its manufacture method - Google Patents
Light emitting semiconductor device and its manufacture method Download PDFInfo
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- CN108011005A CN108011005A CN201711107833.8A CN201711107833A CN108011005A CN 108011005 A CN108011005 A CN 108011005A CN 201711107833 A CN201711107833 A CN 201711107833A CN 108011005 A CN108011005 A CN 108011005A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 203
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 23
- 238000000034 method Methods 0.000 title claims abstract description 21
- 239000000843 powder Substances 0.000 claims abstract description 182
- 239000000758 substrate Substances 0.000 claims abstract description 119
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 110
- 239000011521 glass Substances 0.000 claims description 28
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 24
- 239000000463 material Substances 0.000 claims description 23
- 239000007788 liquid Substances 0.000 claims description 20
- 239000011248 coating agent Substances 0.000 claims description 18
- 238000000576 coating method Methods 0.000 claims description 18
- 239000000741 silica gel Substances 0.000 claims description 18
- 229910002027 silica gel Inorganic materials 0.000 claims description 18
- 239000000976 ink Substances 0.000 claims description 15
- 238000009413 insulation Methods 0.000 claims description 15
- 239000011347 resin Substances 0.000 claims description 15
- 229920005989 resin Polymers 0.000 claims description 15
- 235000019353 potassium silicate Nutrition 0.000 claims description 12
- 229910052751 metal Inorganic materials 0.000 claims description 11
- 239000002184 metal Substances 0.000 claims description 11
- 229910045601 alloy Inorganic materials 0.000 claims description 10
- 239000000956 alloy Substances 0.000 claims description 10
- 239000002245 particle Substances 0.000 claims description 10
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 9
- 239000000428 dust Substances 0.000 claims description 9
- 150000004767 nitrides Chemical class 0.000 claims description 9
- 238000007639 printing Methods 0.000 claims description 9
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- 239000000919 ceramic Substances 0.000 claims description 8
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 8
- 229910052737 gold Inorganic materials 0.000 claims description 8
- 239000010931 gold Substances 0.000 claims description 8
- 239000002002 slurry Substances 0.000 claims description 8
- 230000007423 decrease Effects 0.000 claims description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 6
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 6
- 238000004528 spin coating Methods 0.000 claims description 5
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- 230000008020 evaporation Effects 0.000 claims description 4
- 238000001704 evaporation Methods 0.000 claims description 4
- 239000012528 membrane Substances 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- 239000010936 titanium Substances 0.000 claims description 4
- 229910017083 AlN Inorganic materials 0.000 claims description 3
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 claims description 3
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- 239000004411 aluminium Substances 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- 239000011787 zinc oxide Substances 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims 1
- 239000012774 insulation material Substances 0.000 claims 1
- 239000001301 oxygen Substances 0.000 claims 1
- 229910052760 oxygen Inorganic materials 0.000 claims 1
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- 238000004020 luminiscence type Methods 0.000 abstract description 14
- 241000209094 Oryza Species 0.000 description 6
- 235000007164 Oryza sativa Nutrition 0.000 description 6
- 235000009566 rice Nutrition 0.000 description 6
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- 238000005658 halogenation reaction Methods 0.000 description 4
- 238000005286 illumination Methods 0.000 description 4
- 239000003963 antioxidant agent Substances 0.000 description 3
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- 235000006708 antioxidants Nutrition 0.000 description 3
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- 239000004020 conductor Substances 0.000 description 3
- UCKMPCXJQFINFW-UHFFFAOYSA-N Sulphide Chemical compound [S-2] UCKMPCXJQFINFW-UHFFFAOYSA-N 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 230000005496 eutectics Effects 0.000 description 2
- 230000004313 glare Effects 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 238000005987 sulfurization reaction Methods 0.000 description 2
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 1
- 235000013339 cereals Nutrition 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
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- 238000005516 engineering process Methods 0.000 description 1
- 150000004820 halides Chemical class 0.000 description 1
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- 230000003287 optical effect Effects 0.000 description 1
- 230000035699 permeability Effects 0.000 description 1
- 229910052573 porcelain Inorganic materials 0.000 description 1
- 229910052717 sulfur Inorganic materials 0.000 description 1
- 239000011593 sulfur Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/50—Wavelength conversion elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Abstract
The invention discloses a kind of light emitting semiconductor device and its manufacture method, light emitting semiconductor device includes substrate, at least positive terminal pad being disposed on the substrate and an at least negative terminal pad, at least semiconductor luminescence chip being disposed on the substrate, the phosphor powder layer for being disposed on the substrate and wrapping up semiconductor luminous chip and the insulating layer being arranged on the inside of phosphor powder layer；The cathode and anode of semiconductor luminous chip are electrically connected with positive terminal pad and negative terminal pad respectively；Insulating layer be located at the part or all of and substrate surface of phosphor powder layer inner surface it is part or all of between；And/or positioned at the part or all of and semiconductor luminous chip side of phosphor powder layer inner surface it is part or all of between.The light emitting semiconductor device of the present invention, semiconductor luminous chip side is blocked by setting structure layer, prevent semiconductor luminous chip side light extraction, strengthen the positive light extraction of semiconductor luminous chip, suitable for preparing the illuminator that central light strength requirement is high, light emitting angle requirement is small.
Description
Technical field
The present invention relates to technical field of semiconductor luminescence, more particularly to a kind of light emitting semiconductor device and its manufacturer
Method.
Background technology
With luminous efficiency lifting and manufacture cost decline, semiconductor light emitting light source be widely used in backlight,
The field such as display and illumination.Semiconductor light emitting light source includes the polytypes such as LED, COB, module, lamp plate, lamp bar.Soon
Future, semiconductor light emitting light source be possible to substitute conventional light source become general lighting principal light source.
Common semiconductor light emitting light source (light emitting semiconductor device) structure is as shown in Figure 1, it includes substrate 1, is arranged on
Phosphor powder layer 2, semiconductor luminous chip 3, chip cathode 4a and chip anode 4b, positive terminal pad 5a and negative terminal pad on substrate
5b, anode bonding pad 6a, anode weld pad 6b and heat conduction weld pad 7；Phosphor powder layer 2 covers semiconductor luminous chip 3, core on substrate 1
Piece cathode 4a is electrically connected with positive terminal pad 5a, and chip anode 4b is electrically connected with negative terminal pad 5b, anode bonding pad 6a and anode weld pad
6b connects positive terminal pad 5a and negative terminal pad 5b respectively.
Existing semiconductor light emitting light-source structure understands that semiconductor luminous chip 3 often has certain thickness as shown in Figure 1
Spend (100-150 microns), after phosphor powder layer 2 has been wrapped up, its light-emitting surface not only includes front, further comprises side, side
Face amount of light can account for the 10-30% of total amount of light, and light emitting angle is more than 150 degree.For wanting centering illumination and small light emitting anger
The application scenario of degree, side light extraction not only influence front amount of light, and side light extraction can become veiling glare, influence the light shape of face to be illuminated
Or glare is serious.
In semiconductor light emitting light source, generally basic material of the silica gel as phosphor powder layer is used.Since silica gel has one
Determine gas permeability, aqueous vapor, sulfide, halide in environment etc. all can enter semiconductor light emitting by the phosphor powder layer of silica gel base
Chip surface, substrate surface and semiconductor luminous chip and substrate weld, this can cause surface sulfide and halogenation, produce serious
Light decay, or even failure.
Therefore, because above-mentioned semiconductor light emitting light-source structure has the defects of essence and deficiency, semiconductor hair can not be solved
Optical device front light intensity and small light emitting angle problem, prepared light emitting semiconductor device, particularly uses in the presence of a harsh environment
When, there are short life, the problems such as decay is fast, poor reliability.
The content of the invention
The technical problem to be solved in the present invention is, there is provided a kind of to realize small light emitting angle, strengthen partly leading for central light strength
Body luminescent device and its manufacture method.
The technical solution adopted by the present invention to solve the technical problems is：A kind of light emitting semiconductor device, including base are provided
Plate, set at least one positive terminal pad on the substrate and at least one negative terminal pad, set on the substrate extremely
A few semiconductor luminous chip, the phosphor powder layer for setting on the substrate and wrapping up the semiconductor luminous chip and
The insulating layer being arranged on the inside of the phosphor powder layer；The cathode and anode of the semiconductor luminous chip are welded with the cathode respectively
Disk and negative terminal pad are electrically connected；
The insulating layer is located at the part or all of and part of the substrate surface or complete of the phosphor powder layer inner surface
Between portion；And/or the insulating layer is located at the part or all of and semiconductor luminous chip of the phosphor powder layer inner surface
Side it is part or all of between.
Preferably, the height of the insulating layer is Zi closing on one end of the semiconductor luminous chip side to away from described half
The other end of conductor luminescence chip side gradually successively decreases.
Preferably, the material of the insulating layer is included one in silica gel, resin, glass glaze, liquid glass, ink and coating
Kind or multiple combinations.
Preferably, the material of the insulating layer is also mixed with inorganic powder；The inorganic powder includes micron, sub-micron, receives
One or more in the glass dust in grain of rice footpath, ceramic powder, metal powder, alloyed powder, oxidate powder and nitride powder.
Preferably, the material of the phosphor powder layer include silica gel, resin, glass glaze, ink and coating in one kind or
Multiple combinations, and mixed with one or more fluorescent powders.
Preferably, the light emitting semiconductor device further includes at least light shield layer being arranged on the phosphor powder layer；Institute
Light shield layer is stated equipped with least one opening, exposes the part phosphor powder layer.
Preferably, the material of the light shield layer includes aluminium and its alloy, gold and its closes gold, silver and its alloy, nickel and its conjunction
Gold, titanium and its alloy, glass glaze, ink, liquid glass, coating, titanium oxide, zinc oxide, silica, aluminium nitride, silicon nitride with
And one or more combinations in aluminium oxide.
Preferably, the material of the light shield layer is included in silica gel, resin, liquid glass, glass glaze, ink and coating
One or more combination, and mixed with inorganic powder；The inorganic powder includes micron, sub-micron, the glass dust of nanometer particle size, pottery
One or more combinations in porcelain powder, metal powder, alloyed powder, oxidate powder and nitride powder.
The present invention also provides a kind of manufacture method of light emitting semiconductor device, comprise the following steps：
S1, prepare positive terminal pad and negative terminal pad on substrate；
Semiconductor luminous chip, be fixed on the substrate surface by S2, and by the cathode of the semiconductor luminous chip
It is electrically connected respectively with the positive terminal pad and negative terminal pad with anode；
S3, the feed liquid that insulate is arranged on the substrate surface it is part or all of on, and/or the semiconductor luminous chip
Side it is part or all of on, formed insulating layer；
S4, the exposed surface that fluorescence feed liquid is arranged on to the semiconductor luminous chip and exposed sides it is part or all of
Upper and described surface of insulating layer it is part or all of on, form the phosphor powder layer for wrapping up the semiconductor luminous chip；
The insulating layer is located at the part or all of and part of the phosphor powder layer inner surface or complete of the substrate surface
Between portion；And/or positioned at the part or all of and part of the phosphor powder layer inner surface of the semiconductor luminous chip side
Or between whole.
Preferably, in step S3, the insulating layer passes through one in spraying, dispensing, spin coating, printing for the insulation feed liquid
Kind or various ways are formed；The insulation feed liquid is insulation glue or insulation slurries；
In step S4, the phosphor powder layer for the fluorescence feed liquid by spraying, being molded, membrane pressure, dispensing, evaporation, printing
In one or more modes formed；The fluorescence feed liquid is fluorescence glue or phosphor slurry.
Preferably, the manufacture method is further comprising the steps of：
S5, reserve aperture position on the phosphor powder layer, and on the phosphor powder layer surface outside aperture position
Light shield layer is set, and the aperture position forms the opening of the light shield layer, exposes the part phosphor powder layer.
Beneficial effects of the present invention：The light emitting semiconductor device of the present invention, it is simple in structure, half-and-half led by setting structure layer
Body luminescence chip side is blocked, and is prevented semiconductor luminous chip side light extraction, is avoided yellow circle, strengthen semiconductor luminous chip
Positive light extraction, has the advantages that light emitting angle is small, light-emitting area is concentrated, antidamping ability is strong, suitable for preparing central light strength requirement
Height, light emitting angle require small lighting bulb or illuminator.
The manufacture method of the light emitting semiconductor device of the present invention, flow is short, technique is simple, manufacture cost is low, suitable for big
Batch large area industrialization production.
Brief description of the drawings
Below in conjunction with accompanying drawings and embodiments, the invention will be further described, in attached drawing：
Fig. 1 is the structure diagram of semiconductor light emitting light source in the prior art；
Fig. 2 is the structure diagram of the light emitting semiconductor device of first embodiment of the invention；
Fig. 3 is the structure diagram of the light emitting semiconductor device of second embodiment of the invention；
Fig. 4 is the structure diagram of the light emitting semiconductor device of third embodiment of the invention；
Fig. 5 is the structure diagram of the light emitting semiconductor device of fourth embodiment of the invention.
Embodiment
In order to which the technical features, objects and effects of the present invention are more clearly understood, now compare attached drawing and describe in detail
The embodiment of the present invention.
As shown in Fig. 2, the light emitting semiconductor device of first embodiment of the invention, including substrate 10, setting are on the substrate 10
At least one positive terminal pad 21 and at least one negative terminal pad 22, at least one semiconductor light emitting core on the substrate 10 is set
Piece 30, set on the substrate 10 and wrap up the phosphor powder layer 40 of semiconductor luminous chip 30 and be arranged in phosphor powder layer 40
The insulating layer 50 of side (towards the side of substrate 10 and semiconductor luminous chip 30)；The cathode 31 of semiconductor luminous chip 30 and negative
Pole 32 is electrically connected with positive terminal pad 21 and negative terminal pad 22 respectively.Insulating layer 50 is located at the part or complete of 40 inner surface of phosphor powder layer
10 surface of portion and substrate it is part or all of between；And/or insulating layer 50 is located at the part or all of of 40 inner surface of phosphor powder layer
With 30 side of semiconductor luminous chip it is part or all of between.
Wherein, substrate 10 has opposite first surface and second surface, positive terminal pad 21, negative terminal pad 22, semiconductor
Luminescence chip 30 is optionally arranged on first surface and/or second surface；Between positive terminal pad 21 and negative terminal pad 22
Mutually insulate.In the present embodiment, a semiconductor luminous chip 30 is set on substrate 10；Positive terminal pad 21, negative terminal pad 22, partly lead
Body luminescence chip 30 is arranged on the first surface of substrate 10.
Phosphor powder layer 40 wraps up the surface and side of the remote substrate 10 of semiconductor luminous chip 30.Phosphor powder layer 40
Structure sheaf is unlimited, can be single or multiple lift.The material of phosphor powder layer 40 include but not limited to silica gel, resin, glass glaze, ink with
And one or more combinations in coating, and mixed with one or more fluorescent powders.
Setting of the insulating layer 50 on the inside of phosphor powder layer 40, makes it be covered in the lower section of phosphor powder layer 40, mainly for hiding
The side of semiconductor luminous chip 30 is kept off, 30 side light extraction of semiconductor luminous chip is prevented, goes out luminous intensity to strengthen its surface.One
In a selectivity embodiment, insulating layer 50 is 10 surface of substrate (10 surface of substrate where semiconductor luminous chip 30) and glimmering
Setting between light bisque 40 so that insulating layer 50 is located at the side of semiconductor luminous chip 30 under phosphor powder layer 40, right
Blocked side.In another selective embodiment, insulating layer 50 is in 30 side of semiconductor luminous chip and fluorescent powder
Setting between layer 40 so that insulating layer 50 is blocked in the side of semiconductor luminous chip 30.
By setting of the insulating layer 50 in its side on semiconductor luminous chip 30, make its side not as light-emitting surface, and
Surface away from substrate 10 forms light-emitting surface, and light emitting angle is small, improves 30 front amount of light of semiconductor luminous chip, is applicable to
The application scenario of centering illumination and small light emitting angle.
In the present embodiment, as shown in Fig. 2, insulating layer 50 is arranged on the side of semiconductor luminous chip 30 and extends to substrate
On 10 surface, the height of insulating layer 50 is Zi closing on one end of 30 side of semiconductor luminous chip to away from semiconductor luminous chip
The other end of 30 sides gradually successively decreases.The maximum height of insulating layer 50 is not higher than the apparent height of semiconductor luminous chip 30 (i.e.
Also it is not higher than the profile height of semiconductor luminous chip 30).
Phosphor powder layer 40 covers the surface and side of semiconductor luminous chip 30, and insulating layer 50 is coated wherein so that
Insulating layer 50 is located between the side of semiconductor luminous chip 30,10 surface of substrate (first surface) and phosphor powder layer 40.Wherein,
The part that phosphor powder layer 40 covers insulating layer 50 extends along 50 surface of insulating layer so that phosphor powder layer 40 can be from semiconductor light emitting
30 surface bending of chip is extended on the insulating layer 50 of side.The bending of phosphor powder layer 40 has blocked its side light guide effect, increases
Strong center light intensity.
The material of insulating layer 50 includes but not limited to one in silica gel, resin, glass glaze, liquid glass, ink and coating
Kind or multiple combinations.As needed, further can be mixed with inorganic powder in insulating layer 50；Inorganic powder includes glass dust, ceramics
One or more in powder, metal powder, alloyed powder, oxidate powder and nitride powder, the particle diameter of above-mentioned powder can be micron, sub-micro
One or more in rice and nanometer particle size.Insulating layer 50 can be according to need such as required sulfuration resistant, anti-halogenation, anti-oxidant and anti-moistures
Seek the corresponding powder of addition.
Further, light emitting semiconductor device further includes the anode bonding pad 23 and anode weld pad 24 set on the substrate 10；
Mutually insulate between anode bonding pad 23 and anode weld pad 24.Anode bonding pad 23 is electrically connected with positive terminal pad 21, and anode weld pad 24 is with bearing
Pole pad 22 is electrically connected.
Specifically, in the present embodiment, anode bonding pad 23 and anode weld pad 24 are arranged on the second surface of substrate 10；Cathode
Weld pad 23 is electrically connected by the first conductive column 231 with positive terminal pad 21, and anode weld pad 24 is welded by the second conductive column 241 with anode
Disk 22 is electrically connected.First conductive column 231 can run through substrate 10 and connect positive terminal pad 21 and anode bonding pad 23, or be arranged on substrate
10 side connection positive terminal pad 21 and anode bonding pad 23.Second conductive column 241 can run through substrate 10 and connect 22 He of negative terminal pad
Anode weld pad 24, or it is arranged on the side connection negative terminal pad 22 and anode weld pad 24 of substrate 10.
Heat conduction weld pad 25 further can be also set on substrate 10, can be connected with radiator.
With reference to figure 2, the manufacture method of the light emitting semiconductor device of first embodiment of the invention, including at least following steps：
S1, prepare positive terminal pad 21 and negative terminal pad 22 on the substrate 10, also prepares anode bonding pad 23 and anode weld pad 24.
Substrate 10 has opposite a first surface and second surface, positive terminal pad 21 be located at substrate 10 first surface and/
Or on second surface, negative terminal pad 22 is located on the first surface and/or second surface of substrate 10.
Anode bonding pad 23 is electrically connected with positive terminal pad 21, anode weld pad 24 is electrically connected with negative terminal pad 22.Anode bonding pad
23 can be located on 10 identical or different surface of substrate with positive terminal pad 21, both can be electrically connected by the first conductive column 231；Anode
Weld pad 24 can be located on 10 identical or different surface of substrate with negative terminal pad 22, both can be electrically connected by the second conductive column 241.
S2, fix semiconductor luminous chip 30 on the surface of the substrate 10, and by the cathode 31 of semiconductor luminous chip 30
It is electrically connected with positive terminal pad 21, the anode 32 and negative terminal pad 22 of semiconductor luminous chip 30 are electrically connected.
In the present embodiment, semiconductor luminous chip 30 is fixed on the first surface of substrate 10.
The cathode 31 of semiconductor luminous chip 30 and the connection mode of positive terminal pad 21, anode 32 and the company of negative terminal pad 22
The mode of connecing includes but not limited to one or more groups in eutectic welding, bonding, reflow soldering, ultra-sonic welded, metal wire interconnection
Close.
S3, the feed liquid that insulate is arranged on 10 surface of substrate it is part or all of on, and/or 30 side of semiconductor luminous chip
It is part or all of on, formed insulating layer 50.
When preparing insulation feed liquid, material use it is a kind of in silica gel, resin, glass glaze, liquid glass, ink and coating or
Multiple combinations, and insulation glue or insulation slurries mixed with or without inorganic powder are made as needed；Inorganic powder includes micro-
Rice, the glass dust of sub-micron and nanometer particle size, ceramic powder, metal powder, alloyed powder, oxidate powder and one kind in nitride powder or
It is a variety of.
The generation type of insulating layer 50 includes but not limited to the one or more in spraying, dispensing, spin coating, printing.
S4, the exposed surface that fluorescence feed liquid is arranged on to semiconductor luminous chip 30 and exposed sides it is part or all of
It is upper and 50 surface of insulating layer it is part or all of on, form the phosphor powder layer 40 of parcel semiconductor luminous chip 30.Insulating layer
50 positioned at 40 inner surface of phosphor powder layer 10 surface of part or all of and substrate it is part or all of between；And/or insulating layer 50
Positioned at 30 side of part or all of and semiconductor luminous chip of 40 inner surface of phosphor powder layer it is part or all of between.
When preparing fluorescence feed liquid, material uses one or more combinations in silica gel, resin, glass glaze, ink and coating,
The fluorescence glue or phosphor slurry mixed with one or more fluorescent powders is made.The generation type of phosphor powder layer 40 includes but not limited to
One or more in spraying, molding, membrane pressure, dispensing, evaporation, printing.
When step S4 is carried out, substrate 10 can be heated as needed, beneficial to the parcel of phosphor powder layer 40.Certainly, base
Plate 10 can not also heat.
With reference to Fig. 2, in the manufacture method of the present embodiment, insulating layer 50 is arranged on to the side of semiconductor luminous chip 30,
And extend on 10 first surface of substrate；The height of insulating layer 50 is Zi closing on one end of 30 side of semiconductor luminous chip to remote
The other end of 30 side of semiconductor luminous chip gradually successively decreases.Phosphor powder layer 40 is arranged on insulating layer 50 and semiconductor light emitting core
On piece 30, semiconductor luminous chip 30 and insulating layer 50 are wrapped up wherein.
As shown in figure 3, the light emitting semiconductor device of second embodiment of the invention, including substrate 10, setting are on the substrate 10
At least one positive terminal pad 21 and at least one negative terminal pad 22, at least one semiconductor light emitting core on the substrate 10 is set
Piece 30, set on the substrate 10 and wrap up the phosphor powder layer 40 of semiconductor luminous chip 30, be arranged on the inner side of phosphor powder layer 40 (court
To the side of substrate 10 and semiconductor luminous chip 30) insulating layer 50 and be arranged on phosphor powder layer 40 at least one hide
Photosphere 60.
The cathode 31 and anode 32 of semiconductor luminous chip 30 are electrically connected with positive terminal pad 21 and negative terminal pad 22 respectively.Absolutely
Edge layer 50 be located at 10 surface of part or all of and substrate of 40 inner surface of phosphor powder layer it is part or all of between；And/or insulation
Layer 50 positioned at 40 inner surface of phosphor powder layer 30 side of part or all of and semiconductor luminous chip it is part or all of between.Hide
Photosphere 60 exposes part phosphor powder layer 40 equipped with least one opening.
Wherein, substrate 10 has opposite first surface and second surface, positive terminal pad 21, negative terminal pad 22, semiconductor
Luminescence chip 30 is optionally arranged on first surface and/or second surface；Between positive terminal pad 21 and negative terminal pad 22
Mutually insulate.In the present embodiment, a semiconductor luminous chip 30 is set on substrate 10；Positive terminal pad 21, negative terminal pad 22, partly lead
Body luminescence chip 30 is arranged on the first surface of substrate 10.
Phosphor powder layer 40 wraps up the surface and side of the remote substrate 10 of semiconductor luminous chip 30.Phosphor powder layer 40
Structure sheaf is unlimited, can be single or multiple lift.The material of phosphor powder layer 40 include but not limited to silica gel, resin, glass glaze, ink with
And one or more combinations in coating, and mixed with one or more fluorescent powders.
Setting of the insulating layer 50 on the inside of phosphor powder layer 40, makes it be covered in the lower section of phosphor powder layer 40, mainly for hiding
The side of semiconductor luminous chip 30 is kept off, 30 side light extraction of semiconductor luminous chip is prevented, goes out luminous intensity to strengthen its surface.One
In a selectivity embodiment, insulating layer 50 is 10 surface of substrate (10 surface of substrate where semiconductor luminous chip 30) and glimmering
Setting between light bisque 40 so that insulating layer 50 is located at the side of semiconductor luminous chip 30 under phosphor powder layer 40, right
Blocked side.In another selective embodiment, insulating layer 50 is in 30 side of semiconductor luminous chip and fluorescent powder
Setting between layer 40 so that insulating layer 50 is blocked in the side of semiconductor luminous chip 30.
By setting of the insulating layer 50 in its side on semiconductor luminous chip 30, make its side not as light-emitting surface, and
Surface away from substrate 10 forms light-emitting surface, and light emitting angle is small, improves 30 front amount of light of semiconductor luminous chip, is applicable to
The application scenario of centering illumination and small light emitting angle.
In the present embodiment, as shown in figure 3, insulating layer 50 is arranged on the side of semiconductor luminous chip 30 and extends to substrate
On 10 surface.The height of insulating layer 50 can be certainly closing on one end of 30 side of semiconductor luminous chip to away from semiconductor light emitting
The other end of 30 side of chip gradually successively decreases, and insulating layer 50 can also be contour structure sheaf；Whole height is not higher than semiconductor
The apparent height of luminescence chip 30.
Phosphor powder layer 40 covers the surface and side of semiconductor luminous chip 30, and insulating layer 50 is coated wherein so that
Insulating layer 50 is located between the side of semiconductor luminous chip 30,10 surface of substrate (first surface) and phosphor powder layer 40.Wherein,
The part that phosphor powder layer 40 covers insulating layer 50 extends along 50 surface of insulating layer so that phosphor powder layer 40 can be from semiconductor light emitting
30 surface bending of chip is extended on the insulating layer 50 of side.The bending of phosphor powder layer 40 has blocked its side light guide effect, increases
Strong center light intensity.
The material of insulating layer 50 includes but not limited to one in silica gel, resin, glass glaze, liquid glass, ink and coating
Kind or multiple combinations.As needed, further can be mixed with inorganic powder in insulating layer 50；Inorganic powder includes glass dust, ceramics
One or more in powder, metal powder, alloyed powder, oxidate powder and nitride powder, the particle diameter of above-mentioned powder can be micron, sub-micro
One or more in rice and nanometer particle size.Insulating layer 50 can be according to need such as required sulfuration resistant, anti-halogenation, anti-oxidant and anti-moistures
Seek the corresponding powder of addition.
Setting of the light shield layer 60 on phosphor powder layer 40, further blocks the side of semiconductor luminous chip 30.
The opening of light shield layer 60 does not influence the surface light extraction of semiconductor luminous chip 30 on the surface of semiconductor luminous chip 30.
Big I area of light extraction according to needed for 30 surface of semiconductor luminous chip of opening is configured.
The material of light shield layer 60 includes but not limited to aluminium and its alloy, gold and its closes gold, silver and its alloy, nickel and its conjunction
Gold, titanium and its alloy, glass glaze, ink, liquid glass, coating, titanium oxide, zinc oxide, silica, aluminium nitride, silicon nitride with
And one or more combinations in aluminium oxide etc..Alternatively, the material of light shield layer 60 includes but not limited to silica gel, resin, liquid glass
One or more combinations in glass, glass glaze, ink and coating, and mixed with inorganic powder；Inorganic powder includes micron, sub-micro
One or more groups in rice, the glass dust of nanometer particle size, ceramic powder, metal powder, alloyed powder, oxidate powder and nitride powder
Close.
The setting of light shield layer 60 plays the role of also having insulating effect while anti-sidelight, it can also be according to required sulfur resistive
The demands such as change, anti-halogenation, anti-oxidant and anti-moisture add corresponding powder.
Further, light emitting semiconductor device further includes the anode bonding pad 23 and anode weld pad 24 set on the substrate 10；
Mutually insulate between anode bonding pad 23 and anode weld pad 24.Anode bonding pad 23 is electrically connected with positive terminal pad 21, and anode weld pad 24 is with bearing
Pole pad 22 is electrically connected.
Specifically, in the present embodiment, anode bonding pad 23 and anode weld pad 24 are arranged on the second surface of substrate 10；Cathode
Weld pad 23 is electrically connected by the first conductive column 231 with positive terminal pad 21, and anode weld pad 24 is welded by the second conductive column 241 with anode
Disk 22 is electrically connected.First conductive column 231 can run through substrate 10 and connect positive terminal pad 21 and anode bonding pad 23, or be arranged on substrate
10 side connection positive terminal pad 21 and anode bonding pad 23.Second conductive column 241 can run through substrate 10 and connect 22 He of negative terminal pad
Anode weld pad 24, or it is arranged on the side connection negative terminal pad 22 and anode weld pad 24 of substrate 10.
Heat conduction weld pad 25 further can be also set on substrate 10, can be connected with radiator.
With reference to figure 3, the manufacture method of the light emitting semiconductor device of second embodiment of the invention, including at least following steps：
S1, prepare positive terminal pad 21 and negative terminal pad 22 on the substrate 10, also prepares anode bonding pad 23 and anode weld pad 24.
Substrate 10 has opposite a first surface and second surface, positive terminal pad 21 be located at substrate 10 first surface and/
Or on second surface, negative terminal pad 22 is located on the first surface and/or second surface of substrate 10.
Anode bonding pad 23 is electrically connected with positive terminal pad 21, anode weld pad 24 is electrically connected with negative terminal pad 22.Anode bonding pad
23 can be located on 10 identical or different surface of substrate with positive terminal pad 21, both can be electrically connected by the first conductive column 231；Anode
Weld pad 24 can be located on 10 identical or different surface of substrate with negative terminal pad 22, both can be electrically connected by the second conductive column 241.
S2, fix semiconductor luminous chip 30 on the surface of the substrate 10, and by the cathode 31 of semiconductor luminous chip 30
It is electrically connected with positive terminal pad 21, the anode 32 and negative terminal pad 22 of semiconductor luminous chip 30 are electrically connected.
In the present embodiment, semiconductor luminous chip 30 is fixed on the first surface of substrate 10.
The cathode 31 of semiconductor luminous chip 30 and the connection mode of positive terminal pad 21, anode 32 and the company of negative terminal pad 22
The mode of connecing includes but not limited to one or more groups in eutectic welding, bonding, reflow soldering, ultra-sonic welded, metal wire interconnection
Close.
S3, the feed liquid that insulate is arranged on 10 surface of substrate it is part or all of on, and/or 30 side of semiconductor luminous chip
It is part or all of on, formed insulating layer 50.
When preparing insulation feed liquid, material use it is a kind of in silica gel, resin, glass glaze, liquid glass, ink and coating or
Multiple combinations, and insulation glue or insulation slurries mixed with or without inorganic powder are made as needed；Inorganic powder includes micro-
Rice, the glass dust of sub-micron and nanometer particle size, ceramic powder, metal powder, alloyed powder, oxidate powder and one kind in nitride powder or
It is a variety of.
The generation type of insulating layer 50 includes but not limited to the one or more in spraying, dispensing, spin coating, printing.
S4, the exposed surface that fluorescence feed liquid is arranged on to semiconductor luminous chip 30 and exposed sides it is part or all of
It is upper and 50 surface of insulating layer it is part or all of on, form the phosphor powder layer 40 of parcel semiconductor luminous chip 30.Insulating layer
50 positioned at 40 inner surface of phosphor powder layer 10 surface of part or all of and substrate it is part or all of between；And/or insulating layer 50
Positioned at 30 side of part or all of and semiconductor luminous chip of 40 inner surface of phosphor powder layer it is part or all of between.
When preparing fluorescence feed liquid, material uses one or more combinations in silica gel, resin, glass glaze, ink and coating,
The fluorescence glue or phosphor slurry mixed with one or more fluorescent powders is made.The generation type of phosphor powder layer 40 includes but not limited to
One or more in spraying, molding, membrane pressure, dispensing, evaporation, printing.
When step S4 is carried out, substrate 10 can be heated as needed, beneficial to the parcel of phosphor powder layer 40.Certainly, base
Plate 10 can not also heat.
In the manufacture method of the present embodiment, insulating layer 50 is arranged on to the side of semiconductor luminous chip 30, and is extended to
On 10 first surface of substrate；The height of insulating layer 50 can partly be led certainly the one end for closing on 30 side of semiconductor luminous chip to remote
The other end of 30 side of body luminescence chip gradually successively decreases, and insulating layer 50 can also be contour structure sheaf；Whole height is not higher than
The apparent height of semiconductor luminous chip 30.
Phosphor powder layer 40 is arranged on insulating layer 50 and semiconductor luminous chip 30, by semiconductor luminous chip 30 and absolutely
Edge layer 50 is wrapped up wherein.
S5, reserve aperture position on phosphor powder layer 40, and is set on 40 surface of phosphor powder layer outside aperture position
Light shield layer 60, aperture position form the opening 61 of light shield layer 60, expose part phosphor powder layer 40.
Wherein, light shield layer 60 by being deposited, spraying, spin coating, printing, one or more modes in dispensing are formed.Opening
Position correspondence, so as to be open 61 on 30 surface of semiconductor luminous chip, makes in the surface of semiconductor luminous chip 30
The surface forms light-emitting surface；Light shield layer 60 then blocks its side on semiconductor luminous chip 30, prevents side light extraction.
As shown in figure 4, the light emitting semiconductor device of third embodiment of the invention, including substrate 10, setting are on the substrate 10
At least one positive terminal pad 21 and at least one negative terminal pad 22, at least one semiconductor light emitting core on the substrate 10 is set
Piece 30, set on the substrate 10 and wrap up the phosphor powder layer 40 of semiconductor luminous chip 30 and be arranged in phosphor powder layer 40
The insulating layer 50 of side (towards the side of substrate 10 and semiconductor luminous chip 30)；The cathode 31 of semiconductor luminous chip 30 and negative
Pole 32 is electrically connected with positive terminal pad 21 and negative terminal pad 22 respectively.Insulating layer 50 is located at the part or complete of 40 inner surface of phosphor powder layer
10 surface of portion and substrate it is part or all of between；And/or insulating layer 50 is located at the part or all of of 40 inner surface of phosphor powder layer
With 30 side of semiconductor luminous chip it is part or all of between.
Wherein, substrate 10 has opposite first surface and second surface, positive terminal pad 21, negative terminal pad 22, semiconductor
Luminescence chip 30 is optionally arranged on first surface and/or second surface；Between positive terminal pad 21 and negative terminal pad 22
Mutually insulate.In the present embodiment, on substrate 10 set two (or more) semiconductor luminous chip 30；Positive terminal pad 21, anode weldering
Disk 22, semiconductor luminous chip 30 are arranged on the first surface of substrate 10.
Light emitting semiconductor device further includes the anode bonding pad 23 and anode weld pad 24 set on the substrate 10；Anode bonding pad 23
Mutually insulate between anode weld pad 24.Anode bonding pad 23 is electrically connected with positive terminal pad 21, anode weld pad 24 and the electricity of negative terminal pad 22
Connection.In the present embodiment, anode bonding pad 23 and anode weld pad 24 are respectively positioned at opposite two of two semiconductor luminous chips 30
Side, and be separately positioned in positive terminal pad 21 and negative terminal pad 22, realize and be electrically connected.
Conducting channel 26 is equipped between the opposite both sides of two semiconductor luminous chips 30, conducting channel 26 is arranged on substrate
10, and cathode 31 corresponding with two semiconductor luminous chips 30 and anode 32 are electrically connected.
Phosphor powder layer 40 wraps up the surface and side of the remote substrate 10 of semiconductor luminous chip 30.Insulating layer 50 is glimmering
The setting of the inner side of light bisque 40, makes it be covered in the lower section of phosphor powder layer 40, mainly for blocking semiconductor luminous chip 30
Side, prevents 30 side light extraction of semiconductor luminous chip, goes out luminous intensity to strengthen its surface.
Further, in the present embodiment, the phosphor powder layer 40 on each semiconductor luminous chip 30 can be separate,
It is not attached to；Alternatively, the phosphor powder layer 40 on two adjacent semiconductor luminous chips 30 is connected as one.Adjacent two and half
The insulating layer 50 of conductor luminescence chip 30 is also connectable to form one.
The setting of insulating layer 50 and phosphor powder layer 40 and material selection etc. refer to related institute in above-mentioned first embodiment
State, details are not described herein.
As shown in figure 5, the light emitting semiconductor device of fourth embodiment of the invention, including substrate 10, setting are on the substrate 10
At least one positive terminal pad 21 and at least one negative terminal pad 22, at least one semiconductor light emitting core on the substrate 10 is set
Piece 30, set on the substrate 10 and wrap up the phosphor powder layer 40 of semiconductor luminous chip 30, be arranged on the inner side of phosphor powder layer 40 (court
To the side of substrate 10 and semiconductor luminous chip 30) insulating layer 50 and be arranged on phosphor powder layer 40 at least one hide
Photosphere 60.
The cathode 31 and anode 32 of semiconductor luminous chip 30 are electrically connected with positive terminal pad 21 and negative terminal pad 22 respectively.Absolutely
Edge layer 50 be located at 10 surface of part or all of and substrate of 40 inner surface of phosphor powder layer it is part or all of between；And/or insulation
Layer 50 positioned at 40 inner surface of phosphor powder layer 30 side of part or all of and semiconductor luminous chip it is part or all of between.Hide
Photosphere 60 exposes part phosphor powder layer 40 equipped with least one opening.
Wherein, substrate 10 has opposite first surface and second surface, positive terminal pad 21, negative terminal pad 22, semiconductor
Luminescence chip 30 is optionally arranged on first surface and/or second surface；Between positive terminal pad 21 and negative terminal pad 22
Mutually insulate.In the present embodiment, on substrate 10 set two (or more) semiconductor luminous chip 30；Positive terminal pad 21, anode weldering
Disk 22, semiconductor luminous chip 30 are arranged on the first surface of substrate 10.
Light emitting semiconductor device further includes the anode bonding pad 23 and anode weld pad 24 set on the substrate 10；Anode bonding pad 23
Mutually insulate between anode weld pad 24.Anode bonding pad 23 is electrically connected with positive terminal pad 21, anode weld pad 24 and the electricity of negative terminal pad 22
Connection.In the present embodiment, anode bonding pad 23 and anode weld pad 24 are respectively positioned at opposite two of two semiconductor luminous chips 30
Side, and be separately positioned in positive terminal pad 21 and negative terminal pad 22, realize and be electrically connected.
Conducting channel 26 is equipped between the opposite both sides of two semiconductor luminous chips 30, conducting channel 26 is arranged on substrate
10, and cathode 31 corresponding with two semiconductor luminous chips 30 and anode 32 are electrically connected.
Phosphor powder layer 40 wraps up the surface and side of the remote substrate 10 of semiconductor luminous chip 30.Insulating layer 50 is glimmering
The setting of the inner side of light bisque 40, makes it be covered in the lower section of phosphor powder layer 40, mainly for blocking semiconductor luminous chip 30
Side, prevents 30 side light extraction of semiconductor luminous chip, goes out luminous intensity to strengthen its surface.
Setting of the light shield layer 60 on phosphor powder layer 40, further blocks the side of semiconductor luminous chip 30.
The opening of light shield layer 60 does not influence the surface light extraction of semiconductor luminous chip 30 on the surface of semiconductor luminous chip 30.
Big I area of light extraction according to needed for 30 surface of semiconductor luminous chip of opening is configured.
Further, in the present embodiment, the phosphor powder layer 40 on each semiconductor luminous chip 30 can be separate,
It is not attached to；Alternatively, the phosphor powder layer 40 on two adjacent semiconductor luminous chips 30 is connected as one.Adjacent two and half
Insulating layer 50, the light shield layer 60 of conductor luminescence chip 30 are also connectable to form one.
Insulating layer 50, the setting of phosphor powder layer 40 and light shield layer 60 and material selection etc. refer to above-mentioned second embodiment
Described in middle correlation, details are not described herein.
In addition, the manufacture method of the light emitting semiconductor device of 3rd embodiment and fourth embodiment also refers to above-mentioned first
The manufacture method of embodiment and second embodiment, details are not described herein.
In summary, the manufacture method flow of light emitting semiconductor device of the invention is short, technique is simple, manufacture cost is low,
Suitable for high-volume large area industrialization production.
The foregoing is merely the embodiment of the present invention, is not intended to limit the scope of the invention, every to utilize this hair
The equivalent structure or equivalent flow shift that bright specification and accompanying drawing content are made, is directly or indirectly used in other relevant skills
Art field, is included within the scope of the present invention.
Claims (10)
1. a kind of light emitting semiconductor device, it is characterised in that including substrate, set at least one cathode on the substrate to weld
Disk and at least one negative terminal pad, set at least one semiconductor luminous chip on the substrate, be arranged on the substrate
Go up and wrap up the phosphor powder layer of the semiconductor luminous chip and the insulating layer being arranged on the inside of the phosphor powder layer；It is described
The cathode and anode of semiconductor luminous chip are electrically connected with the positive terminal pad and negative terminal pad respectively；
The insulating layer be located at the part or all of and substrate surface of the phosphor powder layer inner surface it is part or all of it
Between；And/or the insulating layer is located at the part or all of and semiconductor luminous chip side of the phosphor powder layer inner surface
It is part or all of between.
2. light emitting semiconductor device according to claim 1, it is characterised in that the height of the insulating layer is described from closing on
Gradually successively decrease to the other end away from the semiconductor luminous chip side one end of semiconductor luminous chip side.
3. light emitting semiconductor device according to claim 1, it is characterised in that the material of the insulating layer include silica gel,
One or more combinations in resin, glass glaze, liquid glass, ink and coating；
The material of the phosphor powder layer includes one or more combinations in silica gel, resin, glass glaze, ink and coating, and
Mixed with one or more fluorescent powders.
4. light emitting semiconductor device according to claim 3, it is characterised in that the material of the insulating layer is also mixed with inorganic
Powder；The inorganic powder includes micron, sub-micron, the glass dust of nanometer particle size, ceramic powder, metal powder, alloyed powder, oxide
One or more in powder and nitride powder.
5. according to claim 1-4 any one of them light emitting semiconductor devices, it is characterised in that the light emitting semiconductor device
Further include at least light shield layer being arranged on the phosphor powder layer；The light shield layer exposes portion equipped with least one opening
Divide the phosphor powder layer.
6. light emitting semiconductor device according to claim 5, it is characterised in that the material of the light shield layer include aluminium and its
Alloy, gold and its conjunction gold, silver and its alloy, nickel and its alloy, titanium and its alloy, glass glaze, ink, liquid glass, coating, oxygen
Change one or more combinations in titanium, zinc oxide, silica, aluminium nitride, silicon nitride and aluminium oxide.
7. light emitting semiconductor device according to claim 5, it is characterised in that the material of the light shield layer include silica gel,
One or more combinations in resin, liquid glass, glass glaze, ink and coating, and mixed with inorganic powder；The inorganic powder
End includes micron, sub-micron, the glass dust of nanometer particle size, ceramic powder, metal powder, alloyed powder, oxidate powder and nitride powder
In one or more combinations.
8. a kind of manufacture method of light emitting semiconductor device, it is characterised in that comprise the following steps：
S1, prepare positive terminal pad and negative terminal pad on substrate；
Semiconductor luminous chip, be fixed on the substrate surface by S2, and by the cathode of the semiconductor luminous chip and negative
Pole is electrically connected with the positive terminal pad and negative terminal pad respectively；
S3, the feed liquid that insulate is arranged on the substrate surface it is part or all of on, and/or the semiconductor luminous chip side
It is part or all of on, formed insulating layer；
S4, the exposed surface that fluorescence feed liquid is arranged on to the semiconductor luminous chip and exposed sides it is partly or entirely upper,
And the surface of insulating layer it is part or all of on, form the phosphor powder layer for wrapping up the semiconductor luminous chip；
The insulating layer be located at the part or all of and phosphor powder layer inner surface of the substrate surface it is part or all of it
Between；And/or positioned at the part or all of and part of the phosphor powder layer inner surface of the semiconductor luminous chip side or complete
Between portion.
9. manufacture method according to claim 8, it is characterised in that in step S3, the insulating layer is the Insulation Material
Liquid is formed by one or more modes in spraying, dispensing, spin coating, printing；The insulation feed liquid is insulation glue or insulation
Slurries；
In step S4, the phosphor powder layer for the fluorescence feed liquid by spraying, being molded, membrane pressure, dispensing, evaporation, in printing
One or more modes are formed；The fluorescence feed liquid is fluorescence glue or phosphor slurry.
10. manufacture method according to claim 8, it is characterised in that the manufacture method is further comprising the steps of：
S5, reserve aperture position on the phosphor powder layer, and is set on the phosphor powder layer surface outside aperture position
Light shield layer, the aperture position form the opening of the light shield layer, expose the part phosphor powder layer.
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