CN108010919A - A kind of tft array substrate and preparation method thereof, display device - Google Patents
A kind of tft array substrate and preparation method thereof, display device Download PDFInfo
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- CN108010919A CN108010919A CN201711218906.0A CN201711218906A CN108010919A CN 108010919 A CN108010919 A CN 108010919A CN 201711218906 A CN201711218906 A CN 201711218906A CN 108010919 A CN108010919 A CN 108010919A
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- active layers
- insulating layer
- groove
- layer
- array substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
Abstract
The invention discloses a kind of tft array substrate, including：Substrate；The cushion and active layers being successively set on substrate；The insulating layer being arranged in active layers, the width of insulating layer is less than the width of active layers, and insulating layer is correspondingly arranged at the intermediate region of active layers, wherein：Close to the outer region groove of insulating layer in active layers.The invention also discloses the production method and display device of a kind of tft array substrate.Implement tft array substrate of the present invention and preparation method thereof, display device, the oxygen vacancy of the active layer surface after plasma treatment can be prevented to be diffused into channel region, reduce the influence of oxygen vacancy diffusion couple TFT leakage currents in conductor active layers, improve the output yield of display panel.
Description
Technical field
The present invention relates to display panel manufacturing field, more particularly to a kind of tft array substrate and preparation method thereof, display dress
Put.
Background technology
During traditional top gate IGZO TFT substrates make, after GE metal layer electrodes have been made, worked as with GE metal layers
Light shield carry out autoregistration plasma treatment after, make the IGZO surface region conductors with SD contact, can reduce IGZO with
The contact impedance of SD, forms the effect of similar Ohmic contact.
Above-mentioned production method there are the problem of be：Oxygen vacancy can increase inside the IGZO of conductor, in subsequent processes
In, oxygen vacancy can be spread along surface to raceway groove, increase the oxygen vacancy of IGZO channel regions upper surface, and TFT can be made to close situation
Under electric leakage increase, TFT can not be closed effectively, so as to influence the characteristic of TFT.
The content of the invention
The technical problems to be solved by the invention are, there is provided a kind of tft array substrate and preparation method thereof, display dress
Put, the oxygen vacancy of the active layer surface after plasma treatment can be prevented to be diffused into channel region, reduce oxygen in conductor active layers
The influence of vacancy diffusion couple TFT leakage currents, improves the output yield of display panel.
In order to solve the above-mentioned technical problem, the embodiment provides a kind of tft array substrate, including：Substrate；According to
The secondary cushion being disposed on the substrate and active layers；The insulating layer being arranged in active layers, the width of insulating layer are less than active layers
Width, and insulating layer is correspondingly arranged at the intermediate region of active layers, and the outer region in active layers close to insulating layer is equipped with recessed
Groove.
Wherein, the side edge of opening of groove close in active layers with the corresponding regional location of insulating layer.
Wherein, groove is set to two, which is separately positioned on the outer region of close insulating layer in active layers
Opposite sides.
Wherein, depth of the groove in active layers is less than the thickness of active layers.
Wherein, covered with metal layer on insulating layer, while metal layer is filled in the groove of active layers.
Wherein, active layers are equipped with the dielectric layer of covering active layers and insulating layer with insulating layer, and dielectric layer is equipped with source and drain
Pole metal layer.
In order to solve the above technical problems, the invention also discloses a kind of production method of tft array substrate, including following step
Suddenly：Make cushion and active layers successively on substrate；The flood depositing insulating layer in active layers；Lighting is applied on the insulating layer
Resistance, using being exposed, develop to photoresist；Perform etching and photoresist remove after, in active layers close to insulating layer perimeter region
Domain forms groove, and the width of insulating layer is less than the width of active layers, and insulating layer is correspondingly arranged at the intermediate region of active layers.
Wherein, the side edge of opening of groove close in active layers with the corresponding regional location of insulating layer；Groove is set to
Two, which is separately positioned on the opposite sides of the outer region of the close insulating layer in the active layers；It is described
Depth of the groove in the active layers is less than the thickness of the active layers.
Wherein, further include：Metal layer is made on the insulating layer, while metal layer is filled in the groove of active layers；In master
Covering the dielectric layer of active layers and insulating layer with making on insulating layer, making source-drain electrode metal layer on the dielectric layer on dynamic layer
Step.
The invention also discloses a kind of display device with above-mentioned tft array substrate.
Implement tft array substrate provided by the present invention and preparation method thereof, display device, have the advantages that：
Firstth, cushion and active layers are set gradually on substrate；Insulating layer is set in active layers, and the width of insulating layer is less than actively
The width of layer, and insulating layer is correspondingly arranged at the intermediate region of active layers, the outer region in active layers close to insulating layer is equipped with
Groove, is equipped with metal layer in groove, and the oxygen vacancy of the active layer surface after processing is obstructed by metal layer, makes oxygen vacancy can not be into
Enter into the groove of active layers.
Second, by reducing the influence of oxygen vacancy diffusion couple TFT leakage currents in conductor active layers, improve display device production
The yield gone out.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is attached drawing needed in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments of invention, for those of ordinary skill in the art, without creative efforts, can be with
Other attached drawings are obtained according to these attached drawings.
Fig. 1 is that the embodiment of the present invention is exposed photoresist by the production method of tft array substrate, the structure developed is shown
It is intended to.
Fig. 2 is to obtain groove after the embodiment of the present invention is removed by the production method etching and photoresist of tft array substrate
Schematic diagram.
Fig. 3 is that the embodiment of the present invention by the production method of tft array substrate, show by the structure of deposited metal layer on groove
It is intended to.
Fig. 4 is the structure diagram of tft array substrate of the embodiment of the present invention.
Embodiment
Below in conjunction with the attached drawing in the embodiment of the present invention, the technical solution in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other without creative efforts
Embodiment, belongs to the scope of protection of the invention.
It is shown as described in Figure 4, it is the embodiment one of tft array substrate of the present invention.
Tft array substrate in the present embodiment, including：Substrate 101；Set gradually 102 He of cushion on the substrate 101
Active layers 103；The insulating layer 104 being arranged in active layers 103, wherein：In active layers 103 with 104 corresponding area of insulating layer
The periphery in domain is equipped with groove T.
When it is implemented, the formation of groove T is：Cushion 102 and active layers 103 are made successively on the substrate 101, to slow
After rushing 103 respective patterned process of layer 102 and active layers, depositing insulating layer 104 and photoresist is coated with active layers 103, used
Half-penetration type mask plate 105 is exposed photoresist, develops what is obtained.Wherein：Groove T-shaped is into position：It is close in active layers 103
The outer region of insulating layer 104, in the construction, the width of insulating layer 104 is less than the width of active layers 103, and insulating layer 104 is right
The intermediate region of active layers 103 should be arranged on.
The effect of groove T is：Make in follow-up plasma treatment and anneal processing procedures, the oxygen on 103 surface of active layers
Vacancy is obstructed by groove T, oxygen vacancy is cannot be introduced into the channel region of active layers 103.
Preferably, the side edge of opening T1 of groove T close in active layers 103 with 104 corresponding region of insulating layer position
Put.In this way, simplify the fabrication processings such as subsequent deposition.
Preferably, groove T is set to two, which is separately positioned in active layers 103 close to insulating layer 104
The opposite sides of outer region, meanwhile, depth of the groove T in active layers 103 is less than the thickness of active layers 103.In this way, simplify
The fabrication processings such as subsequent deposition.
Further, in the present embodiment, covered with metal layer 106 on insulating layer 104, while metal layer 106 is filled in master
In the groove T of dynamic layer 103, metal layer 106a as depicted is formed.So so that after processing, be in the present embodiment
In plasma plasma treatments, and follow-up anneal processing procedures, the oxygen vacancy on 103 surface of active layers is carried out by metal layer 106a
Barrier, makes oxygen vacancy cannot be introduced into the channel region of active layers 103.That is, the oxygen on 103 surface of conductor active layers is empty
The metal layer 106a barriers of 103 channel region both sides of active layers can be embedded in by lacking during diffusion, oxygen vacancy is cannot be introduced into raceway groove
Region, the oxygen vacancy that so, it is possible 103 surface of active layers after prevention plasma is handled are diffused into channel region, reduce conductor
Change the influence of oxygen vacancy diffusion couple TFT leakage currents in active layers.
Further, covering active layers 103 and insulating layer 104 are made on active layers 103 and insulating layer 104 is equipped with dielectric layer
201, source-drain electrode metal layer 202 is equipped with dielectric layer 201.
With reference to shown in referring to Fig. 1-Fig. 3, the invention also discloses a kind of production method of above-mentioned tft array substrate, including
Following steps：Make cushion 102 and active layers 103 successively on the substrate 101；The flood depositing insulating layer in active layers 103
104；Photoresist 107 is coated with insulating layer 104, using being exposed, develop to photoresist 107.Perform etching and photoresist remove after,
Outer region close to insulating layer 104 in active layers 103 forms groove T.In the processing procedure, the width of insulating layer 104 is less than master
The width of dynamic layer 103, and insulating layer 104 is correspondingly arranged at the intermediate region of active layers 103.
The effect of groove T is：Make in follow-up plasma treatment and anneal processing procedures, the oxygen on 103 surface of active layers
Vacancy is obstructed by groove T, oxygen vacancy is cannot be introduced into the channel region of active layers 103.
Preferably, the side edge of opening T1 of groove T close in active layers 103 with 104 corresponding region of insulating layer position
Put.In this way, simplify the fabrication processings such as subsequent deposition.
Preferably, groove T is set to two, which is separately positioned in active layers 103 close to insulating layer 104
The opposite sides of outer region, meanwhile, depth of the groove T in active layers 103 is less than the thickness of active layers 103.In this way, simplify
The fabrication processings such as subsequent deposition.
Further, in addition on insulating layer 104 metal layer 106 is covered, while the metal layer 106 is filled in active layers
Groove T in, form metal layer 106a as depicted.So so that after processing, in the present embodiment be plasma plasmas
In processing, and follow-up anneal processing procedures, the oxygen vacancy on 103 surface of active layers is obstructed by metal layer 106a, makes oxygen empty
Lack the channel region that cannot be introduced into active layers 103.That is, meeting during the oxygen vacancy diffusion on 103 surface of conductor active layers
The metal layer 106a barriers of 103 channel region both sides of active layers are embedded in, oxygen vacancy is cannot be introduced into channel region, in this way,
The oxygen vacancy on 103 surface of active layers after plasma processing can be prevented to be diffused into channel region, reduced in conductor active layers
The influence of oxygen vacancy diffusion couple TFT leakage currents.
Further, further include：Covering active layers 103 and insulating layer 104 are made in active layers 103 and insulating layer 104
Dielectric layer 201, in dielectric layer 201 make source-drain electrode metal layer 202 the step of.
The invention also discloses a kind of display device for including above-mentioned tft array substrate, process is made also in display device
It is included in covering flatness layer 203 on dielectric layer 201 and source-drain electrode metal layer 202, anode layer 204 is covered on flatness layer 203, in sun
The step of pixel separating layer 205 and luminescent layer 206 are made on pole layer 204 and then forms OLED driving elements.It is when it is implemented, aobvious
Showing device technical problem to be solved and the technique effect that can be realized are asked with above-mentioned tft array substrate technology to be solved
Topic is identical with the technique effect that can be realized, repeats no more.
Implement tft array substrate provided by the present invention and preparation method thereof, display device, have the advantages that：
Firstth, cushion and active layers are set gradually on substrate；Insulating layer is set in active layers, and the width of insulating layer is less than actively
The width of layer, and insulating layer is correspondingly arranged at the intermediate region of active layers, the outer region in active layers close to insulating layer is equipped with
Groove, is equipped with metal layer in groove, and the oxygen vacancy of the active layer surface after processing is obstructed by metal layer, makes oxygen vacancy can not be into
Enter into the groove of active layers.
Second, by reducing the influence of oxygen vacancy diffusion couple TFT leakage currents in conductor active layers, improve display device production
The yield gone out.
Claims (10)
- A kind of 1. tft array substrate, it is characterised in that including：Substrate；The cushion and active layers being successively set on substrate；The insulating layer being arranged in the active layers, the width of the insulating layer are less than the width of the active layers, and described exhausted Edge layer is correspondingly arranged at the intermediate region of the active layers；Outer region in the active layers close to the insulating layer is equipped with groove.
- 2. tft array substrate as claimed in claim 1, it is characterised in that the side edge of opening of the groove is close to described In active layers with the corresponding regional location of the insulating layer.
- 3. tft array substrate as claimed in claim 2, it is characterised in that the groove is set to two, two groove difference It is arranged on the opposite sides of the outer region of the close insulating layer in the active layers.
- 4. tft array substrate as claimed in claim 1, it is characterised in that depth of the groove in the active layers is small In the thickness of the active layers.
- 5. the tft array substrate as described in claim 1-4 any one, it is characterised in that covered with gold on the insulating layer Belong to layer, while the metal layer is filled in the groove of the active layers.
- 6. the tft array substrate as described in claim 1-4 any one, it is characterised in that the active layers and the insulation Layer is equipped with the dielectric layer for covering the active layers and insulating layer, and the dielectric layer is equipped with source-drain electrode metal layer.
- 7. a kind of production method of tft array substrate, it is characterised in that comprise the following steps：Make cushion and active layers successively on substrate；The flood depositing insulating layer in the active layers；Photoresist is coated with the insulating layer, using being exposed, develop to photoresist；Perform etching and photoresist remove after, in the active layers close to the insulating layer outer region formed groove, it is described The width of insulating layer is less than the width of the active layers, and the insulating layer is correspondingly arranged at the intermediate region of the active layers.
- 8. the production method of tft array substrate as claimed in claim 7, it is characterised in that the side opening edge of the groove Edge close in the active layers with the corresponding regional location of the insulating layer；The groove is set to two, which is separately positioned in the active layers close to the outer region of the insulating layer Opposite sides；Depth of the groove in the active layers is less than the thickness of the active layers.
- 9. the production method of tft array substrate as claimed in claim 7 or 8, it is characterised in that further include：In the insulation Metal layer is made on layer, while the metal layer is filled in the groove of the active layers；The dielectric layer of the active layers and insulating layer is covered in the active layers and the insulating layer, makes source on the dielectric layer The step of drain metal layer.
- 10. a kind of display device, it is characterised in that the display device includes such as TFT gusts of claim 1-6 any one of them Row substrate.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711218906.0A CN108010919B (en) | 2017-11-28 | 2017-11-28 | TFT array substrate, manufacturing method thereof and display device |
| PCT/CN2018/071557 WO2019104834A1 (en) | 2017-11-28 | 2018-01-05 | Tft array substrate and manufacturing method therefor and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711218906.0A CN108010919B (en) | 2017-11-28 | 2017-11-28 | TFT array substrate, manufacturing method thereof and display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108010919A true CN108010919A (en) | 2018-05-08 |
| CN108010919B CN108010919B (en) | 2020-07-31 |
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| CN201711218906.0A Active CN108010919B (en) | 2017-11-28 | 2017-11-28 | TFT array substrate, manufacturing method thereof and display device |
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| CN (1) | CN108010919B (en) |
| WO (1) | WO2019104834A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109742031A (en) * | 2019-01-10 | 2019-05-10 | 合肥鑫晟光电科技有限公司 | A kind of thin film transistor (TFT) and preparation method thereof, array substrate, display device |
| WO2023184622A1 (en) * | 2022-04-02 | 2023-10-05 | 深圳市华星光电半导体显示技术有限公司 | Display panel and display apparatus |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110752219B (en) * | 2019-10-29 | 2022-07-26 | 昆山国显光电有限公司 | Thin film transistor and display panel |
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| CN103295962A (en) * | 2013-05-29 | 2013-09-11 | 京东方科技集团股份有限公司 | Array substrate and manufacturing method thereof and display device |
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| CN106876280A (en) * | 2017-04-24 | 2017-06-20 | 京东方科技集团股份有限公司 | Thin film transistor (TFT) and preparation method thereof |
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| CN105097824B (en) * | 2014-05-22 | 2019-12-10 | 群创光电股份有限公司 | Thin film transistor substrate, manufacturing method thereof and display |
| CN104037090B (en) * | 2014-06-19 | 2016-10-19 | 深圳市华星光电技术有限公司 | Oxide thin film transistor construction manufacturing method and oxide thin film transistor structure |
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| CN103295962A (en) * | 2013-05-29 | 2013-09-11 | 京东方科技集团股份有限公司 | Array substrate and manufacturing method thereof and display device |
| CN104979380A (en) * | 2015-05-26 | 2015-10-14 | 合肥鑫晟光电科技有限公司 | Thin film transistor and manufacturing method therefor |
| CN106876280A (en) * | 2017-04-24 | 2017-06-20 | 京东方科技集团股份有限公司 | Thin film transistor (TFT) and preparation method thereof |
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| CN109742031A (en) * | 2019-01-10 | 2019-05-10 | 合肥鑫晟光电科技有限公司 | A kind of thin film transistor (TFT) and preparation method thereof, array substrate, display device |
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| CN113782616B (en) * | 2019-01-10 | 2024-01-16 | 合肥鑫晟光电科技有限公司 | Thin film transistor, preparation method thereof, array substrate and display device |
| WO2023184622A1 (en) * | 2022-04-02 | 2023-10-05 | 深圳市华星光电半导体显示技术有限公司 | Display panel and display apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108010919B (en) | 2020-07-31 |
| WO2019104834A1 (en) | 2019-06-06 |
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