CN107994904A - Digital analog converter - Google Patents
Digital analog converter Download PDFInfo
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- CN107994904A CN107994904A CN201810083442.5A CN201810083442A CN107994904A CN 107994904 A CN107994904 A CN 107994904A CN 201810083442 A CN201810083442 A CN 201810083442A CN 107994904 A CN107994904 A CN 107994904A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1009—Calibration
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
Abstract
A kind of this disclosure relates to digital analog converter.It includes：Main D/A converter module, calibration module, control module and summation module.Main D/A converter module inputs the first digital signal to be converted, exports the first analog signal after digital-to-analogue conversion；Control module inputs the first digital signal, exports calibration code signal；Calibration module link control module, inputs calibration code signal, exports calibration signal；Summation module first input end inputs the first analog signal, the second input terminal input calibration signal, and output terminal exports the second analog signal after calibration, and control module is configured as generating corresponding calibration code signal according to the first digital signal.According to the embodiment of the present disclosure, it can determine the corresponding calibration code signal of digital signal with input, the analog signal that output calibration signal exports main D/A converter module is calibrated, the analog signal after final output calibration, so as to improve the precision and the linearity of digital analog converter.
Description
Technical field
This disclosure relates to integrated circuit fields, more particularly to a kind of digital analog converter.
Background technology
In the related art, high-precision digital analog converter (Digital-to-Analog Converter, DAC) is general
Using the structure of R-2R ladder resistance networks.Fig. 1 a and Fig. 1 b are showing according to the R-2R ladder resistance network structures of correlation technique
It is intended to.As shown in Figure 1a, in R-2R ladder resistance network structures, the resistance value of resistance is fixed as two kinds of R and 2R.Often increase in theory
Add 1 bit (bit) precision, it is only necessary to increase each resistance of R and 2R, the area of resistor network will not increase and index with precision
Level increases.The structure only needs to control each 2R of Digital Signals and reference voltage (including reference voltage (Positive
Voltage Reference, VREFP) and negative reference voltage (Negative Voltage Reference, VREFN)) connection
Switch, you can to obtain：
Wherein, VOUT represents output voltage, D [A-1:0] the A position digital signals of input, VREFP and VREFN difference are represented
Represent reference voltage and negative reference voltage.
R-2R digital analog converters as shown in Figure 1a can be equivalent to the voltage source-series one that a voltage is formula V above OUT
A output resistance R (as shown in Figure 1 b).The DAC structure is held in low order (Least-Significant-Bits, LSB) to be continued
Increase amount of bits, the output resistance of DAC entirety will not be changed, this is the important excellent of the easy extended precision of R-2R DAC structures
Gesture.
The output accuracy of the structure, is primarily limited to the matching precision of resistance.When due to reasons such as technique, photoetching, causing
When resistance is not fully identical, the deviation of output voltage and desired voltage can be caused.The deviation is mainly non-by differential
Linearly (Differential-Non-Linearity, DNL) and integral nonlinearity (Integral-Non-Linearity, INL)
Two indices are portrayed.With the increase of DAC output accuracies, to high significance bit (Most-Significant-Bits, MSB) electricity
The mismatch requirement of resistance (such as D [A-1]) is consequently increased, and causes degradation of the structure in high accuracy.
The content of the invention
In view of this, the present disclosure proposes a kind of digital analog converter, the performance of high precision digital-to-analog converter can be improved.
According to the one side of the disclosure, there is provided a kind of digital analog converter, including：Main D/A converter module, calibration module,
Control module and summation module,
The input terminal of the main D/A converter module inputs the first digital signal to be converted, output terminal output digital-to-analogue conversion
The first analog signal afterwards, wherein, the main D/A converter module includes the first R-2R ladder resistance networks, and R represents resistance value；
The input terminal of the control module inputs first digital signal, output terminal output calibration code signal；
The calibration module connects the control module, and input terminal inputs the calibration code signal, output terminal output school
Calibration signal, wherein, the calibration module includes the 2nd R-2R ladder resistances network and weight resistance, the resistance of the weight resistance
Value is more than R；
The summation module connects the main D/A converter module and the calibration module, first input end input institute respectively
The first analog signal is stated, the second input terminal inputs the calibration signal, and output terminal exports the second analog signal after calibration,
Wherein, the control module is configured as according to first digital signal generation and the first digital signal phase
Corresponding calibration code signal.
In a kind of possible implementation, the control module includes storage unit, the storage unit storage numeral
Correspondence between signal and calibration code signal,
Wherein, according to first digital signal generation with the corresponding calibration code signal of first digital signal,
Including：
According to first digital signal and the correspondence, determine and the corresponding school of the first digital signal
Quasi- encoded signal；
Export the calibration code signal.
In a kind of possible implementation, the control module further includes processing unit, wherein, the storage unit is deposited
The correspondence between Some digital signal and calibration code signal is stored up,
Wherein, according to first digital signal generation with the corresponding calibration code signal of first digital signal,
Further include：
When not storing calibration code signal corresponding with first digital signal in the storage unit, institute is determined
State second digital signal and/or threeth digital signal adjacent with first digital signal stored in storage unit；
According to second digital signal and/or the 3rd digital signal and the correspondence, determine with it is described
Second digital signal and/or the corresponding calibration code signal of the 3rd digital signal；
According to second digital signal and/or the corresponding calibration code signal of the 3rd digital signal, pass through
The processing unit determines and the corresponding calibration code signal of first digital signal.
In a kind of possible implementation, the precision of the digital analog converter is P bits, wherein, the main digital-to-analogue turns
The high significance bit of mold changing block is M-bit, and low order is N-bit, P=M+N, and the first R-2R ladder resistances network includes N
Group R-2R ladder resistances and the 2 of parallel connectionM- 1 2R resistance,
The precision of the calibration module is Q bits, Q<P, the 2nd R-2R ladder resistances network include Q group R-2R ladders
Resistance,
Wherein, P, M, N, Q are natural number.
In a kind of possible implementation, the weight resistance and the 2nd R-2R ladder resistance series networks.
In a kind of possible implementation, the value of the weight resistance is (2K- 1) R, the calibration module relative to
The calibration weight of the main D/A converter module is 1/ (2K+M-1),
Wherein, K is natural number, K<P.
In a kind of possible implementation, the processing unit includes arithmetic logic unit alu.
According to the digital analog converter of the disclosure, the corresponding school of digital signal with input can be determined by control module
Quasi- encoded signal, the analog signal exported by calibration module output calibration signal to main D/A converter module are calibrated, most
Analog signal after output calibration eventually, so as to improve the precision and the linearity of digital analog converter.
According to below with reference to the accompanying drawings becoming to detailed description of illustrative embodiments, the further feature and aspect of the disclosure
It is clear.
Brief description of the drawings
Comprising in the description and the attached drawing of a part for constitution instruction and specification together illustrate the disclosure
Exemplary embodiment, feature and aspect, and for explaining the principle of the disclosure.
Fig. 1 a and Fig. 1 b are the schematic diagrames according to the R-2R ladder resistance network structures of correlation technique.
Fig. 2 is the schematic diagram according to the digital analog converter of correlation technique.
Fig. 3 is the block diagram of the digital analog converter according to one exemplary embodiment of the disclosure.
Fig. 4 is the circuit diagram of the digital analog converter according to one exemplary embodiment of the disclosure.
Fig. 5 is the circuit diagram of the digital analog converter according to one exemplary embodiment of the disclosure.
Fig. 6 is the schematic diagram of the calibration of the digital analog converter according to one exemplary embodiment of the disclosure.
Fig. 7 is the block diagram of the digital analog converter according to one exemplary embodiment of the disclosure.
Embodiment
Describe various exemplary embodiments, feature and the aspect of the disclosure in detail below with reference to attached drawing.It is identical in attached drawing
Reference numeral represent functionally the same or similar element.Although the various aspects of embodiment are shown in the drawings, remove
Non-specifically point out, it is not necessary to attached drawing drawn to scale.
Dedicated word " exemplary " means " being used as example, embodiment or illustrative " herein.Here as " exemplary "
Illustrated any embodiment should not necessarily be construed as preferred or advantageous over other embodiments.
In addition, in order to better illustrate the disclosure, numerous details is given in embodiment below.
It will be appreciated by those skilled in the art that without some details, the disclosure can equally be implemented.In some instances, for
Method, means, element and circuit well known to those skilled in the art are not described in detail, in order to highlight the purport of the disclosure.
Fig. 2 is the schematic diagram according to the digital analog converter of correlation technique.As shown in Fig. 2, in the related art, can be by height
The R-2R resistor networks of significance bit MSB are changed to the 2R networks of thermometer coding.That is, turn for precision for the digital-to-analogue of B+C bits
Parallel operation, can be classified as LSB and C high significance bit MSB of B low order, and LSB portion includes B group R-2R ladder resistances,
MSB parts include in parallel 2C- 1 2R resistance.According to the digital analog converter of Fig. 2, by the cost of area increased, relax
The resistors match requirement of MSB parts.But the technology is merely able to improve differential nonlinearity DNL, and cannot improve integral nonlinearity
INL, can not continue to improve the precision of R-2R DAC.
Fig. 3 is the block diagram of the digital analog converter according to one exemplary embodiment of the disclosure.As shown in figure 3, according to this
Disclosed digital analog converter includes：Main D/A converter module 31, calibration module 32, control module 33 and summation module 34,
The input terminal of the main D/A converter module 31 inputs the first digital signal D [P-1 to be converted:0], output terminal is defeated
Go out the first analog signal V after digital-to-analogue conversionmain, wherein, the main D/A converter module 31 includes the first R-2R ladder resistances
Network, R represent resistance value；
The input terminal of the control module 33 inputs the first digital signal D [P-1:0], output terminal output calibration code
Signal DC [Q-1,0], wherein, Q represents the precision of calibration module 32；
The calibration module 32 connects the control module 33, and input terminal inputs the calibration code signal Dcali, output
End output calibration signal Vcali, wherein, the calibration module 32 includes the 2nd R-2R ladder resistances network and weight resistance, institute
The resistance value for stating weight resistance is more than R；
The summation module 34 connects the main D/A converter module 31 and the calibration module 32, first input end respectively
Input the first analog signal Vmain, the second input terminal input calibration signal Vcali, second after output terminal output calibration
Analog signal VOUT2,
Wherein, the control module 33 is configured as according to the first digital signal D [P-1:0] generation and described first
Digital signal D [P-1:0] corresponding calibration code signal DC [Q-1,0].
In accordance with an embodiment of the present disclosure, can determine to compile with the corresponding calibration of the digital signal of input by control module
Code signal, the analog signal exported by calibration module output calibration signal to main D/A converter module are calibrated, final defeated
Go out the analog signal after calibration, so as to improve the precision and the linearity of digital analog converter.
Fig. 4 is the circuit diagram of the digital analog converter according to one exemplary embodiment of the disclosure.As shown in figure 4,
The precision of digital analog converter in accordance with an embodiment of the present disclosure can be P bits (bit), the high significance bit of main D/A converter module 31
For M-bit, low order is N-bit, and P=M+N, P, M, N are natural number.The first R-2R ladders electricity of main D/A converter module 31
Resistance network may include the 2 of N group R-2R ladder resistances and parallel connectionM- 1 2R resistance.
In a kind of possible implementation, as shown in figure 4, the precision of calibration module 32 can be Q bits, Q<P, Q are certainly
So number.2nd R-2R ladder resistance networks of calibration module 32 may include Q group R-2R ladder resistances.As shown in figure 4, weight resistance
Can be with the 2nd R-2R ladder resistance series networks, and the resistance value of weight resistance is more than R.
In a kind of possible implementation, the resistance value of weight resistance can be, for example, (2K- 1) R, K are natural number, K<P.
It should be appreciated that those skilled in the art can be according to the resistance value for being actually needed setting weight resistance, the disclosure is to weight resistance
Specific value is not restricted.
In circuit shown in Fig. 4, it is R/ (2 that main D/A converter module, which is considered as output resistance,M-1) voltage source, school
Quasi-mode block is considered as output resistance as 2KThe voltage source of R, above-mentioned two voltage source are in parallel.In this way, school can be calculated
The second analog signal V after standardOUT2：
Parameters in formula (2) meet：
In formula (2) and formula (3), DM [i] can represent the number of the height effectively bit position input of main D/A converter module
The i-th bit of word signal, the value range of i is [1,2M- 1], VMSBIt can represent the height effectively bit position output of main D/A converter module
Analog signal；DL [j] can represent the jth position of the digital signal of the low order part input of main D/A converter module, and j's takes
Value scope is [0, N-1], VLSBIt can represent the analog signal of the low order part output of main D/A converter module；DC [k] can table
Show the kth position of the digital signal (calibration code signal) of calibration module input, the value range of k is [0, Q-1], VcaliIt can represent
The analog signal (calibration signal) of the output of calibration module；VREFP and VREFN represents reference voltage and negative reference electricity respectively
Pressure.
As described above, in digital analog converter in accordance with an embodiment of the present disclosure, the second analog signal V after calibrationOUT2
It can be regarded as the first analog signal VmainWith calibration signal VcaliWeighted average, wherein the first analog signal VmainWeight
For 1, and calibration signal VcaliWeight (calibration weight) be 1/ (2K+M-1).In this way, as the first analog signal VmainWith ideal
Difference between value is less than (VREFP-VREFN)/(2K+M-1) when, it is possible to calibration signal VcaliTo the first analog signal Vmain's
Error compensates.Simultaneously as calibration signal VcaliWeight it is smaller, therefore ensure calibration module DNL<1LSB and
INL<In the case of 1LSB, a suitable calibration code (code) can be always found so that the second analog signal Vout2With reason
Think the difference of magnitude of voltage<1LSB, meets the linearity of whole DAC.The resistors match essence of calibration module is so relaxed significantly
Degree requires.
Below by taking precision is the R-2R digital analog converter of 16 bits as an example, to the digital analog converter according to the embodiment of the present disclosure
Illustrate.
Fig. 5 is the circuit diagram of the digital analog converter according to one exemplary embodiment of the disclosure.As shown in figure 5,
The high significance bit of main D/A converter module 31 is 4 bits, and low order is 12 bits.Main D/A converter module 31 includes 12 groups of R-
2R ladder resistances and the 15 (2 of parallel connection4- 1) a 2R resistance.The precision of calibration module 32 can be 8 bits, including 8 groups of R-2R ranks
Terraced resistance；Weight resistance be used for by the output of calibration module it is scaled, can value be 31R ((25-1)R)。
In the circuit shown in Fig. 5, main D/A converter module is considered as the voltage source that output resistance is R/8, calibrating die
Block is considered as the voltage source that output resistance is 32R, and above-mentioned two voltage source is in parallel.In this way, after calibration can be calculated
Second analog signal VOUT2：
Parameters in formula (4) meet：
According to formula (4) and (5), the second analog signal VOUT2It can be regarded as the first analog signal VmainWith calibration signal
VcaliWeighted average, wherein the first analog signal VmainWeight be 1, and calibration signal VcaliWeight (calibration weight) be
1/256.In this way, as the first analog signal VmainThe difference between ideal value when being less than (VREFP-VREFN)/256, it is possible to
With calibration signal VcaliTo the first analog signal VmainError compensate.According to the digital analog converter (essence of the embodiment of the present disclosure
Spend for 16bit), it is only necessary to resistance ensures the matching precision of 8bit, reduces the overall precision demand of circuit.
Fig. 6 is the schematic diagram of the calibration of the digital analog converter according to one exemplary embodiment of the disclosure, wherein, horizontal seat
Mark represents input coding (that is, encoded radio of the first digital signal of input), and ordinate represents calibration range (LSB).Such as Fig. 6
It is shown, according to the digital analog converter (precision 16bit) of the embodiment of the present disclosure, the INL errors of maximum ± 256LSB can be calibrated.
Specific correcting range is with the different input digital signal change of main D/A converter module, when the digital signal of input is close to VREFN
When, calibration range polarization；When the digital signal of input is close to VREFP, calibration range is partially negative.
In the present embodiment, if the weight resistance (31R) of calibration module is there are process deviation, namely it is not accurate during production
True 31R, only influences the calibration range of calibration module, i.e., is slightly scaled on the basis of 256LSB, but not influences calibration essence
Degree.
Fig. 7 is the block diagram of the digital analog converter according to one exemplary embodiment of the disclosure.As shown in fig. 7, in one kind
In possible implementation, control module 33 includes storage unit 331, and the storage unit 331 stores digital signal and calibration
Correspondence between encoded signal,
Wherein, according to the first digital signal D [P-1:0] generation and the first digital signal D [P-1:0] it is corresponding
Calibration code signal DC [Q-1,0], including：
According to the first digital signal D [P-1:0] and the correspondence, determine and the first digital signal D
[P-1:0] corresponding calibration code signal DC [Q-1,0]；
Export the calibration code signal DC [Q-1,0].
For example, the storage unit 331 of control module 33 may include read-only storage (Read-Only Memory,
ROM) or programmable read only memory (Programmable ROM, PROM), it is stored with look-up table (Look- in ROM or PROM
Up-Table, LUT).The correspondence being preset with look-up table LUT between digital signal and calibration code signal.This is right
Should be related to can obtain according to experiment or be obtained according to theoretical calculation, and the disclosure is not restricted this.
In a kind of possible implementation, as the first digital signal D [P-1:When 0] being input to control module 33, control
Module 33 can search and the first digital signal D [P-1 in LUT:0] corresponding calibration code, determines and the first numeral
Signal D [P-1:0] corresponding calibration code signal DC [Q-1,0], and then export calibration code signal DC [Q-1,0].
When calibration module 32 receives calibration code signal DC [Q-1,0], electricity can be controlled according to calibration code signal
The switch that each 2R is connected with reference voltage (VREFP and VREFN) in resistance network, so as to export calibration signal Vcali.Calibration letter
Number VcaliIt is input in summation module 34 to the first analog signal V of main D/A converter module 31mainCompensate, final output
The second analog signal V after calibrationOUT2。
As shown in fig. 7, in a kind of possible implementation, control module 33 may also include processing unit 332, wherein,
Storage unit 331 stores the correspondence between Some digital signal and calibration code signal,
Wherein, according to first digital signal generation with the corresponding calibration code signal of first digital signal,
Further include：
When not storing calibration code signal corresponding with first digital signal in the storage unit, institute is determined
State second digital signal and/or threeth digital signal adjacent with first digital signal stored in storage unit；
According to second digital signal and/or the 3rd digital signal and the correspondence, determine with it is described
Second digital signal and/or the corresponding calibration code signal of the 3rd digital signal；
According to second digital signal and/or the corresponding calibration code signal of the 3rd digital signal, pass through
The processing unit determines and the corresponding calibration code signal of first digital signal.
For example, it is more demanding to the amount of storage of LUT if the precision of digital analog converter DAC is higher, core can be caused
Piece area is excessive.In this case, can only storage part fraction in the ROM LUT of storage unit 331 in order to save the area of chip
Correspondence between word signal and calibration code signal.
In the present embodiment, as the first digital signal D [P-1:When 0] being input to control module 33, control module 33 can be with
Searched and the first digital signal D [P-1 in LUT:0] corresponding calibration code；If do not stored in LUT and the first numeral
Signal D [P-1:0] corresponding calibration code, then can determine to store in storage unit with the first digital signal D [P-1:0]
The second adjacent digital signal D ' [P-1:0] and/or the 3rd digital signal D " [P-1:0]；Found in LUT and the second numeral
Signal D ' [P-1:0] and/or the 3rd digital signal D " [P-1:0] corresponding calibration code signal DC ' [Q-1,0] and/or DC "
[Q-1,0]。
In a kind of possible implementation, the processing unit 332 of control module 33 can be for example including arithmetic logic unit
ALU.Processing unit 332 can be calculated according to calibration code signal DC ' [Q-1,0] and/or DC " [Q-1,0] by linear interpolation etc.
Mode calculates and the first digital signal D [P-1:0] corresponding calibration code signal DC [Q-1,0], it is achieved thereby that area
Compromise between precision.The disclosure is not restricted the specific calculation of processing unit 332.It should be appreciated that can only it adopt
With the calibration code of an adjacent digital signal, can also be obtained using the calibration code of two adjacent digital signals
One digital signal D [P-1:0] corresponding calibration code, the disclosure are not restricted this.
According to the digital analog converter of the embodiment of the present disclosure, can be determined by control module opposite with the digital signal inputted
The calibration code signal answered, exports calibration signal by calibration module and carries out school to the analog signal that main D/A converter module exports
Standard, the analog signal after final output calibration, so as to improve the precision and the linearity of digital analog converter.
According to the digital analog converter of the embodiment of the present disclosure, asking for resistive voltage mudulation effect in R-2R DAC can be solved
Topic, the digital signal each inputted correspond to a calibration code, it is possible to achieve accurate calibration；Calibrated, improved using electric resistance structure
Matching and temperature stability；Compared with correlation technique, the LSB portion of main D/A converter module and the essence of calibration module are reduced
Degree requires, since the output voltage of calibration module reduces 2^ (K-1) times by weight resistance, as long as meeting calibration module
The linearity of resistor network reaches the precision of P-K+1 bits, you can calibrates the nonlinearity erron of main D/A converter module to P bits
Precision, significantly improves the precision and the linearity of digital analog converter.
The presently disclosed embodiments is described above, described above is exemplary, and non-exclusive, and
It is not limited to disclosed each embodiment.In the case of without departing from the scope and spirit of illustrated each embodiment, for this skill
Many modifications and changes will be apparent from for the those of ordinary skill in art field.The selection of term used herein, purport
Best explain the principle of each embodiment, practical application or technological improvement to the technology in market, or lead this technology
Other those of ordinary skill in domain are understood that each embodiment disclosed herein.
Claims (7)
1. a kind of digital analog converter, it is characterised in that the digital analog converter includes：Main D/A converter module, calibration module, control
Molding block and summation module,
The input terminal of the main D/A converter module inputs the first digital signal to be converted, after output terminal output digital-to-analogue conversion
First analog signal, wherein, the main D/A converter module includes the first R-2R ladder resistance networks, and R represents resistance value；
The input terminal of the control module inputs first digital signal, output terminal output calibration code signal；
The calibration module connects the control module, and input terminal inputs the calibration code signal, output terminal output calibration letter
Number, wherein, the calibration module includes the 2nd R-2R ladder resistances network and weight resistance, and the resistance value of the weight resistance is big
In R；
The summation module connects the main D/A converter module and the calibration module respectively, first input end input described the
One analog signal, the second input terminal input the calibration signal, and output terminal exports the second analog signal after calibration,
Wherein, the control module is configured as being generated according to first digital signal corresponding with first digital signal
Calibration code signal.
2. digital analog converter according to claim 1, it is characterised in that the control module includes storage unit, described
Storage unit stores the correspondence between digital signal and calibration code signal,
Wherein, according to first digital signal generation and the corresponding calibration code signal of first digital signal, including：
According to first digital signal and the correspondence, determine to compile with the corresponding calibration of first digital signal
Code signal；
Export the calibration code signal.
3. digital analog converter according to claim 2, it is characterised in that the control module further includes processing unit, its
In, the correspondence between the storage unit storage Some digital signal and calibration code signal,
Wherein, according to first digital signal generation and the corresponding calibration code signal of first digital signal, also wrap
Include：
When not storing calibration code signal corresponding with first digital signal in the storage unit, described deposit is determined
Second digital signal and/or threeth digital signal adjacent with first digital signal stored in storage unit；
According to second digital signal and/or the 3rd digital signal and the correspondence, determine and described second
Digital signal and/or the corresponding calibration code signal of the 3rd digital signal；
According to second digital signal and/or the corresponding calibration code signal of the 3rd digital signal, by described
Processing unit determines and the corresponding calibration code signal of first digital signal.
4. digital analog converter according to claim 1, it is characterised in that the precision of the digital analog converter is P bits, its
In, the high significance bit of the main D/A converter module is M-bit, and low order is N-bit, P=M+N, the first R-2R ranks
Terraced resistor network includes the 2 of N group R-2R ladder resistances and parallel connectionM- 1 2R resistance,
The precision of the calibration module is Q bits, Q<P, the 2nd R-2R ladder resistances network include Q group R-2R ladders electricity
Resistance,
Wherein, P, M, N, Q are natural number.
5. digital analog converter according to claim 4, it is characterised in that the weight resistance and the 2nd R-2R ladders
Resistor network is connected.
6. digital analog converter according to claim 5, it is characterised in that the value of the weight resistance is (2K- 1) R, institute
It is 1/ (2 that calibration module, which is stated, relative to the calibration weight of the main D/A converter moduleK+M-1),
Wherein, K is natural number, K<P.
7. digital analog converter according to claim 3, it is characterised in that the processing unit includes arithmetic logic unit
ALU。
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| CN110380731A (en) * | 2019-07-25 | 2019-10-25 | 上海类比半导体技术有限公司 | A kind of D/A conversion circuit |
| CN112803948A (en) * | 2020-12-31 | 2021-05-14 | 深圳市紫光同创电子有限公司 | Digital-to-analog conversion circuit and method |
| CN113517891A (en) * | 2021-09-13 | 2021-10-19 | 成都爱旗科技有限公司 | Linear calibration system and method applied to digital-to-analog converter |
| CN113765832A (en) * | 2020-06-03 | 2021-12-07 | 迈络思科技有限公司 | Method and apparatus for a lookup table based coding mechanism for a communication system |
| CN114650055A (en) * | 2022-03-24 | 2022-06-21 | 深圳市晶扬电子有限公司 | Adaptive delta modulation analog-digital converter with calibration circuit and calibration method |
| CN115694483A (en) * | 2022-10-17 | 2023-02-03 | 电子科技大学 | Resistor network, low-temperature digital-to-analog converter circuit, chip and related device |
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2018
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110380731A (en) * | 2019-07-25 | 2019-10-25 | 上海类比半导体技术有限公司 | A kind of D/A conversion circuit |
| CN113765832A (en) * | 2020-06-03 | 2021-12-07 | 迈络思科技有限公司 | Method and apparatus for a lookup table based coding mechanism for a communication system |
| CN112803948A (en) * | 2020-12-31 | 2021-05-14 | 深圳市紫光同创电子有限公司 | Digital-to-analog conversion circuit and method |
| CN112803948B (en) * | 2020-12-31 | 2022-05-03 | 深圳市紫光同创电子有限公司 | Digital-to-analog conversion circuit and method |
| WO2022141801A1 (en) * | 2020-12-31 | 2022-07-07 | 深圳市紫光同创电子有限公司 | Digital-to-analog conversion circuit and method |
| CN113517891A (en) * | 2021-09-13 | 2021-10-19 | 成都爱旗科技有限公司 | Linear calibration system and method applied to digital-to-analog converter |
| CN113517891B (en) * | 2021-09-13 | 2022-01-04 | 成都爱旗科技有限公司 | Linear calibration system and method applied to digital-to-analog converter |
| CN114650055A (en) * | 2022-03-24 | 2022-06-21 | 深圳市晶扬电子有限公司 | Adaptive delta modulation analog-digital converter with calibration circuit and calibration method |
| CN115694483A (en) * | 2022-10-17 | 2023-02-03 | 电子科技大学 | Resistor network, low-temperature digital-to-analog converter circuit, chip and related device |
| CN115694483B (en) * | 2022-10-17 | 2024-03-29 | 电子科技大学 | Resistor network, low-temperature digital-to-analog converter circuit, chip and related devices |
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