CN107994095B - High-gain ultraviolet to near infrared InGaAs detector chip - Google Patents

High-gain ultraviolet to near infrared InGaAs detector chip Download PDF

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CN107994095B
CN107994095B CN201711275111.3A CN201711275111A CN107994095B CN 107994095 B CN107994095 B CN 107994095B CN 201711275111 A CN201711275111 A CN 201711275111A CN 107994095 B CN107994095 B CN 107994095B
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layer
ingaas
metal electrode
graphene
sio
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CN107994095A (en
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曹高奇
邵秀梅
李雪
杨波
邓双燕
程吉凤
于一臻
龚海梅
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Shanghai Institute of Technical Physics of CAS
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/184Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
    • H01L31/1844Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/105Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PIN type
    • H01L31/1055Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PIN type the devices comprising amorphous materials of Group IV of the Periodic Table
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
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  • Manufacturing & Machinery (AREA)
  • Light Receiving Elements (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

The invention discloses a high-gain ultraviolet to near infrared InGaAs detector chip, which sequentially comprises the following structures on an indium phosphide (InP) substrate: inP contact layer, inGaAs absorption layer, silicon oxide (SiO) 2 ) Dielectric layer, source electrode metal electrode, graphene layer, drain electrode metal electrode and gate electrode metal electrode, as shown in the figure. The advantage of this patent lies in: on one hand, graphene shows good semi-metal characteristics, and can form a Schottky photodiode when being contacted with the InGaAs layer, so that light detection is realized; on the other hand, the graphene has no forbidden bandwidth and excellent optical transmittance, so that the spectral response of the novel InGaAs detector can be widened to near ultraviolet, and meanwhile, the light absorption of the InGaAs layer can be increased; in addition, graphene has extremely high mobility and extremely fast carrier transmission characteristics, so that the detector has extremely high quantum gain characteristics for the injection of photon-generated carriers.

Description

High-gain ultraviolet to near infrared InGaAs detector chip
Technical Field
The invention relates to a novel detector chip, in particular to a high-gain ultraviolet to near-infrared InGaAs detector chip which can realize detection in a wide wave band range including ultraviolet light, visible light and near-infrared light.
Background
The conventional structure of the InGaAs detector chip is an InP/InGaAs/InP structure, and the InGaAs detector chip has good performance in a near infrared band, so that the InGaAs detector chip has wide application value in the fields of civil use, military use and aerospace. The absorption cut-off wavelength of the InGaAs material is in the near infrared band, which means that the absorption spectrum of the InGaAs material can cover visible light and even ultraviolet light with the wavelength smaller than near infrared, but the detection of the InP/InGaAs/InP detector to the visible light and ultraviolet band is inhibited due to the absorption effect of the InP substrate and the InP cap layer, so that the conventional InGaAs detector cannot detect the targets of the ultraviolet and visible band, and cannot identify some widely-used lasers with shorter wavelengths. In addition, for some applications requiring simultaneous detection of ultraviolet light, visible light and short-wave infrared light, multiple separate detectors are required to detect the ultraviolet light, visible light and short-wave infrared light, which may lead to complex detection systems and large system size and weight. Therefore, a high performance ultraviolet to near infrared detector based on InGaAs material is necessary.
Disclosure of Invention
Based on the problems and development requirements of the conventional InGaAs detector, the invention creatively provides a high-gain ultraviolet to near-infrared InGaAs detector chip, which not only can detect the near-infrared region covered by the conventional InGaAs detector, but also can extend the detection wave band to the visible and ultraviolet wave bands to realize the broadband detection of the ultraviolet, visible and near-infrared regions, and simultaneously, the novel detector has extremely high quantum gain characteristics.
The invention is based on the traditional InGaAs detector to carry out structural and technical improvement, firstly, graphene materials are used for replacing InP cap layer materials, and photon absorption is increased; secondly, a grid control structure is adopted to increase the absorption of photo-generated current; and moreover, graphene is used as a transistor channel, so that the gain of a photocurrent signal is improved.
The cross-sectional structure of the present invention is schematically shown in FIG. 1, which is composed of an InP substrate 1, an InP contact layer 2, an InGaAs absorption layer 3, and SiO 2 Dielectric layer 4, source electrode 5, graphene layer 6, drain electrode 7 and gate electrode 8. Wherein an InP contact layer 2 and an InGaAs absorption layer 3 are grown on an InP substrate by an epitaxial technique, and then an SiO with a thickness of 90-300 nm is deposited on the InGaAs layer 3 2 Dielectric layer 4 is formed on SiO by photolithography and etching 2 Open holes in dielectric layer 4, atomsAnd transferring the graphene 6 with the layer number of 1-5 layers onto the square hole and covering the square hole, finally depositing a source metal electrode 5 and a drain metal electrode 7 on the graphene 6 on the left side, the right side or the upper side and the lower side of the square hole by vapor deposition, and depositing a grid metal electrode 8 on the etched InP contact layer 2.
The key process steps involved in the invention are shown in figure 2, 1) sampling and cleaning, 2) SiO deposition 2 Dielectric layer 4, 3) etching open square holes, 4) transferring graphene 6, 5) etching open gate electrode contact layers, 6) depositing metal electrodes. The specific process flow comprises the following steps:
1, sampling and cleaning, and sequentially ultrasonically cleaning the sample by adopting acetone, ethanol and deionized water for 8-3 mins;
2 deposition of SiO 2 A dielectric layer 4, a silicon nitride diffusion mask 5 with the thickness of 200+/-30 nm is deposited by a Plasma Enhanced Chemical Vapor Deposition (PECVD) technology, the substrate temperature is 330+/-20 ℃, and the RF power is 40+/-10W;
3 etching square holes, and adopting an Inductively Coupled Plasma (ICP) etching technology to etch SiO 2 The dielectric layer 4 is provided with square holes, and the etching conditions are as follows: ICP power of 1500 and W, RF power of 25-50W, cavity pressure of 9.4mTorr and temperature of 5 ℃, and then corroding for 10s at room temperature by using hydrofluoric acid buffer solution;
4 transferring graphene 6, transferring the graphene with the thickness of 1-5 atomic layers onto the square hole by adopting a dry transfer technology, covering the whole square hole, and enabling the graphene 6 to be in contact with the InGaAs layer absorption layer 3.
Etching the gate electrode contact layer by adopting Ar ion etching technology, wherein the etching conditions are as follows: ion energy is 150-400 eV, beam current is 40-80 cm -3
6 depositing metal electrode, depositing Au with thickness of 50-150 nm by ion beam sputtering process and vacuum degree of 2-5X 10 -2 Pa, the energy of the ion beam is 100 eV-250 eV;
the invention has the advantages that:
A. the novel InGaAs detector chip forms a Schottky special photodiode by utilizing an advanced two-dimensional graphene material and an InGaAs body material, realizes the combination of two dimensions and three dimensions, and can realize spectrum detection.
B. The novel InGaAs detector chip uses the advanced two-dimensional graphene material with zero forbidden band width and excellent light transmittance, so that a wider spectrum and more photons are absorbed by the InGaAs layer, the spectral response of the detector is widened, and the optical response of the detector can be improved.
C. The novel InGaAs detector chip uses advanced two-dimensional graphene materials, and has high gain and high response rate characteristics because the graphene materials have low state density, high carrier mobility and extremely fast carrier transmission characteristics, so that the carriers have extremely high quantum gain characteristics when transmitted in graphene.
D. The novel detector chip has the advantages of simpler preparation process, lower preparation cost and more conservation.
Drawings
Fig. 1 is a schematic view of a two-dimensional cross-sectional structure of the present invention.
FIG. 2 is a flow chart of the preparation process of the invention.
In the figure:
1—inp substrate;
2—inp contact layer;
3—ingaas absorber layer;
4——SiO 2 a dielectric layer;
5—a source metal electrode;
6—a graphene layer;
7-drain metal electrode;
8-gate metal electrode.
Detailed Description
The following describes the embodiments of the present invention in detail with reference to the drawings. As shown in fig. 2, the specific process flow of this embodiment is as follows:
example 1
1, sampling and cleaning, and sequentially ultrasonically cleaning the sample by adopting acetone, ethanol and deionized water for 8-3 mins;
2 depositing a SiO2 dielectric layer 4, and depositing a silicon nitride diffusion mask 5 with the thickness of 200+/-30 nm by a Plasma Enhanced Chemical Vapor Deposition (PECVD) technology, wherein the substrate temperature is 330+/-20 ℃ and the RF power is 40+/-10W;
3 etching square holes, and adopting an Inductively Coupled Plasma (ICP) etching technology to etch SiO 2 The dielectric layer 4 is provided with square holes, and the etching conditions are as follows: ICP power of 1500 and W, RF power of 25-50W, cavity pressure of 9.4mTorr and temperature of 5 ℃, and then corroding for 10s at room temperature by using hydrofluoric acid buffer solution;
4 transferring graphene 6, transferring the graphene with the thickness of 1 atomic layer onto the square hole by adopting a dry transfer technology, covering the whole square hole, and enabling the graphene 6 to be in contact with the InGaAs layer absorption layer 3.
Etching the gate electrode contact layer by adopting Ar ion etching technology, wherein the etching conditions are as follows: ion energy is 150-400 eV, beam current is 40-80 cm -3
6 depositing metal electrode, depositing Au with thickness of 50-150 nm by ion beam sputtering process and vacuum degree of 2-5X 10 -2 Pa, the energy of the ion beam is 100 eV-250 eV;
example 2
1, sampling and cleaning, and sequentially ultrasonically cleaning the sample by adopting acetone, ethanol and deionized water for 8-3 mins;
2 depositing a SiO2 dielectric layer 4, and depositing a silicon nitride diffusion mask 5 with the thickness of 200+/-30 nm by a Plasma Enhanced Chemical Vapor Deposition (PECVD) technology, wherein the substrate temperature is 330+/-20 ℃ and the RF power is 40+/-10W;
3 etching square holes, and adopting an Inductively Coupled Plasma (ICP) etching technology to etch SiO 2 The dielectric layer 4 is provided with square holes, and the etching conditions are as follows: ICP power of 1500 and W, RF power of 25-50W, cavity pressure of 9.4mTorr and temperature of 5 ℃, and then corroding for 10s at room temperature by using hydrofluoric acid buffer solution;
4 transferring graphene 6, transferring the graphene with the thickness of 3 atomic layers onto the square hole by adopting a dry transfer technology, covering the whole square hole, and enabling the graphene 6 to be in contact with the InGaAs layer absorption layer 3.
Etching the gate electrode contact layer by adopting Ar ion etching technology, wherein the etching conditions are as follows: ion energy is 150-400 eV, beam current is 40-80 cm -3
6 depositing goldBelongs to an electrode, adopts an ion beam sputtering process to deposit Au with the thickness of 50-150 nm and the vacuum degree of 2-5 multiplied by 10 -2 Pa, the energy of the ion beam is 100 eV-250 eV;
example 3
1, sampling and cleaning, and sequentially ultrasonically cleaning the sample by adopting acetone, ethanol and deionized water for 8-3 mins;
2 depositing a SiO2 dielectric layer 4, and depositing a silicon nitride diffusion mask 5 with the thickness of 200+/-30 nm by a Plasma Enhanced Chemical Vapor Deposition (PECVD) technology, wherein the substrate temperature is 330+/-20 ℃ and the RF power is 40+/-10W;
3 etching square holes, and adopting an Inductively Coupled Plasma (ICP) etching technology to etch SiO 2 The dielectric layer 4 is provided with square holes, and the etching conditions are as follows: ICP power of 1500 and W, RF power of 25-50W, cavity pressure of 9.4mTorr and temperature of 5 ℃, and then corroding for 10s at room temperature by using hydrofluoric acid buffer solution;
4 transferring graphene 6, transferring the graphene with the thickness of 5 atomic layers onto the square hole by adopting a dry transfer technology, covering the whole square hole, and enabling the graphene 6 to be in contact with the InGaAs layer absorption layer 3.
Etching the gate electrode contact layer by adopting Ar ion etching technology, wherein the etching conditions are as follows: ion energy is 150-400 eV, beam current is 40-80 cm -3
6 depositing metal electrode, depositing Au with thickness of 50-150 nm by ion beam sputtering process and vacuum degree of 2-5X 10 -2 Pa, the energy of the ion beam is 100 eV-250 eV.

Claims (1)

1. A high-gain ultraviolet to near infrared InGaAs detector chip comprises an InP (1) substrate, an InP contact layer (2), an InGaAs absorption layer (3), and SiO 2 Dielectric layer (4) and graphite alkene layer (6), its characterized in that:
the structure of the detector chip is as follows: an InP contact layer (2), an InGaAs absorption layer (3), and SiO are sequentially arranged on an InP substrate (1) 2 Dielectric layer (4), siO 2 A hole is arranged in the center of the dielectric layer (4) and SiO is arranged on the center of the dielectric layer 2 A graphene layer (6) is arranged on the dielectric layer (4), and the graphene layer is filled in SiO 2 In the central square hole of the dielectric layer (4) and is attracted with the InGaAs of the lower layerThe receiving layer (3) forms heterojunction contact, the source electrode metal electrode (5) and the drain electrode metal electrode (7) are arranged on the graphene layer (6) and positioned at the left side and the right side or the upper side and the lower side of the square hole, and the grid electrode metal electrode (8) is arranged on the InP contact layer (2);
the SiO is 2 The thickness of the dielectric layer (4) is 90 nm-300 nm;
the number of the atomic layers of the graphene layer (6) is 1-5;
the source metal electrode (5) and the drain metal electrode (7) are Ti, pt and Au metal electrodes;
the grid metal electrode (8) is a Cr and Au metal electrode;
the InP contact layer (2) and the InGaAs absorption layer (3) are grown on the InP substrate by an epitaxial technology, and then a layer of SiO with the thickness of 90-300 nm is deposited on the InGaAs layer (3) 2 Dielectric layer (4) is formed on SiO by photoetching and etching process 2 And (3) opening square holes on the dielectric layer (4), transferring a graphene layer (6) with the atomic layer number of 1-5 layers onto the square holes and covering the square holes, finally depositing a source metal electrode (5) and a drain metal electrode (7) on the graphene layer (6) on the left side, the right side or the upper side and the lower side of the square holes by vapor deposition, and depositing a grid metal electrode (8) on the etched InP contact layer (2).
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CN108831951A (en) * 2018-06-11 2018-11-16 复旦大学 A kind of molybdenum-disulfide radical is visible to near-infrared InGaAs detector and preparation method thereof
CN108899389A (en) * 2018-06-19 2018-11-27 复旦大学 It is a kind of graphene-based ultraviolet to near-infrared InGaAs detector chip
CN108899378A (en) * 2018-06-19 2018-11-27 复旦大学 A kind of grid-control is graphene-based ultraviolet to near-infrared InGaAs detector chip
CN109273554A (en) * 2018-08-30 2019-01-25 上海电力学院 A kind of graphene-based built in field indium gallium arsenic detector
CN109256436A (en) * 2018-09-03 2019-01-22 中国电子科技集团公司第十研究所 A kind of graphene infrared detecting unit and preparation method thereof
US11682741B2 (en) 2019-07-04 2023-06-20 Mitsubishi Electric Corporation Electromagnetic wave detector

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