CN107958908B

CN107958908B - Method for forming SONOS device

Info

Publication number: CN107958908B
Application number: CN201711168493.XA
Authority: CN
Inventors: 丁航晨; 张强; 黄冠群
Original assignee: Shanghai Huali Microelectronics Corp
Current assignee: Shanghai Huali Microelectronics Corp
Priority date: 2017-11-21
Filing date: 2017-11-21
Publication date: 2020-04-10
Anticipated expiration: 2037-11-21
Also published as: CN107958908A

Abstract

The invention discloses a forming method of an SONOS device, which comprises the following steps: providing a semiconductor substrate, wherein the semiconductor substrate comprises a storage tube region and a selection tube region which are adjacent, and a grid oxide layer is arranged above the selection tube region; forming an ONO structure covering the grid oxide layer and the storage tube region; removing the ONO structure above the partial selection pipe area far away from the pipe storage area; and forming a protective layer on the side wall of the ONO structure above the grid oxide layer by adopting an in-situ water vapor oxidation generation process. In the invention, part of the ONO structure above the area of the selection tube is removed to expose the side wall of the ONO structure, and the side wall of the ONO structure is oxidized by adopting an in-situ water vapor oxidation generation process to form a side wall protection layer, thereby improving the performance of the storage tube.

Description

Method for forming SONOS device

Technical Field

The invention relates to the technical field of semiconductor integrated circuit manufacturing, in particular to a forming method of a SONOS device.

Background

As flash memory technology is continuously developed, when the floating gate flash memory technology encounters various challenges caused by size reduction, a SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) memory exhibits unique advantages. The floating gate interference-free CMOS floating gate circuit overcomes the technical bottleneck of floating gate interference, has lower operating voltage, can be perfectly beautiful and healthy with the traditional CMOS process, and is widely applied to the fields of smart cards, financial confidentiality, industrial embedded control and the like.

A typical SONOS structure is composed of a silicon substrate (S) -a tunnel oxide (O) -a charge storage layer (N) -a blocking oxide (O) -a polysilicon gate (S). This structure uses tunneling of electrons for compiling, and injection of holes for erasing data.

In the existing SONOS process flow, a grid oxide layer of a selection tube is prepared firstly, an ONO layer, namely a tunneling oxide layer, a charge storage layer and a blocking oxide layer, is prepared, the blocking oxide layer of the ONO structure in the selection tube area is removed by dry etching, the charge storage layer of the ONO structure in the selection tube area is removed by wet etching, and the charge storage layer is directly exposed outside and is easily influenced by subsequent processes, so that the performance of an SONOS device is influenced.

Disclosure of Invention

The invention aims to provide a forming method of an SONOS device, which solves the problem that the performance of the device is influenced by the fact that a charge storage layer is exposed outside in the prior art.

In order to solve the above technical problem, the present invention provides a method for forming a SONOS device, including:

providing a semiconductor substrate, wherein the semiconductor substrate comprises a storage tube region and a selection tube region which are adjacent, and a grid oxide layer is arranged above the selection tube region;

forming an ONO structure covering the grid oxide layer and the storage tube region;

removing the ONO structure above a part of the selection pipe area far away from the storage pipe area;

and forming a protective layer on the side wall of the ONO structure above the grid oxide layer by adopting an in-situ water vapor oxidation generation process.

Optionally, the ONO structure includes a tunneling oxide layer, a charge storage layer, and a blocking oxide layer stacked in sequence.

Optionally, the tunneling oxide layer is a silicon oxide layer with a thickness of

Optionally, a dry etching process is used to remove the tunneling oxide layer in the ONO structure.

Optionally, the charge storage layer is a silicon nitride layer with a thickness of

Optionally, a wet etching process is used to remove the charge storage layer in the ONO structure.

Optionally, the oxidation barrier layer is a silicon oxide layer with a thickness of

Optionally, a dry etching process is used to remove the blocking oxide layer in the ONO structure.

Optionally, the thickness of the protective layer is

Optionally, the gas generated by the in-situ steam oxidation generation process is nitrous oxide and hydrogen, or hydrogen and oxygen.

Compared with the prior art, the forming method of the SONOS device provided by the invention has the following beneficial effects:

the forming method of the SONOS device comprises the following steps: providing a semiconductor substrate, wherein the semiconductor substrate comprises an area adjacent to a storage tube and a selection tube area, and a grid oxide layer is arranged above the selection tube area; forming an ONO structure covering the grid oxide layer and the storage tube region; removing the ONO structure above a part of the selection pipe area far away from the storage pipe area; and forming a protective layer on the side wall of the ONO structure above the grid oxide layer by adopting an in-situ water vapor oxidation generation process. In the invention, part of the ONO structure above the area of the selection tube is removed to expose the side wall of the ONO structure, and the side wall of the ONO structure is oxidized by adopting an in-situ water vapor oxidation generation process to form a side wall protection layer, thereby improving the performance of the storage tube.

Drawings

FIG. 1 is a flow chart of a method for forming a SONOS device according to an embodiment of the present invention;

FIG. 2 is a schematic diagram of forming a gate oxide layer of a select transistor according to an embodiment of the present invention;

FIG. 3 is a schematic diagram illustrating the formation of an ONO structure in accordance with one embodiment of the present invention;

FIG. 4 is a schematic diagram illustrating an ONO structure etched in accordance with an embodiment of the present invention;

fig. 5 is a schematic diagram illustrating the formation of a sidewall protection layer according to an embodiment of the invention.

Detailed Description

The method of forming a SONOS device of the present invention will now be described in more detail with reference to the accompanying schematic drawings, in which preferred embodiments of the invention are shown, it being understood that one skilled in the art may modify the invention herein described while still achieving the advantageous results of the invention. Accordingly, the following description should be construed as broadly as possible to those skilled in the art and not as limiting the invention.

In the interest of clarity, not all features of an actual implementation are described. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. It will of course be appreciated that in the development of any such actual embodiment, numerous implementation-specific details must be set forth in order to achieve the developer's specific goals, such as compliance with system-related and business-related constraints, which will vary from one implementation to another. Moreover, it will be appreciated that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking for those of ordinary skill in the art.

The invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. Advantages and features of the present invention will become apparent from the following description and from the claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.

The core idea of the invention is to provide a method for forming a SONOS device, which comprises the following steps: providing a semiconductor substrate, wherein the semiconductor substrate comprises an area adjacent to a storage tube and a selection tube area, and a grid oxide layer is arranged above the selection tube area; forming an ONO structure covering the grid oxide layer and the storage tube region; removing the ONO structure above a part of the selection pipe area far away from the storage pipe area; and forming a protective layer on the side wall of the ONO structure above the grid oxide layer by adopting an in-situ water vapor oxidation generation process. In the invention, part of the ONO structure above the area of the selection tube is removed to expose the side wall of the ONO structure, and the side wall of the ONO structure is oxidized by adopting an in-situ water vapor oxidation generation process to form a side wall protection layer.

The method for forming the SONOS device according to the present invention is described in detail below with reference to the accompanying drawings, where fig. 1 is a flowchart of the forming method, and fig. 2 to 5 are schematic structural diagrams corresponding to respective steps, and the method for forming the SONOS device includes the following steps:

step S1 is performed, and referring to fig. 2, a semiconductor substrate 100 is provided, the semiconductor substrate 100 including adjacent storage tube regions a and a selectionA tube region b, wherein a gate oxide layer 110 is arranged above the selection tube region 110, the gate oxide layer 110 is silicon oxide, and the thickness of the silicon oxide is

Step S2 is executed, referring to fig. 3, an ONO structure 200 is formed, wherein the ONO structure 200 covers the gate oxide layer 110 and the storage tube region a. The ONO structure 200 includes a tunnel oxide layer 211, a charge storage layer 212, and a blocking oxide layer 213, which are sequentially stacked. In this embodiment, the tunneling oxide layer 211 is a silicon oxide layer with a thickness of

For example,

and the charge storage layer 212 is a silicon nitride layer with a thickness of

For example,

and the barrier oxide layer 213 is a silicon oxide layer with a thickness of

For example,

and the like.

Step S3 is executed, and referring to fig. 4, the ONO structure is removed from the portion of the selection pipe region b away from the storage pipe region a. Specifically, firstly, a dry etching process is adopted to remove the tunneling oxide layer 213 in the ONO structure 200, then a wet etching process is adopted to remove the charge storage layer 212 in the ONO structure 200, and then a dry etching process is adopted to remove the blocking oxide layer 211 in the ONO structure 200, so that the silicon nitride layer 212 in the side wall of the ONO structure 200 is exposed. In this embodiment, only the portion of the ONO structure above the select region is removed, and the portion of the ONO structure above the portion of the gate oxide layer 110 adjacent to the storage region a is remained.

Step S4 is executed, and referring to fig. 5, an In-situ steam oxidation (ISSG) process is used to form a protection layer on the sidewall of the ONO structure, specifically, the silicon nitride layer 212 on the sidewall of the ONO structure 200 above the gate oxide layer 110 is oxidized to form the protection layer 300. The protective layer is silicon oxide, and the thickness of the silicon oxide protective layer is

It can be understood that the silicon oxide protective layer can prevent the silicon nitride layer in the ONO structure from being exposed outside, avoid the influence of the outside on the silicon nitride charge storage and improve the performance of the storage tube.

It should be noted that ISSG is a novel low-pressure rapid oxidation thermal annealing technology, and is mainly applied to the growth of ultra-thin oxide films, shallow trench isolation edge rounding (STI corner rounding) and the preparation of oxynitride films at present. In this example, hydrogen H was used₂And oxygen O₂As a reaction gas, hydrogen and oxygen produce a chemical reaction similar to combustion at high temperature, and a large amount of gas-phase reactive radicals (mainly atomic oxygen) are generated. Meanwhile, the temperature is raised to 800-1100 ℃ in the reaction cavity by a radiation type rapid temperature rise technology, a chemical reaction similar to detonation can occur in the high-temperature atmosphere, and silicon oxide is generated on the surface of the silicon nitride layer 212 due to the extremely strong oxidizing property of atomic oxygen. Of course, the reaction gas of the ISSG process may be H as described above in addition to H₂And O₂Besides, N may be used₂O and H₂It is within the scope of the protection concept of the present invention, and the present invention is not limited thereto.

In summary, the invention, aiming at the existing SONOS process, prevents the sidewall silicon nitride of the SONOS from being directly exposed outside by improving the integration mode, adopts the ISSG preparation method to oxidize the sidewall silicon nitride layer of the SONOS, and thickens the gate oxide layer of the select transistor and the blocking silicon oxide layer in the ONO structure, so that the influence of the subsequent process on the silicon nitride can be reduced through the sidewall oxide layer, and finally the device performance is improved.

It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims

1. A method for forming a SONOS device, comprising:

2. The method of claim 1, wherein the ONO structure comprises a tunnel oxide layer, a charge storage layer, and a blocking oxide layer stacked in sequence.

3. The method of claim 2, wherein the tunneling oxide layer is a silicon oxide layer having a thickness of

4. The method of forming a SONOS device of claim 3, wherein a dry etch process is used to remove the tunnel oxide layer in the ONO structure.

5. The method of forming the SONOS device of claim 2, wherein the electrical connection isThe charge storage layer is a silicon nitride layer with a thickness of

6. The method of forming the SONOS device of claim 5, wherein the charge storage layer in the ONO structure is removed using a wet etch process.

7. The method of forming the SONOS device of claim 2, wherein the barrier oxide layer is a silicon oxide layer having a thickness of

8. The method of claim 7, wherein the barrier oxide layer in the ONO structure is removed by a dry etch process.

9. The method of forming the SONOS device of claim 1, wherein the protective layer has a thickness of

10. The method of forming the SONOS device of claim 1, wherein the in-situ water vapor oxidation generation process reacts nitrous oxide and hydrogen, or hydrogen and oxygen.