CN107958908A - The forming method of SONOS devices - Google Patents
The forming method of SONOS devices Download PDFInfo
- Publication number
- CN107958908A CN107958908A CN201711168493.XA CN201711168493A CN107958908A CN 107958908 A CN107958908 A CN 107958908A CN 201711168493 A CN201711168493 A CN 201711168493A CN 107958908 A CN107958908 A CN 107958908A
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- Prior art keywords
- ono structure
- forming method
- layer
- sonos devices
- selecting pipe
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
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- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Formation Of Insulating Films (AREA)
Abstract
A kind of forming method of SONOS devices of the present invention, including:Semiconductor substrate is provided, the Semiconductor substrate includes adjacent storage tube region and selecting pipe region, and the selecting pipe overlying regions have grid oxic horizon;Form the ONO structure for covering the grid oxic horizon and storage tube region;Remove the ONO structure of the part selecting pipe overlying regions away from the storage area under control domain;Protective layer is formed using the side wall of ONO structure of the steam oxidation in situ generation technique above the grid oxic horizon.In the present invention, the part ONO structure of selecting pipe overlying regions is removed, exposes the side wall of ONO structure, and the side wall of technique oxidation ONO structure is generated using steam oxidation in situ, side wall protective layer is formed, improves the performance of storage tube.
Description
Technical field
The present invention relates to semiconductor integrated circuit manufacturing technology field, more particularly to a kind of forming method of SONOS devices.
Background technology
As flash memory technology continues to develop, when floating gate flash memory technology suffers from the various challenges that size reduction is brought,
SONOS (Silicon-Oxide-Nitride-Oxide-Silicon, silicon-oxide-nitride-oxide-silicon) memory exhibition
Reveal unique advantage.It overcomes the technical bottleneck of floating boom interference, possesses lower operation voltage, at the same can and tradition
The perfect strong honor of CMOS technology, is widely used in the various fields such as smart card, finance secrecy, industrial embedded Control.
Typical SONOS structures are by silicon substrate (S)-tunnel oxide (O)-charge storage layer (N)-barrier oxide layer
(O)-polysilicon gate (S) forms.This structure is compiled using the tunnelling of electronics, and hole is injected to carry out data
Erasing.
In existing SONOS technological processes, selecting pipe grid oxic horizon is first prepared, then prepares ONO layer, is i.e. tunnel oxide
Layer, charge storage layer, barrier oxide layer, the barrier oxide layer of the ONO structure in selecting pipe region, then profit are removed using dry etching
The charge storage layer of the ONO in selecting pipe region is removed with wet etching, charge storage layer is directly exposed to outside, after being easily subject to
The influence of continuous technique, and then influence SONOS device performances.
The content of the invention
It is an object of the invention to the forming method of SONOS devices, solves charge storage layer in the prior art and is exposed to outside
Face rings the problem of device performance.
In order to solve the above technical problems, the present invention provides a kind of forming method of SONOS devices, including:
Semiconductor substrate is provided, the Semiconductor substrate includes adjacent storage tube region and selecting pipe region, the choosing
Selecting pipe overlying regions has grid oxic horizon;
Form the ONO structure for covering the grid oxic horizon and storage tube region;
Remove the ONO structure of the part selecting pipe overlying regions away from the storage tube region;
Protection is formed using the side wall of ONO structure of the steam oxidation in situ generation technique above the grid oxic horizon
Layer.
Optionally, the ONO structure includes tunnel oxide, charge storage layer and the barrier oxide layer stacked gradually.
Optionally, the tunnel oxide is silicon oxide layer, and thickness is
Optionally, the tunnel oxide in the ONO structure is removed using dry etch process.
Optionally, the charge storage layer is silicon nitride layer, and thickness is
Optionally, the charge storage layer in the ONO structure is removed using wet-etching technology.
Optionally, the barrier oxide layer is silicon oxide layer, and thickness is
Optionally, the barrier oxide layer in the ONO structure is removed using dry etch process.
Optionally, the thickness of the protective layer is
Optionally, the gas of the steam oxidation generation technological reaction in situ be nitrous oxide and hydrogen, or hydrogen with
Oxygen.
Compared with prior art, the forming method of SONOS devices provided by the invention has the advantages that:
The forming method of the SONOS devices of the present invention, including:Semiconductor substrate is provided, the Semiconductor substrate includes depositing
Adjacent region and selecting pipe region are managed in storage, and the selecting pipe overlying regions have grid oxic horizon;Formed and cover the grid
Oxide layer and the ONO structure in storage tube region;Remove the part selecting pipe overlying regions away from the storage tube region
ONO structure;Protection is formed using the side wall of ONO structure of the steam oxidation in situ generation technique above the grid oxic horizon
Layer.In the present invention, the part ONO structure of selecting pipe overlying regions is removed, exposes the side wall of ONO structure, and using water in situ
The side wall of vapour oxidation generation technique oxidation ONO structure, forms side wall protective layer, improves the performance of storage tube.
Brief description of the drawings
Fig. 1 is the flow chart of SONOS device forming methods in one embodiment of the invention;
Fig. 2 is the schematic diagram that selecting pipe grid oxic horizon is formed in one embodiment of the invention;
Fig. 3 is the schematic diagram that ONO structure is formed in one embodiment of the invention;
Fig. 4 is the schematic diagram that ONO structure is etched in one embodiment of the invention;
Fig. 5 is the schematic diagram that side wall protective layer is formed in one embodiment of the invention.
Embodiment
The forming method of the SONOS devices of the present invention is described in more detail below in conjunction with schematic diagram, wherein table
Showing the preferred embodiment of the present invention, it should be appreciated that those skilled in the art can change invention described herein, and still
Realize the advantageous effects of the present invention.Therefore, description below is appreciated that for the widely known of those skilled in the art, and
It is not intended as limitation of the present invention.
For clarity, whole features of practical embodiments are not described.In the following description, it is not described in detail known function
And structure, because they can make the present invention chaotic due to unnecessary details.It will be understood that opening in any practical embodiments
In hair, it is necessary to a large amount of implementation details are made to realize the specific objective of developer, such as according to related system or related business
Limitation, another embodiment is changed into by one embodiment.Additionally, it should think that this development is probably complicated and expends
Time, but it is only to those skilled in the art routine work.
More specifically description is of the invention by way of example referring to the drawings in the following passage.Will according to following explanation and right
Book is sought, advantages and features of the invention will become apparent from.It should be noted that attached drawing is using very simplified form and using non-
Accurately ratio, only for the purpose of facilitating and clarifying the purpose of the embodiments of the invention.
The core concept of the present invention is, there is provided a kind of forming method of SONOS devices, including:Semiconductor substrate is provided,
The Semiconductor substrate includes the adjacent region and selecting pipe region of storage tube, and the selecting pipe overlying regions have gate oxidation
Layer;Form the ONO structure for covering the grid oxic horizon and storage tube region;Remove the part institute away from the storage tube region
State the ONO structure of selecting pipe overlying regions;Tied using ONO of the steam oxidation in situ generation technique above the grid oxic horizon
The side wall of structure forms protective layer.In the present invention, the part ONO structure of selecting pipe overlying regions is removed, exposes the side of ONO structure
Wall, and using the side wall of steam oxidation generation technique oxidation ONO structure in situ, form side wall protective layer.
The forming method of the SONOS devices of the present invention is described in detail below in conjunction with attached drawing, Fig. 1 is forming method
Flow chart, Fig. 2~Fig. 5 are the corresponding structure diagram of each step, and the forming method of SONOS devices includes the following steps:
Step S1 is performed, refering to what is shown in Fig. 2, providing Semiconductor substrate 100, the Semiconductor substrate 100 includes adjacent
Storage tube region a and selecting pipe region b, the top of selecting pipe region 110 have grid oxic horizon 110, the gate oxidation
Layer 110 is silica, and the thickness of silica is
Step S2 is performed, refering to what is shown in Fig. 3, forming ONO structure 200, the ONO structure 200 covers the gate oxidation
110 and storage tube region a of layer.The ONO structure 200 include stack gradually tunnel oxide 211, charge storage layer 212 and
Barrier oxide layer 213.In the present embodiment, the tunnel oxide 211 is silicon oxide layer, and thickness isFor example,Deng the charge storage layer 212 is silicon nitride layer, and thickness isFor example, Deng the barrier oxide layer 213 is silicon oxide layer, and thickness isFor example,
Deng.
Step S3 is performed, refering to what is shown in Fig. 4, removing on the part selecting pipe region b away from the storage tube region a
The ONO structure of side.Specifically, first, the tunnel oxide 213 in the ONO structure 200 is removed using dry etch process,
Afterwards, the charge storage layer 212 in the ONO structure 200 is removed using wet-etching technology, then, using dry etching work
Skill removes the barrier oxide layer 211 in the ONO structure 200, so that the silicon nitride layer in exposing the side wall of ONO structure 200
212.In the present embodiment, the ONO structure of part selecting pipe overlying regions is only removed, is also retained close to the part of storage tube region a
The part ONO structure of the top of grid oxic horizon 110.
Step S4 is performed, refering to what is shown in Fig. 5, generating (In-situ stream using steam oxidation in situ
Generation, ISSG) technique generates protective layer in ONO structure side wall, specifically, aoxidizing the top of grid oxic horizon 110
200 side wall of ONO structure silicon nitride layer 212, formed protective layer 300.The protective layer is silica, and the silica is protected
The thickness of sheath isIt is understood that silicon oxide protective layer can avoid the silicon nitride layer in ONO structure sudden and violent
Expose outside, avoid the exterior influence to silicon nitride charge storage, improve the performance of storage tube.
It should be noted that ISSG is a kind of New Low Voltage Quick Oxidation thermal annealing technology, it is mainly used at present ultra-thin
The preparation of oxide film growth, shallow-trench isolation rounded at the edge (STI corner rounding) and nitrogen oxygen film.This implementation
In example, using hydrogen H2With oxygen O2As reacting gas, the chemical reaction that hydrogen can be with oxygen generation similar to burning at high temperature,
Generate substantial amounts of gas-phase activity free radical (being wherein mainly elemental oxygen).Meanwhile quickly risen by radiant type in reaction cavity
Temperature technique is warming up to 800 DEG C -1100 DEG C, under this high temperature atmosphere, it may occur that similar to the chemical reaction of detonation, due to elemental oxygen
With extremely strong oxidisability, so that in 212 Surface Creation silica of silicon nitride layer.Certainly, the reacting gas of ISSG techniques except
Can be above-mentioned H2And O2Outside or N2O and H2, also within the thought range that the present invention protects, the present invention is right for this
This is not limited.
In conclusion the present invention is directed to existing SONOS techniques, by improving integration mode, prevent the side wall of SONOS from nitrogenizing
Silicon is directly exposed to outside, using the side wall silicon nitride layer of the preparation method oxidation SONOS of ISSG, while thickeies selection tube grid
Barrier oxidation silicon layer in oxide layer and ONO structure, influence of the subsequent technique to silicon nitride can be reduced by sidewall oxide,
It is final to improve device performance.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
God and scope.In this way, if these modifications and changes of the present invention belongs to the scope of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to comprising including these modification and variations.
Claims (10)
- A kind of 1. forming method of SONOS devices, it is characterised in that including:Semiconductor substrate is provided, the Semiconductor substrate includes adjacent storage tube region and selecting pipe region, the selecting pipe Overlying regions have grid oxic horizon;Form the ONO structure for covering the grid oxic horizon and storage tube region;Remove the ONO structure of the part selecting pipe overlying regions away from the storage tube region;Protective layer is formed using the side wall of ONO structure of the steam oxidation in situ generation technique above the grid oxic horizon.
- 2. the forming method of SONOS devices as claimed in claim 1, it is characterised in that the ONO structure includes stacking gradually Tunnel oxide, charge storage layer and barrier oxide layer.
- 3. the forming method of SONOS devices as claimed in claim 2, it is characterised in that the tunnel oxide is silica Layer, thickness are
- 4. the forming method of SONOS devices as claimed in claim 3, it is characterised in that institute is removed using dry etch process State the tunnel oxide in ONO structure.
- 5. the forming method of SONOS devices as claimed in claim 2, it is characterised in that the charge storage layer is silicon nitride Layer, thickness are
- 6. the forming method of SONOS devices as claimed in claim 5, it is characterised in that institute is removed using wet-etching technology State the charge storage layer in ONO structure.
- 7. the forming method of SONOS devices as claimed in claim 2, it is characterised in that the barrier oxide layer is silica Layer, thickness are
- 8. the forming method of SONOS devices as claimed in claim 7, it is characterised in that institute is removed using dry etch process State the barrier oxide layer in ONO structure.
- 9. the forming method of SONOS devices as claimed in claim 1, it is characterised in that the thickness of the protective layer is
- 10. the forming method of SONOS devices as claimed in claim 1, it is characterised in that the original position steam oxidation generation work The gas of skill reaction is nitrous oxide and hydrogen, or hydrogen and oxygen.
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108831888A (en) * | 2018-06-13 | 2018-11-16 | 上海华力微电子有限公司 | A kind of SONOS memory and its manufacturing method |
CN109461739A (en) * | 2018-10-18 | 2019-03-12 | 上海华力微电子有限公司 | A method of improving the polysilicon membrane deposition characteristics of SONOS memory |
CN109616475A (en) * | 2018-12-12 | 2019-04-12 | 上海华力微电子有限公司 | Remove the remaining process of barrier oxide layer in side wall ONO structure |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101103456A (en) * | 2005-01-24 | 2008-01-09 | 斯班逊有限公司 | Semiconductor device and its making method |
KR20110078068A (en) * | 2009-12-30 | 2011-07-07 | 주식회사 동부하이텍 | Method for fabricating gate of flash memory device and structure thereof |
CN103680611A (en) * | 2012-09-18 | 2014-03-26 | 中芯国际集成电路制造(上海)有限公司 | 3D (three-dimensional) NAND memory and manufacturing method thereof |
CN104112656A (en) * | 2013-04-18 | 2014-10-22 | 中芯国际集成电路制造(上海)有限公司 | Method for improving reliability of gate oxide layer of peripheral circuit area of flash memory |
CN105489557A (en) * | 2014-10-01 | 2016-04-13 | 瑞萨电子株式会社 | Method of manufacturing semiconductor device |
CN105789132A (en) * | 2014-12-16 | 2016-07-20 | 中芯国际集成电路制造(上海)有限公司 | Side wall forming method |
CN106129011A (en) * | 2016-09-27 | 2016-11-16 | 上海华力微电子有限公司 | A kind of method improving SONOS structure embedded flash memory performance |
-
2017
- 2017-11-21 CN CN201711168493.XA patent/CN107958908B/en active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101103456A (en) * | 2005-01-24 | 2008-01-09 | 斯班逊有限公司 | Semiconductor device and its making method |
KR20110078068A (en) * | 2009-12-30 | 2011-07-07 | 주식회사 동부하이텍 | Method for fabricating gate of flash memory device and structure thereof |
CN103680611A (en) * | 2012-09-18 | 2014-03-26 | 中芯国际集成电路制造(上海)有限公司 | 3D (three-dimensional) NAND memory and manufacturing method thereof |
CN104112656A (en) * | 2013-04-18 | 2014-10-22 | 中芯国际集成电路制造(上海)有限公司 | Method for improving reliability of gate oxide layer of peripheral circuit area of flash memory |
CN105489557A (en) * | 2014-10-01 | 2016-04-13 | 瑞萨电子株式会社 | Method of manufacturing semiconductor device |
CN105789132A (en) * | 2014-12-16 | 2016-07-20 | 中芯国际集成电路制造(上海)有限公司 | Side wall forming method |
CN106129011A (en) * | 2016-09-27 | 2016-11-16 | 上海华力微电子有限公司 | A kind of method improving SONOS structure embedded flash memory performance |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108831888A (en) * | 2018-06-13 | 2018-11-16 | 上海华力微电子有限公司 | A kind of SONOS memory and its manufacturing method |
CN108831888B (en) * | 2018-06-13 | 2021-01-29 | 上海华力微电子有限公司 | SONOS memory and manufacturing method thereof |
CN109461739A (en) * | 2018-10-18 | 2019-03-12 | 上海华力微电子有限公司 | A method of improving the polysilicon membrane deposition characteristics of SONOS memory |
CN109616475A (en) * | 2018-12-12 | 2019-04-12 | 上海华力微电子有限公司 | Remove the remaining process of barrier oxide layer in side wall ONO structure |
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