CN107908823A - A kind of device and loading method for storing multiple FPGA files - Google Patents

Abstract

The present invention relates to a kind of device and loading method for storing multiple FPGA files, its device includes FPGA file downloads module, communication unit, data path selecting unit, FPGA file storage units, FPGA loading units and FPGA unit.Communication unit realizes the data transfer with FPGA file download modules using the controller of USB interface, is responsible for FPGA file datas to be written to FPGA file storage units；FPGA loading units realize digital independent and the FPGA unit configuration of FPGA files using programmable CPLD；Its method is included in FPGA unit power up phase, and by Loading Control signal switch data path selection unit, currently valid FPGA file datas are loaded into FPGA unit；Its method, which further includes FPGA file downloads module, can download new FPGA files, concurrently act the process for reconfiguring FPGA unit.This devices and methods therefor makes full use of the configurable characteristic of FPGA, stores multiple FPGA files at the same time in set of device, realizes the hardware capability of multiple FPGA files, saved hardware cost.

Description

A kind of device and loading method for storing multiple FPGA files

Technical field

The present invention relates to chip emulator technical field, and in particular to a kind of device for storing multiple FPGA files and loading Method.

Background technology

In chip emulator field, using FPGA (Field Programmable Gate Array) emulation chip function Emulator it is commonplace.The advantages of this kind of chip emulator：Before chip TAPEOUT, software-hardware synergism can be carried out and set Meter and verification, can also carry out chip application development and debugging, list and gain time in advance for chip product；This kind of chip emulation Device uses FPGA architecture, it is easy to accomplish chip functions upgrade.If the problems such as chip product increases new demand or finds design defect, It by FPGA synthesis and can realize by updating RTL code, the bit files of generation reconfigured in FPGA, just can be real The function renewal of existing chip product.

FPGA files (the bit files that FPGA is generated after realizing) configuration process, basic method are：Loading equipemtn passes through JTAG (Joint Test Action Group) path is connected with FPGA device, is passed through FPGA file datas by configuration software The RAM of the control logic write-in FPGA of FPGA device, or private memory PROM.FPGA configurations are carried out using jtag interface, are needed Special purpose interface device and specialized configuration software are wanted, general user uses inconvenience.

Current many chip emulators use the USB interface of plug and play, and FPGA files are stored to Flash outside piece and are stored In device.After the power is turned on, FPGA control logics read FPGA data to chip emulator outside piece automatically in flash storage, complete FPGA configuration process, realizes that chip functions emulate.

In the chip emulator of this kind of USB interface, every emulator stores a FPGA file, can only realize a core The functional simulation of flake products.User uses this kind of chip emulator, and exploitation chip product is more, it is necessary to which chip manufacturer provides more More chip emulators, the chip emulator quantity that user uses is with regard to more and more.If it can be stored on a chip emulator Multiple FPGA files, and realize the functional simulation of multiple chip products, it is possible to chip emulator usage quantity is reduced, is saved significantly About hardware cost.

In view of the above-mentioned problems, the present invention proposes a kind of device and loading method for storing multiple FPGA files.

The content of the invention

The purpose of the present invention is by following technical solution, realize a kind of device for storing multiple FPGA files and loading side Method：

The device of the invention, it is main to include FPGA file downloads module and circuit board, wherein circuit board including communication unit, Data path selecting unit, FPGA file storage units, FPGA loading units, FPGA unit and power supply unit.

Communication unit uses the MCU controllers of USB interface, is connected with data path selecting unit, is responsible for FPGA files The data of download module are written to FPGA file storage units.

FPGA loading units are realized using programmable CPLD, are connected with data path selecting unit, are responsible for from FPGA files Storage unit reads FPGA file datas, and FPGA file datas are written to FPGA unit, completes matching somebody with somebody for whole FPGA unit Put process.

FPGA file storage units are defined as special FPGA file storage structure, store multiple FPGA files and effective FPGA fileinfos；The data write-in and data read-out timesharing of FPGA file storage units carry out, in data path selecting unit Under control with Loading Control signal, FPGA unit configuration process prior to FPGA files downloading process, and under FPGA files Load process and FPGA unit configuration process carry out state instruction with indicator light respectively.

Its loading method includes the following steps：

1) development board powers under power supply unit control, and FPGA unit enters FPGA configuration statuses；Or development board powers on After work, FPGA file downloads module sends FPGA configuration orders, and FPGA unit enters FPGA configuration statuses；

2) FPGA loading units are read by Loading Control signal and data path selection unit from FPGA file storage units Current configuration information area data are taken, and obtain effective FPGA files sequence number；

3) FPGA loading units are according to effective FPGA files sequence number, from the file control information of FPGA file storage units Area, obtains the storage address and FPGA file size data of effective FPGA files；

4) FPGA loading units read the data of FPGA files from the storage address of effective FPGA files；

5) data of reading are write FPGA unit by FPGA loading units by the collocation channel of FPGA unit；

6) address data memory of FPGA loading units modification FPGA files, repeat step 4 and step 5, until FPGA plus Load process is completed；

7) after the completion of FPGA unit loading procedure, indicator light instruction FPGA configuration process terminates.

Brief description of the drawings

Attached drawing 1 is the device of the invention structure diagram；

Attached drawing 2 is FPGA file storage structures schematic diagram of the present invention；

Attached drawing 3 is FPGA file downloads flow chart of the present invention.

Embodiment：

As shown in Figure 1, a kind of device for storing multiple FPGA files, mainly includes FPGA file downloads module, communication Unit, data path selecting unit, FPGA file storage units, FPGA loading units, FPGA unit and power supply unit.

Communication unit is connected with data path selecting unit and FPGA file download modules, is responsible for FPGA file download moulds The data of block are written to FPGA file storage units.During FPGA file data download transmissions, communication unit output is downloaded Control signal is high level, and expression is carrying out FPGA file download process.After FPGA file downloads, communication unit output Download control signal is low level, represents that device does not carry out FPGA file downloads.

FPGA loading units are connected with data path selecting unit and FPGA unit, are responsible for reading from FPGA file storage units FPGA file datas are taken, and FPGA file datas are written to FPGA unit.In FPGA data loading procedure, FPGA loadings are single Member output Loading Control signal is high level, represents that FPGA unit is carrying out configuration process.After the completion of FPGA data configuration, FPGA loading units output Loading Control signal is low level, represents that FPGA unit is not carrying out data configuration.

FPGA file storage units use nonvolatile memory, ensure the FPGA file data power down of storage in a device Do not lose.

As shown in Figure 2, FPGA file storage structures schematic diagram, whole memory block are divided FPGA file management areas and more A FPGA file datas area.Wherein store FPGA quantity of documents number, with FPGA models and non-volatile memory capacity phase Close.In this storage organization, it (is fixed FPGA for the FPGA unit in device to define the identical FPGA file data blocks of length Model, FPGA file size length is consistent), FPGA files 1, FPGA files 2, FPGA files 3 etc. are drawn by equal length block Point；FPGA file control informations area includes FPGA files sequence number, filename, storage initial address, file size and check word etc.； Current configuration information area includes the information such as effective FPGA files sequence number, check word.

FPGA loading units read data content from FPGA file management areas, to carry out data validation.If verification Data are correct, then start FPGA configuration process, and complete configuration process；If verification data mistake, stop FPGA configuration process. Whether FPGA configuration process is completed, indicated by indicator light.

As shown in Figure 3, FPGA file downloads flow diagram, can be obtained in FPGA fileinfos by this flow Hold, download new FPGA files, reconfigure effective FPGA files.Comprise the following steps that：

Step 1, FPGA file downloads module and circuit board are connected, it is ensured that interface connection is correct；

Step 2, FPGA file downloads module reads the All Files information in FPGA storage units and shows, shows at the same time It is currently configured effective FPGA files；

Step 3, to download new FPGA files to FPGA file storage units, it is necessary to pass through FPGA file download modules FPGA files and FPGA document location sequence numbers are selected, enters step 4；If not downloading FPGA files, 5 are entered step；

Step 4, FPGA files and position number are downloaded to specified FPGA file storage units；

Step 5, to reactivate effective FPGA files, 6 are entered step；If effective FPGA texts are not reactivated Part, then enter step 7；

Step 6, FPGA file downloads module sends FPGA file activation commands, and communication unit re-starts effective FPGA texts Part marks, and FPGA unit re-starts FPGA configuration process；

Step 7, downloading process terminates.

Claims (3)

1. a kind of device for storing multiple FPGA files, including FPGA file downloads module and circuit board, circuit board include communication Unit, data path selecting unit, FPGA file storage units, FPGA loading units, FPGA unit and power supply unit, its feature It is that communication unit uses the MCU controllers of USB interface, is connected with data path selecting unit, is responsible for FPGA file downloads The data of module are written to FPGA file storage units；FPGA loading units are realized using programmable CPLD, are selected with data path Select unit to be connected, be responsible for reading FPGA file datas from FPGA file storage units, and FPGA file datas are written to FPGA Unit, completes the configuration process of whole FPGA unit.

2. device according to claim 1, it is characterised in that the FPGA file storage units are defined as special FPGA File storage structure, stores multiple FPGA files and effective FPGA fileinfos；The data write-in of FPGA file storage units Carried out with data read-out timesharing, under the control of data path selecting unit and Loading Control signal, FPGA unit configuration process Prior to the downloading process of FPGA files, and FPGA file download process and FPGA unit configuration process are carried out with indicator light respectively State instruction.

3. a kind of loading method for storing multiple FPGA files, multiple FPGA files are stored based on one kind described in claim 1 Device, its loading method includes the following steps：

1) development board powers under power supply unit control, and FPGA unit enters FPGA configuration statuses；Or development board works on power Afterwards, FPGA file downloads module sends FPGA configuration orders, and FPGA unit enters FPGA configuration statuses；

2) FPGA loading units are read from FPGA file storage units and are worked as by Loading Control signal and data path selection unit Preceding configuration information area data, and obtain effective FPGA files sequence number；

3) FPGA loading units, from the file control information area of FPGA file storage units, are obtained according to effective FPGA files sequence number Take the storage address and FPGA file size data of effective FPGA files；

4) FPGA loading units read the data of FPGA files from the storage address of effective FPGA files；

5) data of reading are write FPGA unit by FPGA loading units by the collocation channel of FPGA unit；

6) address data memory of FPGA loading units modification FPGA files, repeat step 4 and step 5, until FPGA was loaded Journey is completed；

7) after the completion of FPGA unit loading, indicator light instruction FPGA configuration process terminates.