CN107885939B - Method for improving monitoring precision of monitoring graph - Google Patents

Method for improving monitoring precision of monitoring graph Download PDF

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CN107885939B
CN107885939B CN201711099108.0A CN201711099108A CN107885939B CN 107885939 B CN107885939 B CN 107885939B CN 201711099108 A CN201711099108 A CN 201711099108A CN 107885939 B CN107885939 B CN 107885939B
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CN107885939A (en
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曹云
朱忠华
魏芳
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Shanghai Huali Microelectronics Corp
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    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/392—Floor-planning or layout, e.g. partitioning or placement
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
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Abstract

The invention provides a method for improving monitoring precision of a monitoring graph, which comprises the following steps: adding standard redundant graphs to each chip and the scribing area; calculating the average graph and geometric characteristics of the monitoring chip layout or the average geometric characteristics of a monitoring area in the chip; obtaining the arrangement coordinates of each chip; acquiring a central coordinate of a monitoring graph; expanding the process influence radius of the monitoring graph in the four circumferential directions X and Y to form an optimized area; respectively calculating the overlapping areas of the optimized area, the surrounding chips and the scribing area; deleting redundant graphs added in an overlapped area of the chip and the scribing area according to a standard adding program; and adding a redundant graph again to the overlapping area of the chip and the scribing area by taking the average geometric characteristic of the monitoring area in the chip as a target value. The invention relates to a method for optimizing the surrounding geometric environment of a monitored graph, which can reduce the difference of the geometric characteristics of the surrounding graph of the monitored graph and a monitored area in a chip, thereby reducing the difference of a measured value of the monitored graph and the monitored area in the chip.

Description

Method for improving monitoring precision of monitoring graph
Technical Field
The present invention relates to the field of semiconductor integrated circuit manufacturing, and more particularly, to a method for improving monitoring accuracy of a monitoring pattern.
Background
Advanced integrated circuit fabrication processes typically involve hundreds of steps, and minor errors in any link can result in failure of the entire chip, especially as critical dimensions of the circuit shrink, the more stringent the requirements for process control. In the conventional semiconductor device manufacturing process, process monitoring parameters (such as line width, thickness, etc.) of a monitoring pattern in a scribe area are usually measured, so as to monitor the process stability of an internal area of a chip on line. Therefore, whether the measurement value of the monitoring graph can accurately and effectively reflect the process processing condition in the chip directly influences the yield of the product.
In the actual product processing process, the monitoring pattern is influenced by the geometric environment of the surrounding area, so that the measurement value of the monitoring pattern changes along with the change of the geometric environment of the surrounding area. For example, a monitoring pattern for monitoring copper thickness in a cmp process may vary due to differences in the density, effective line width, and perimeter of the surrounding pattern. If the difference between the geometric environment of the monitored graph and the internal area of the chip is large, the measured value of the monitored graph and the internal monitored area of the chip are large, so that the measured value of the monitored graph cannot accurately reflect the real process condition in the chip, the process adjustment cannot be correctly guided, and the yield of the product is finally influenced
Disclosure of Invention
In order to solve the above problems, the present invention provides a method for improving monitoring accuracy of a monitoring graph, which is an optimization method for a geometric environment around the monitoring graph, and can reduce a difference between a geometric feature of a graph around the monitoring graph and a monitored area inside a chip, thereby reducing a difference between a measurement value of the monitoring graph and the monitored area inside the chip.
In order to achieve the above object, the present invention provides a method for improving monitoring accuracy of a monitoring graph, comprising the following steps:
adding standard redundant graphs to each chip and the scribing area;
calculating the average graph and geometric characteristics of the monitoring chip layout or the average geometric characteristics of a monitoring area in the chip;
obtaining the arrangement coordinates of each chip;
acquiring a central coordinate of a monitoring graph;
expanding the process influence radius of the monitoring graph in the four circumferential directions X and Y to form an optimized area;
respectively calculating the overlapping areas of the optimized area, the surrounding chips and the scribing area;
deleting redundant graphs added in an overlapped area of the chip and the scribing area according to a standard adding program;
and adding a redundant graph again to the overlapping area of the chip and the scribing area by taking the average geometric characteristic of the monitoring area in the chip as a target value.
Further, the average geometric features include: average pattern density, average pattern perimeter, and average pattern weight linewidth.
Further, the monitoring patterns comprise a critical dimension monitoring pattern and a film thickness monitoring pattern.
Further, the process influence radius is the maximum range of the pattern that produces a non-negligible process influence on the target area.
Furthermore, the monitoring area of the graph in the chip and the monitoring graph have the same geometric characteristics, and the monitoring area is far larger than the monitoring graph.
Furthermore, the shape, size and interval of the geometric features of the added redundant graph are variable, and the corresponding change is carried out according to the geometric features of the target monitoring area.
Further, the adding of the redundant graph and the geometric characteristics in the monitoring area satisfy the following relationship:
density: (Den)Optimizing regionsx(D2-d2)+DenMonitoring graphx d2)/D2＝DenChip monitoring area，
Perimeter: sigma Pi optimization area+∑Pj monitoring graph＝∑Pk chip monitoring area，
Weight line width: sigma LWi optimization areax Ai optimization area+∑LWj monitoring graphx Aj monitoring graph
＝∑LWk chip monitoring areax Ak chip monitoring area，
Wherein DenOptimizing regionsFor optimizing regional redundancy pattern density, D2To optimize the region size, d2For monitoring the pattern size, DenMonitoring graphFor monitoring the pattern density, DenChip monitoring areaAverage density of monitored area, P, for chipi optimization areaTo optimize the perimeter, P, of each redundant pattern in a regionj monitoring graphFor monitoring the perimeter of each pattern, Pk chip monitoring areaEach graph for monitoring area of chipCircumference of circular, LWi optimization areaTo optimize the line width of the ith pattern of the redundant pattern in the region, Ai optimization areaTo optimize the area of the ith pattern of the redundant pattern in the area, LWj optimized regionTo optimize the line width of the jth pattern of the redundant pattern in the region, Aj optimized regionTo optimize the area of jth pattern of redundant patterns in a zone, LWk-optimized regionTo optimize the line width of the kth pattern of the redundant pattern in the region, Ak-optimized regionTo optimize the area of the kth pattern of the redundant pattern in the area.
The method for improving the monitoring precision of the monitoring graph provided by the invention is characterized in that the geometric information of the graph in a certain area around the monitoring graph in the scribing area is checked, and the redundant graph addition in the area is optimized according to the checking result, so that the optimized monitoring graph has a geometric environment which is equivalent to or has a smaller difference with the monitoring area in the chip, the difference between the measured value of the monitoring graph in the scribing area and the monitoring area in the chip is further reduced, and the effective monitoring of the monitoring graph on the process is realized.
Drawings
Fig. 1 is a flowchart illustrating a method for improving monitoring accuracy of a monitoring pattern according to a preferred embodiment of the invention.
FIG. 2 is a schematic diagram of an optimized area according to a preferred embodiment of the present invention.
FIG. 3 is a schematic diagram of an optimized area of a redundant pattern required for a scribe area according to a preferred embodiment of the present invention.
FIG. 4 is a schematic diagram illustrating the optimized area of the redundant pattern required by each chip according to the preferred embodiment of the present invention.
Detailed Description
The following description will be given with reference to the accompanying drawings, but the present invention is not limited to the following embodiments. Advantages and features of the present invention will become apparent from the following description and from the claims. It is noted that the drawings are in greatly simplified form and that non-precision ratios are used for convenience and clarity only to aid in the description of the embodiments of the invention.
Referring to fig. 1, fig. 1 is a flowchart illustrating a method for improving monitoring accuracy of a monitoring pattern according to a preferred embodiment of the invention. The invention provides a method for improving monitoring precision of a monitoring graph, which comprises the following steps:
step S100: adding standard redundant graphs to each chip and the scribing area;
step S200: calculating the average graph and geometric characteristics of the monitoring chip layout or the average geometric characteristics of a monitoring area in the chip;
step S300: obtaining the arrangement coordinates of each chip;
step S400: acquiring a central coordinate of a monitoring graph;
step S500: expanding the process influence radius of the monitoring graph in the four circumferential directions X and Y to form an optimized area;
step S600: respectively calculating the overlapping areas of the optimized area, the surrounding chips and the scribing area;
step S700: deleting redundant graphs added in an overlapped area of the chip and the scribing area according to a standard adding program;
step S800: and adding a redundant graph again to the overlapping area of the chip and the scribing area by taking the average geometric characteristic of the monitoring area in the chip as a target value.
According to a preferred embodiment of the present invention, the average geometrical characteristics comprise: average pattern density, average pattern perimeter, and average pattern weight linewidth. The monitoring graph comprises a key size monitoring graph and a film thickness monitoring graph. The process effect radius is the maximum range of the pattern that produces a non-negligible process effect on the target area, such as the planarization length in a chemical mechanical polishing process.
The monitoring area of the graph in the chip and the monitoring graph have the same geometric characteristics, and the monitoring area is far larger than the monitoring graph. And adding redundant graphs, wherein the shape, size and interval of the geometric characteristics of the redundant graphs are variable, and the geometric characteristics are correspondingly changed according to the target monitoring area.
Fig. 1 is a flowchart of a specific implementation of the present invention, in which standard redundant patterns are added to each chip and scribe area, and average geometric information of a pattern in a monitoring area in a chip is calculated according to monitoring requirements, where the geometric information includes: the method comprises the steps of measuring the pattern density, the pattern perimeter and the pattern weight line width, expanding a process influence radius d to the X direction and the Y direction by taking the periphery of a monitored pattern as a starting point to form a rectangular or square redundant pattern optimization area shown in figure 2, wherein the process influence radius d is the maximum range of the monitored pattern influenced by the geometrical characteristics of the surrounding pattern in the processing process of the monitored process, such as the planarization length in the chemical mechanical polishing process.
The arrangement coordinates of the respective chips are obtained from the known chip arrangement information, and the coordinates of the upper right corner of chip 1 in FIG. 2 are assumed to be (X1)RT,Y1RT) The coordinate of the lower right corner is (X1)RB,Y1RB) The coordinate of the upper left corner of the chip 2 is (X2)LT,Y2LT) The lower left corner coordinate is (X2)LB,Y2LB) The central coordinate of the monitoring graph is (X)0,Y0) The monitored pattern has a width D, where X1 is known from FIG. 2RT＝X1RB，X2LT＝X2LBThen:
the maximum range coordinates of the optimization region are calculated,
lower left corner: xmLB＝(X0-D/2-d),YmLB＝(Y0-D/2-d)，
The upper right corner: xmRT＝(X0+D/2+d),YmRT＝(Y0+D/2+d)，
We assume that the chip size is much larger than the optimized region, i.e.
Y1RB<YmLB<Y1RT，Y2LB<YmLB<Y2LTAnd X1RT<X2LT。
1) When XmLBLess than X1RTOr X1RBThen, it can be derived:
the overlapping area of the chip 1 and the redundant graphic optimization area is as follows:
lower left corner: xmLB＝(X0-D/2-d)，YmLB＝(Y0-D/2-d)，
The upper right corner: x1RTOr X1RB，YmRT＝(Y0+D/2+d)，
The lower left corner of the overlapping area of the scribing area and the redundant graph optimization area is as follows:
lower left corner: x1RTOr X1RB，YmLB＝(Y0-D/2-d)。
2) When XmLBGreater than X1RTOr X1RBWhen the chip 1 is not overlapped with the redundant graph optimization area,
the lower left corner of the overlap region of the scribe region and the redundant graphic optimization region is as follows:
lower left corner: xmLB＝(X0-D/2-d)，YmLB＝(Y0-D/2-d)。
3) When XmRTGreater than X2LTOr X2LBThen, it can be derived:
the overlapping area of the chip 2 and the redundant pattern optimization area is as follows:
lower left corner: x2LTOr X2LB，YmLB＝(Y0-D/2-d)，
The upper right corner: xmRT＝(X0+D/2+d),YmRT＝(Y0+D/2+d)，
The upper right corner of the overlapping area of the scribing area and the redundant graph optimization area is as follows:
the upper right corner: x2LTOr X2LB，YmRT＝(Y0+D/2+d)。
4) When XmRTLess than X2LTOr X2LBWhen the chip 2 is not overlapped with the redundant graph optimization area,
the upper right corner of the overlapping area of the scribing area and the redundant graph optimization area is as follows:
the upper right corner: xmRT＝(X0+D/2+d),YmRT＝(Y0+D/2+d)，
And subtracting the area occupied by the monitoring graph from the range defined by the lower left corner and the upper right corner of the calculated scribing area to obtain an overlapping area of the scribing area and the redundancy optimization area.
And deleting the calculated redundant graphs in the overlapped areas (shown in fig. 3 and 4) of the chip 1, the chip 2 and the scribing areas, and adding the redundant graphs in the overlapped areas of the chip 1, the chip 2 and the scribing areas again by taking the calculated average geometric information of the graphs in the chip or the average geometric information of the graphs in the monitoring areas in the chip as a target value. Different from the addition of the standard redundant graph, the standard redundant graph is added with the redundant graph with fixed size and interval, and the invention can adjust the shape, size and interval of the added redundant graph according to the target geometric information, such as graph density, graph perimeter and graph weight line width, so that the added redundant graph can optimize the graph geometric information in an optimized area, namely the graph density, the graph perimeter and the graph weight line width, and further reduce the difference between the graph geometric characteristics in a certain range around the monitored graph and the average geometric characteristics of a chip or the average geometric characteristics of a monitored area in the chip in the optimized area, thereby ensuring that the process performance of the monitored area is consistent with the inside of the chip in the corresponding process processing process, and realizing effective monitoring. The geometric characteristics of the monitoring graph and the peripheral optimization area range and the average geometric characteristics of the monitoring area in the chip satisfy the following relations:
density: (Den)Optimizing regionsx(D2-d2)+DenMonitoring graphx d2)/D2＝DenChip monitoring area，
Perimeter: sigma Pi optimization area+∑Pj monitoring graph＝∑Pk chip monitoring area，
Weight line width: sigma LWi optimization areax Ai optimization area+∑LWj monitoring graphx Aj monitoring graph
＝∑LWk chip monitoring areax Ak chip monitoring area，
Wherein DenOptimizing regionsFor optimizing regional redundancy pattern density, D2To optimize the region size, d2For monitoring the pattern size, DenMonitoring graphFor monitoring the pattern density, DenChip monitoring areaAverage density of monitored area, P, for chipi optimization areaTo optimize the perimeter, P, of each redundant pattern in a regionj monitoring graphFor monitoring the perimeter of each pattern, Pk chip monitoring areaLW for each pattern perimeter of chip monitor areai optimization areaTo optimize the line width of the ith pattern of the redundant pattern in the region, Ai optimization areaTo optimize the area of the ith pattern of the redundant pattern in the area, LWj optimized regionTo optimize the line width of the jth pattern of the redundant pattern in the region, Aj optimized regionTo optimize the area of jth pattern of redundant patterns in a zone, LWk-optimized regionTo optimize the line width of the kth pattern of the redundant pattern in the region, Ak-optimized regionTo optimize the area of the kth pattern of the redundant pattern in the area.
In summary, the method for improving the monitoring accuracy of the monitoring graph provided by the present invention performs the geometric information inspection on the graph in a certain area around the monitoring graph in the scribing area, and optimizes the redundant graph addition in the area according to the inspection result, so that the optimized monitoring graph has a geometric environment around the monitoring graph which is equivalent to or has a smaller difference with the monitoring area in the chip, thereby reducing the difference between the measurement value of the monitoring graph in the scribing area and the monitoring area in the chip, and realizing the effective monitoring of the monitoring graph on the process.
Although the present invention has been described with reference to the preferred embodiments, it is not intended to be limited thereto. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the protection scope of the present invention should be determined by the appended claims.

Claims (6)

1. A method for improving monitoring precision of monitoring graphs is characterized by comprising the following steps:
adding standard redundant graphs to each chip and the scribing area;
calculating the average geometric characteristics of the monitoring chip layout or the average geometric characteristics of the monitoring area in the chip;
acquiring the arrangement coordinates of each chip;
acquiring a central coordinate of a monitoring graph;
expanding the process influence radius of the monitoring graph in the four circumferential directions X and Y by taking the central coordinate of the monitoring graph as a reference to form an optimized area;
respectively calculating an overlapping area of the optimized area and a peripheral chip and an overlapping area of the optimized area and a scribing area;
deleting the overlapping area of the optimized area and the surrounding chips and the redundant graph added in the overlapping area of the optimized area and the scribing area according to the standard adding program;
adding redundant graphs again to the overlapping area of the optimized area and the surrounding chips and the overlapping area of the optimized area and the scribing area by taking the average geometric characteristics of the monitoring chip layout and the average geometric characteristics of the monitoring area in the chip as target values;
wherein the average geometric features comprise: average pattern density, average pattern perimeter, and average pattern weight linewidth.
2. The method for improving monitoring accuracy of monitoring patterns according to claim 1, wherein the monitoring patterns comprise critical dimension monitoring patterns and film thickness monitoring patterns.
3. The method of claim 1, wherein the process effect radius is a maximum range of the pattern that produces a non-negligible process effect on the target area.
4. The method of claim 1, wherein the on-chip graphic monitoring area has the same geometric characteristics as the monitoring graphic, and the monitoring area is much larger than the monitoring graphic.
5. The method for improving monitoring accuracy of the monitored graphics according to claim 1, wherein when the average geometric feature of the monitored area in the chip is used as the target value to add the redundant graphics again to the overlapped area of the optimized area and the surrounding chip and the overlapped area of the optimized area and the scribe area, the shape, size and interval of the geometric feature are variable and correspondingly changed according to the geometric feature of the target monitored area.
6. The method for improving monitoring accuracy of the monitored graph according to claim 5, wherein the added redundant graph and the geometric features in the monitored area satisfy the following relation:
density: (Den)Optimizing regionsx(D2-d2)+DenMonitoring graphx d2)/D2＝DenChip monitoring area，
Perimeter: sigma Pi optimization area+∑Pj monitoring graph＝∑Pk chip monitoring area，
Weight line width: sigma LWi optimization areax Ai optimization area+∑LWj monitoring graphx Aj monitoring graph
＝∑LWk chip monitoring areax Ak chip monitoring area，
Wherein DenOptimizing regionsFor optimizing regional redundancy pattern density, D2To optimize the region size, d2For monitoring the pattern size, DenMonitoring graphFor monitoring the pattern density, DenChip monitoring areaAverage density of monitored area, P, for chipi optimization areaTo optimize the perimeter, P, of each redundant pattern in a regionj monitoring graphFor monitoring the perimeter of each pattern, Pk chip monitoring areaLW for each pattern perimeter of chip monitor areai optimization areaTo optimize the line width of the ith pattern of the redundant pattern in the region, Ai optimization areaTo optimize the area of the ith pattern of the redundant pattern in the area, LWj monitoring graphFor monitoring the line width of the jth pattern of the pattern, Aj monitoring graphTo monitor the area of the jth pattern of the pattern, LWk chip monitoring areaThe line width of the kth pattern in the chip monitoring area, Ak chip monitoring patternThe area of the kth pattern in the chip monitoring area.
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