CN107846199B - Dual-channel power amplifier - Google Patents
Dual-channel power amplifier Download PDFInfo
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- CN107846199B CN107846199B CN201610836324.8A CN201610836324A CN107846199B CN 107846199 B CN107846199 B CN 107846199B CN 201610836324 A CN201610836324 A CN 201610836324A CN 107846199 B CN107846199 B CN 107846199B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/213—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
- H03F3/45928—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit
Abstract
The embodiment of the invention provides a dual-channel power amplifier, which comprises: the first channel comprises a first input terminal, a first input buffer stage, a first phase adjustment stage, a first voltage amplification stage, a first current expansion stage and a first output terminal; the second channel comprises a second input terminal, a second input buffer stage, a second phase adjustment stage, a second voltage amplification stage, a second current expansion stage and a second output terminal; the two input ends of the selection switch are connected with the output end of the first input buffer stage and the output end of the second input buffer stage, the output end of the selection switch is connected with the input end of the second phase adjustment stage, the selection switch is used for selecting the first input buffer stage or the second input buffer stage as the input signal of the second phase adjustment stage, when the first input buffer stage is selected as the input signal of the second phase adjustment stage, the phases of the first channel signal and the second channel signal are opposite, and the amplitude of the voltage output between the second output terminal and the first output terminal is twice of the amplitude of the voltage to ground output by each output terminal alone.
Description
Technical Field
The invention relates to the technical field of power amplifiers, in particular to a dual-channel power amplifier.
Background
The output stages of the universal function waveform generator and the arbitrary waveform signal source have limitations and cannot reach required voltage and power in a test system. The power amplifier has the functions of amplifying voltage, expanding current and amplifying power. For testing audio equipment, magnetic materials, pressure sensitive elements, optoelectronic materials, and other applications, higher power and larger bandwidth are required. Aiming at the application occasions, a power amplifier is added at the output of a signal source to meet the test condition.
The power amplifier is generally configured with a plurality of stages in circuit configuration, and as shown in fig. 1, includes an input buffer stage, a voltage amplification stage, a phase adjustment stage, a pre-bias voltage, a current spreading output stage, and the like. Existing power amplifiers are typically either single channel amplifiers or dual channel amplifiers. The power amplifier circuit shown in fig. 1 can omit the parts for pre-biasing voltage and phase adjustment, or can combine the two parts of voltage amplification and current expansion.
The output voltage amplitude of the existing power amplifier is limited by the power supply voltage, and the existing power amplifier cannot be applied to occasions requiring high-voltage output. Because the output voltage is low and the output power is limited, and the voltage amplitude is required to be large enough for the application occasions of measuring high-power acoustic equipment, high-voltage magnetic materials and the like, the control of the output large amplitude is necessary.
Disclosure of Invention
The embodiment of the invention provides a dual-channel power amplifier, which aims to solve the technical problem that the prior art can not output large voltage amplitude required by application occasions of high-power sound equipment, high-voltage magnetic materials and the like. The dual channel power amplifier includes: the first channel sequentially comprises a first input terminal, a first input buffer stage, a first phase adjustment stage, a first voltage amplification stage, a first current expansion stage and a first output terminal and is used for performing voltage amplification and power amplification on an input signal; the second channel sequentially comprises a second input terminal, a second input buffer stage, a second phase adjustment stage, a second voltage amplification stage, a second current expansion stage and a second output terminal and is used for performing voltage amplification and power amplification on the input signal; a selection switch, two input ends of the selection switch are respectively connected with an output end of the first input buffer stage and an output end of the second input buffer stage, an output end of the selection switch is connected with an input end of the second phase adjustment stage, and the selection switch is used for selecting the first input buffer stage or the second input buffer stage as the input signal of the second phase adjustment stage, when the second input buffer stage is selected as the input signal of the second phase adjustment stage, the second phase adjustment stage and the first phase adjustment stage do not perform phase reversal adjustment on the received signal, and the second output terminal and the first output terminal respectively and independently output a ground voltage; when the first input buffer stage is selected as the second phase adjustment stage input signal, the second phase adjustment stage and the first phase adjustment stage simultaneously receive the signal input by the first input buffer stage, the second phase adjustment stage or the first phase adjustment stage performs phase reversal adjustment on the received signal, and the amplitude of the voltage output between the second output terminal and the first output terminal is twice as large as the amplitude of the voltage to ground output by each output terminal alone.
In one embodiment, further comprising: a first end of the calibration circuit is connected with the first output terminal and the second output terminal, and a second end of the calibration circuit is connected with an input end of the first voltage amplification stage and an input end of the second voltage amplification stage, and is used for acquiring direct-current voltage data of the first output terminal and the second output terminal, and adjusting bias voltage added to the first voltage amplification stage according to the direct-current voltage data of the first output terminal; and adjusting the bias voltage added into the second voltage amplification stage according to the direct-current voltage data of the second output terminal.
In one embodiment, the calibration circuit includes: the two ADC analog-to-digital converters are respectively connected with the first output terminal and the second output terminal and are used for respectively acquiring direct-current voltage data of the first output terminal and the second output terminal; the MCU (Microcontroller Unit) is connected with the two ADCs and used for receiving the direct-current voltage data fed back by the two ADCs and sending a first signal for adjusting the bias voltage of the first voltage amplification stage according to the direct-current voltage data of the first output terminal; sending a second signal for adjusting the bias voltage of the second voltage amplification stage according to the direct-current voltage data of the second output terminal; two voltage adjusting devices, connected to the MCU, one of the two voltage adjusting devices being connected to the input terminal of the first voltage amplifier stage, the other voltage adjusting device being connected to the input terminal of the second voltage amplifier stage, wherein the one voltage adjusting device is configured to adjust a magnitude of the bias voltage of the first voltage amplifier stage according to the first signal; the other voltage adjusting device is used for adjusting the bias voltage of the second voltage amplifying stage according to the second signal.
In one embodiment, the voltage adjustment device is a digital potentiometer.
In one embodiment, the voltage adjustment device is a DAC digital-to-analog converter.
In one embodiment, the voltage regulation device is a constant current source.
In one embodiment, further comprising: the two overcurrent protection modules are respectively installed in the first current expansion stage and the second current expansion stage and are used for respectively detecting the output currents of the first current expansion stage and the second current expansion stage and reducing the output current of the first current expansion stage when the output current of the first current expansion stage is detected to be larger than a preset current value; and when the output current of the second current expansion stage is detected to be larger than the preset current value, reducing the output current of the second current expansion stage.
In one embodiment, the first input buffer stage and the second input buffer stage are both operational amplifiers of the AD8066 model.
In one embodiment, the first voltage amplification stage and the second voltage amplification stage are both operational amplifiers model AD 8009.
In the embodiment of the invention, a selection switch is arranged between a first channel and a second channel to select a first input buffer stage or a second input buffer stage as a second input signal of a phase adjustment stage, when the selection switch selects the second input buffer stage as the second input signal of the phase adjustment stage, the second input buffer stage receives a signal input by the second input buffer stage, the first phase adjustment stage receives a signal input by the first input buffer stage, and the first phase adjustment stage and the second phase adjustment stage do not perform phase reversal adjustment on the received signal, namely the first channel and the second channel respectively output the voltage to ground independently, so that a double-channel single-ended mode is realized; when the selection switch selects the first input buffer stage as the second phase adjustment stage input signal, the second phase adjustment stage and the first phase adjustment stage simultaneously receive the signal input by the first input buffer stage, and the second phase adjustment stage or the first phase adjustment stage performs phase reversal adjustment on the received signal, namely, the voltage in the first channel and the voltage in the second channel are opposite in phase and same in amplitude, so that a single-channel differential mode is realized, the amplitude of the voltage output between the second output terminal and the first output terminal is twice of the amplitude of the ground voltage output by each output terminal independently, the amplitude of the output voltage of the dual-channel power amplifier is enlarged under the condition that the signal source output signal is not changed, and the requirement that enough large voltage amplitude is required in the application occasions of testing high-power acoustic equipment, high-voltage magnetic materials and the like is favorably met. Meanwhile, due to the adoption of the selection switch, the dual-channel power amplifier can be freely switched between a single-channel differential mode and a dual-channel single-ended mode, different voltage amplitude requirements are met, and the expansion of the application range of the dual-channel power amplifier is facilitated.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principle of the invention. In the drawings:
fig. 1 is a circuit configuration diagram of a power amplifier in the prior art;
fig. 2 is a circuit structure diagram of a dual channel power amplifier according to an embodiment of the present invention;
fig. 3 is a schematic diagram of output signals of channels of a dual-channel power amplifier in a dual-channel single-ended mode according to an embodiment of the present invention;
fig. 4 is a schematic signal flow diagram of a dual-channel power amplifier in a single-channel differential mode according to an embodiment of the present invention;
fig. 5 is a schematic diagram of respective output signals of two channels of a dual-channel power amplifier in a single-channel differential mode according to an embodiment of the present invention;
fig. 6 is a schematic diagram comparing output signals of a dual-channel power amplifier in a single-channel differential mode and a dual-channel single-ended mode according to an embodiment of the present invention;
fig. 7 is a circuit diagram of a specific dual channel power amplifier according to an embodiment of the present invention;
fig. 8 is a circuit diagram of a specific dual channel power amplifier according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to the following embodiments and the accompanying drawings. The exemplary embodiments and descriptions of the present invention are provided to explain the present invention, but not to limit the present invention.
In an embodiment of the present invention, there is provided a dual channel power amplifier, as shown in fig. 2, including:
a first channel 201, which sequentially includes a first input terminal 2011, a first input buffer stage 2012, a first phase adjustment stage 2013, a first voltage amplification stage 2014, a first current expansion stage 2015, and a first output terminal 2016, and is configured to perform voltage amplification and power amplification on an input signal;
a second channel 202, which sequentially includes a second input terminal 2021, a second input buffer stage 2022, a second phase adjustment stage 2023, a second voltage amplification stage 2024, a second current expansion stage 2025, and a second output terminal 2026, and is configured to perform voltage amplification and power amplification on the input signal;
a selection switch 203, two input terminals of the selection switch are respectively connected to the output terminal of the first input buffer stage and the output terminal of the second input buffer stage, an output terminal of the selection switch is connected to the input terminal of the second phase adjustment stage, and the selection switch is used for selecting the first input buffer stage or the second input buffer stage as the second phase adjustment stage input signal, when the second input buffer stage is selected as the second phase adjustment stage input signal, the second phase adjustment stage and the first phase adjustment stage do not perform phase inversion adjustment on the received signal, and the second output terminal and the first output terminal respectively output a pair of ground voltages independently; when the first input buffer stage is selected as the second phase adjustment stage input signal, the second phase adjustment stage and the first phase adjustment stage simultaneously receive the signal input by the first input buffer stage, the second phase adjustment stage or the first phase adjustment stage performs phase reversal adjustment on the received signal, and the amplitude of the voltage output between the second output terminal and the first output terminal is twice as large as the amplitude of the voltage to ground output by each output terminal alone.
As shown in fig. 1, in the embodiment of the present invention, a selection switch is disposed between a first channel and a second channel to select a first input buffer stage or a second input buffer stage as a second phase adjustment stage input signal, when the selection switch selects the second input buffer stage as the second phase adjustment stage input signal, the second phase adjustment stage receives a signal input by the second input buffer stage, the first phase adjustment stage receives a signal input by the first input buffer stage, and the first phase adjustment stage and the second phase adjustment stage do not perform phase reversal adjustment on the received signal, that is, the first channel and the second channel respectively output a voltage to ground independently, so as to implement a single-ended dual-channel mode; when the selection switch selects the first input buffer stage as the second phase adjustment stage input signal, the second phase adjustment stage and the first phase adjustment stage simultaneously receive the signal input by the first input buffer stage, and the second phase adjustment stage or the first phase adjustment stage performs phase reversal adjustment on the received signal, namely, the voltage in the first channel and the voltage in the second channel are opposite in phase and same in amplitude, so that a single-channel differential mode is realized, the amplitude of the voltage output between the second output terminal and the first output terminal is twice of the amplitude of the ground voltage output by each output terminal independently, the amplitude of the output voltage of the dual-channel power amplifier is enlarged under the condition that the signal source output signal is not changed, and the requirement that enough large voltage amplitude is required in the application occasions of testing high-power acoustic equipment, high-voltage magnetic materials and the like is favorably met. Meanwhile, due to the adoption of the selection switch, the dual-channel power amplifier can be freely switched between a single-channel differential mode and a dual-channel single-ended mode, different voltage amplitude requirements are met, and the expansion of the application range of the dual-channel power amplifier is facilitated.
In a specific implementation, the dual-channel power amplifier can be freely switched between a single-channel differential mode and a dual-channel single-ended mode by using the selection switch 203, specifically, in the dual-channel single-ended mode, the selection switch selects the second input buffer stage 2022 as the input signal of the second phase adjustment stage 2023, at this time, the second phase adjustment stage 2023 receives the signal input by the second input buffer stage 2022, the first phase adjustment stage 2013 receives the signal input by the first input buffer stage 2012, neither the first phase adjustment stage 2013 nor the second phase adjustment stage 2023 performs phase inversion adjustment on the received signal, that is, the first channel and the second channel respectively output the voltage to the ground, the second phase adjustment stage 2023 nor the first phase adjustment stage 2013 performs phase inversion adjustment on the received signal, and after the voltage amplification and the power amplification of the first channel and the second channel respectively, as shown in fig. 3, the second output terminal 2026 and the first output terminal 2016 each output a ground voltage independently, the output signal in fig. 3 represents a waveform of the ground voltage outputted independently from the second output terminal 2026 or the first output terminal 2016, respectively, and the input signal is a waveform of a signal inputted from the second input terminal 2021 or the first input terminal 2011.
Specifically, as shown in fig. 4, in the single-channel differential mode, the selection switch 203 selects the first input buffer stage 2012 as the second phase adjustment stage 2023 input signal, the second phase adjustment stage 2023 and the first phase adjustment stage 2013 simultaneously receive the signal input by the first input buffer stage 2012, at this time, the second input buffer stage 2022 does not work, and the second phase adjustment stage 2023 or the first phase adjustment stage 2013 performs phase inversion adjustment on the received signal, so that the voltage signals in the first channel and the second channel have 180 degrees opposite phases and the same amplitude, and after voltage amplification and power amplification of the first channel and the second channel, respectively, the amplitude of the voltage output between the second output terminal 2026 and the first output terminal 2016 is twice the amplitude of the voltage output by each output terminal alone to the ground voltage. Specifically, as shown in fig. 5, after the first input buffer stage inputs the input signal to the phase adjustment stages of the first channel and the second channel, the first phase adjustment stage or the second phase adjustment stage performs phase inversion adjustment on the received signal, for example, taking the second phase adjustment stage performs phase inversion adjustment on the received signal as an example, the output signal 1 in fig. 5 is a signal waveform output by the first channel, and the output signal 2 in fig. 5 is a signal waveform output by the second channel, it can be seen that the first channel has a phase 180 degrees opposite to that of the signal waveform output by the first channel, and has the same amplitude, as shown in fig. 6, the output signal waveform between the output terminal of the first channel and the output terminal of the second channel is as shown in the differential output in fig. 6, and the amplitude of the differential output is two times larger than that of the output signal 1.
In specific implementation, the direct current performance of high-power high-frequency equipment is low, which is shown in that the bias voltage is large, namely when the input voltage is 0V, the output voltage is not 0V, and the individual difference of devices causes larger deviation, so that the requirement cannot be met for the test of precise devices. In addition, the power amplifier belongs to a high-power instrument, the output power and the dissipation power of the power amplifier are both large, the instrument has large temperature rise, and the output bias voltage is further increased due to the fact that the device has certain temperature characteristics, and the output direct-current characteristics are deteriorated. In the prior art, the calibration of the conventional transformer power amplifier is completed by manually adjusting a potentiometer or replacing a resistor, and part of the conventional transformer power amplifier is not calibrated, so that the deviation of gain or direct-current voltage is large. In this embodiment, in order to implement self-calibration of the dual-channel power amplifier, the dual-channel power amplifier further includes: a first end of the calibration circuit is connected with the first output terminal and the second output terminal respectively, and a second end of the calibration circuit is connected with an input end of the first voltage amplification stage and an input end of the second voltage amplification stage respectively, and is used for acquiring direct current voltage data of the first output terminal and the second output terminal respectively and adjusting bias voltage added into the first voltage amplification stage according to the direct current voltage data of the first output terminal; and adjusting the bias voltage added to the second voltage amplification stage according to the direct-current voltage data of the second output terminal.
In particular, the use of a calibration circuit may reduce the dc bias voltage. And when the power amplifier is used in different temperature environments, self calibration can be performed after the temperature is stabilized, and direct current bias voltage caused by the temperature is eliminated.
In a specific implementation, as shown in fig. 7, taking the first channel as an example, the calibration circuit includes: the two ADC analog-to-digital converters 701 are respectively connected to the first output terminal and the second output terminal, and are configured to respectively acquire dc voltage data of the first output terminal and the second output terminal; the MCU micro-control unit 702 is connected to the two ADCs, and is configured to receive the dc voltage data fed back by the two ADCs, and send a first signal for adjusting the bias voltage of the first voltage amplifier stage according to the dc voltage data of the first output terminal; sending a second signal for adjusting the bias voltage of the second voltage amplification stage according to the direct-current voltage data of the second output terminal; two voltage adjusting devices 703 connected to the MCU micro-control unit, one of the two voltage adjusting devices being connected to the input terminal of the first voltage amplifier stage, and the other voltage adjusting device being connected to the input terminal of the second voltage amplifier stage, wherein the one voltage adjusting device is configured to adjust the magnitude of the bias voltage of the first voltage amplifier stage according to the first signal; the other voltage adjusting device is used for adjusting the bias voltage of the second voltage amplifying stage according to the second signal.
Specifically, when the input signal is short-circuited, the MCU 702 sets the value of the voltage adjustment device 703, adjusts the magnitude of the bias voltage applied to the voltage amplifier, and uses the ADC 701 to collect the dc voltage at the output terminal portion and feed the dc voltage back to the MCU, and the MCU adjusts the value of the voltage adjustment device 703 again according to the collected dc voltage until the value of the dc voltage collected by the ADC 701 is the minimum. The problem of direct current bias caused by individual device difference can be reduced. When the environmental temperature of the power amplifier is changed, the self-calibration operation can be carried out again, and the direct current deviation caused by the temperature is eliminated.
In specific implementation, the voltage adjustment device 703 may be a digital potentiometer, a DAC, or a constant current source. The MCU adjusts the magnitude of the bias voltage of the voltage amplification stage by adjusting the resistance value of the digital potentiometer; the MCU adjusts the current or the resistance value of the DAC to adjust the bias voltage of the voltage amplification stage.
In specific implementation, in order to further improve the performance of the power amplifier, in this embodiment, the power amplifier further includes: the two overcurrent protection modules are respectively installed in the first current expansion stage and the second current expansion stage and are used for respectively detecting the output currents of the first current expansion stage and the second current expansion stage and reducing the output current of the first current expansion stage when the output current of the first current expansion stage is detected to be larger than a preset current value; and when the output current of the second current expansion stage is detected to be larger than the preset current value, reducing the output current of the second current expansion stage. Specifically, the specific structure of the overcurrent protection module is not limited in the present application, and the overcurrent protection module in the prior art may be used, for example, the function of the overcurrent protection module may be implemented by a resistor and a current detection device.
In specific implementation, in order to improve the calculation performance of the power amplifier, in this embodiment, both the first input buffer stage and the second input buffer stage may be an operational amplifier of an AD8066 type; the first and second voltage amplification stages may each be an operational amplifier of model AD 8009.
The operation of the above dual channel power amplifier is described in detail below with reference to specific examples. For example, the circuit of the dual channel power amplifier described above is exemplified by the circuit shown in fig. 8, in which the relay RL1 implements a function of a first input terminal, the operational amplifier U3A implements a function of a first input buffer stage, the relay RL2 implements a function of a first phase adjustment stage, the operational amplifier U4 implements a function of a first voltage amplification stage, the operational amplifier U5 implements a function of a first current spreading stage, the relay RL3 implements a function of a first output terminal, the relay RL5 implements a function of a second input terminal, the operational amplifier U3B implements a function of a second input buffer stage, the relay RL4 implements a function of a selection switch, the relay RL6 implements a function of a second phase adjustment stage, the operational amplifier U6 implements a function of a second voltage amplification stage, the operational amplifier U7 implements a function of a second current spreading stage, the relay RL7 implements a function of a second output terminal, and the ADC serves as voltage detection, the MCU is used for control processing, and R12 and R22 are used for representing digital potentiometers.
The first channel is inputted from a signal source J4 via RL1, passes through U3A, RL2, U4, U5, and RL3, and is outputted from J3. U3A is used as signal buffer, RL2 can switch the signal phase to be positive or negative through U4, U5 power amplifier stage, RL3 control signal is output to the outside or to ADC.
The second channel is inputted with a signal from a signal source J6 through RL5, passes through U3B, RL4, RL6, U6, U7, RL7, and is outputted at J5. U3B acts as a signal buffer, RL4 can switch the dual channel power amplifier to either dual channel single ended mode or single channel differential mode amplification. RL6 switching can forward or invert the signal phase through U6, U7 is the power amplifier stage, RL7 controls the signal output to the outside or ADC.
When the dual-channel power amplifier is used as a dual-channel single-ended mode amplifier, RL1 set, RL2 set or reset, RL3 set, RL4 set, RL5 set, RL6 set or reset, and RL7 set. At this point, the first and second paths are not connected together and are completely independent due to the setting of RL 4.
When the power amplifier is a single-channel differential mode amplifier, RL1 set, RL2 set, RL3 set, RL4 reset, RL5 set or reset, RL6 reset, RL7 set. At this time, signals of the first channel and the second channel are input from J4, and J6 does not work. The first path signal is amplified in the opposite phase and the second path signal is amplified in the forward direction. The output signal is taken from the positive terminal intermediate J3, J5. When the single-channel differential output is set, because the phase difference of signals output by two channels is 180 degrees, when voltage is taken out from the positive ends of the two channels of output, the signal amplitude is 2G V0, the amplitude is 2 times of that of the single-end output, under the condition that larger voltage is not needed, the output amplitude is expanded, and the application range is expanded.
In addition, since the calibration of the dual channel power amplifier is performed for each channel, the first channel will be described as an example. The calibration circuit comprises digital potentiometers (R12 and R22), an ADC and an MCU.
Calibration can solve the problems: input offset voltage, input offset current and the like generated by an amplifying circuit (including an operational amplifier and the like) are reduced. And self-calibration can be performed after the ambient temperature changes, and the output offset voltage increased due to the temperature change is reduced.
The working mode of the calibration circuit is as follows: RL1 resets, and the input is connected to GND, RL2 sets or resets, RL3 resets, is connected first output terminal RL3 to the ADC, and MCU control ADC gathers the direct current voltage signal, and MCU adjusts R12's resistance through controlling digital potentiometer, feeds back to the positive input end of U5. Thereby regulating the voltage level of the output and forming a feedback loop.
The working principle of the calibration circuit is as follows: the two ends of the digital potentiometer are connected to a positive power supply and a negative power supply, and the position of the tap is adjusted through the control of the MCU, so that different voltage values are given, the voltage of the positive input end of the operational amplifier U5 is adjusted, and the purpose of fine adjustment of output voltage is achieved. The output direct current bias voltage is reduced, and the purpose of calibrating the direct current output precision is achieved. In addition, because the power amplifier belongs to a high-power device, the amplifier generates heat and receives the influence of temperature, the output direct current bias can be changed, the calibration function can be executed after a heat engine or after the ambient temperature changes, and the output bias drift caused by the temperature change can be eliminated.
In the embodiment of the invention, a selection switch is arranged between a first channel and a second channel to select a first input buffer stage or a second input buffer stage as a second phase adjustment stage input signal, when the selection switch selects the second input buffer stage as the second phase adjustment stage input signal, the second phase adjustment stage receives a signal input by the second input buffer stage, the first phase adjustment stage receives a signal input by the first input buffer stage, and the first phase adjustment stage and the second phase adjustment stage do not perform phase reversal adjustment on the received signal, namely the first channel and the second channel respectively and independently output a voltage to ground, so that a single-ended dual-channel mode is realized; when the selection switch selects the first input buffer stage as the second phase adjustment stage input signal, the second phase adjustment stage and the first phase adjustment stage simultaneously receive the signal input by the first input buffer stage, and the second phase adjustment stage or the first phase adjustment stage performs phase reversal adjustment on the received signal, namely, the voltage in the first channel and the voltage in the second channel are opposite in phase and same in amplitude, so that a single-channel differential mode is realized, the amplitude of the voltage output between the second output terminal and the first output terminal is twice of the amplitude of the ground voltage output by each output terminal independently, the amplitude of the output voltage of the dual-channel power amplifier is enlarged under the condition that the signal source output signal is not changed, and the requirement that enough large voltage amplitude is required in the application occasions of testing high-power acoustic equipment, high-voltage magnetic materials and the like is favorably met. Meanwhile, due to the adoption of the selection switch, the dual-channel power amplifier can be freely switched between a single-channel differential mode and a dual-channel single-ended mode, different voltage amplitude requirements are met, and the expansion of the application range of the dual-channel power amplifier is facilitated.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes may be made to the embodiment of the present invention by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (9)
1. A dual channel power amplifier, comprising:
the first channel sequentially comprises a first input terminal, a first input buffer stage, a first phase adjustment stage, a first voltage amplification stage, a first current expansion stage and a first output terminal and is used for performing voltage amplification and power amplification on an input signal;
the second channel sequentially comprises a second input terminal, a second input buffer stage, a second phase adjustment stage, a second voltage amplification stage, a second current expansion stage and a second output terminal and is used for performing voltage amplification and power amplification on the input signal;
the two input ends of the selection switch are respectively connected with the output end of the first input buffer stage and the output end of the second input buffer stage, the output end of the selection switch is connected with the input end of the second phase adjustment stage and is used for selecting the first input buffer stage or the second input buffer stage as the input signal of the second phase adjustment stage, when the second input buffer stage is selected as the input signal of the second phase adjustment stage, the second phase adjustment stage and the first phase adjustment stage do not perform phase reversal adjustment on the received signal, and the second output terminal and the first output terminal respectively and independently output a ground voltage; when the first input buffer stage is selected as the second phase adjustment stage input signal, the second phase adjustment stage and the first phase adjustment stage simultaneously receive the signal input by the first input buffer stage, the second phase adjustment stage or the first phase adjustment stage performs phase reversal adjustment on the received signal, and the amplitude of the voltage output between the second output terminal and the first output terminal is twice as large as the amplitude of the voltage to ground output by each output terminal alone.
2. The dual channel power amplifier of claim 1, further comprising:
a first end of the calibration circuit is connected with the first output terminal and the second output terminal respectively, and a second end of the calibration circuit is connected with an input end of the first voltage amplification stage and an input end of the second voltage amplification stage respectively, and is used for acquiring direct current voltage data of the first output terminal and the second output terminal respectively and adjusting bias voltage added into the first voltage amplification stage according to the direct current voltage data of the first output terminal; and adjusting the bias voltage added into the second voltage amplification stage according to the direct-current voltage data of the second output terminal.
3. The dual channel power amplifier of claim 2, wherein the calibration circuit comprises:
the two ADC analog-to-digital converters are respectively connected with the first output terminal and the second output terminal and are used for respectively acquiring direct-current voltage data of the first output terminal and the second output terminal;
the MCU is connected with the two ADCs and used for receiving the direct-current voltage data fed back by the two ADCs and sending a first signal for adjusting the bias voltage of the first voltage amplification stage according to the direct-current voltage data of the first output terminal; sending a second signal for adjusting the bias voltage of the second voltage amplification stage according to the direct-current voltage data of the second output terminal;
the two voltage adjusting devices are connected with the MCU, one of the two voltage adjusting devices is connected with the input end of the first voltage amplification stage, the other voltage adjusting device is connected with the input end of the second voltage amplification stage, and the voltage adjusting device is used for adjusting the bias voltage of the first voltage amplification stage according to the first signal; the other voltage adjusting device is used for adjusting the bias voltage of the second voltage amplifying stage according to the second signal.
4. The dual channel power amplifier of claim 3 wherein the voltage adjustment device is a digital potentiometer.
5. The dual channel power amplifier of claim 3, wherein the voltage adjustment device is a DAC digital to analog converter.
6. The dual channel power amplifier of claim 3 wherein the voltage adjustment device is a constant current source.
7. The dual channel power amplifier of any of claims 1-6, further comprising:
the two overcurrent protection modules are respectively installed in the first current expansion stage and the second current expansion stage and are used for respectively detecting the output currents of the first current expansion stage and the second current expansion stage and reducing the output current of the first current expansion stage when the output current of the first current expansion stage is detected to be larger than a preset current value; and when the output current of the second current expansion stage is detected to be larger than the preset current value, reducing the output current of the second current expansion stage.
8. The dual channel power amplifier of any of claims 1-6, wherein the first input buffer stage and the second input buffer stage are both operational amplifiers of the AD8066 model.
9. The dual channel power amplifier of any of claims 1 to 6, wherein the first voltage amplification stage and the second voltage amplification stage are both operational amplifiers model AD 8009.
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| CN201610836324.8A CN107846199B (en) | 2016-09-21 | 2016-09-21 | Dual-channel power amplifier |
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| CN201610836324.8A CN107846199B (en) | 2016-09-21 | 2016-09-21 | Dual-channel power amplifier |
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| CN107846199A CN107846199A (en) | 2018-03-27 |
| CN107846199B true CN107846199B (en) | 2022-09-30 |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4330756A (en) * | 1979-06-27 | 1982-05-18 | Thomson-Csf | Audio-frequency amplifying device |
| CN101807910A (en) * | 2009-02-09 | 2010-08-18 | 罗姆股份有限公司 | Input selector, signal processing circuit, audio signal processing circuit |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1487100A1 (en) * | 2003-06-09 | 2004-12-15 | STMicroelectronics S.r.l. | Multi-channel power amplifier with channels independently self-configuring bridge or single-ended output, particulary for audio applications |
| US8004368B2 (en) * | 2008-09-15 | 2011-08-23 | Stmicroelectronics, S.R.L. | Radio frequency amplifier with digital amplitude modulation and method for controlling the delivering of power |
| US7944291B2 (en) * | 2009-06-30 | 2011-05-17 | Avago Technologies Wireless Ip (Singapore) Pte. Ltd. | Power amplifier having parallel amplification stages and associated impedance matching networks |
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2016
- 2016-09-21 CN CN201610836324.8A patent/CN107846199B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4330756A (en) * | 1979-06-27 | 1982-05-18 | Thomson-Csf | Audio-frequency amplifying device |
| CN101807910A (en) * | 2009-02-09 | 2010-08-18 | 罗姆股份有限公司 | Input selector, signal processing circuit, audio signal processing circuit |
Non-Patent Citations (1)
| Title |
|---|
| 多通道声纳信号预处理系统设计;代明清等;《鱼雷技术》;20120615(第03期);全文 * |
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| CN107846199A (en) | 2018-03-27 |
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