CN107808601B - Micro light-emitting diode display structure and manufacturing method - Google Patents
Micro light-emitting diode display structure and manufacturing method Download PDFInfo
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- CN107808601B CN107808601B CN201610759300.7A CN201610759300A CN107808601B CN 107808601 B CN107808601 B CN 107808601B CN 201610759300 A CN201610759300 A CN 201610759300A CN 107808601 B CN107808601 B CN 107808601B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
Abstract
The invention relates to a micro light-emitting diode display structure and a manufacturing method thereof, wherein display units of the display are composed of a plurality of pixels; the method is characterized in that: each pixel comprises two or more sub-pixels, the sub-pixels in the same row in one unit are connected to the same electrode A, and the sub-pixels in the same row in one unit are connected to the same electrode B to realize row-column driving. The invention has the advantages that: the display does not need a backlight source, is beneficial to thinning the display, is made of an inorganic semiconductor epitaxial wafer with stable performance, has long service life and does not have the condition of uneven display; and the production flow can be simplified to a great extent, and the production cost is reduced.
Description
Technical Field
The invention relates to a micro light-emitting diode display structure and a method for manufacturing the same.
Background
Displays are widely used in current consumer electronics, especially computer displays, mobile phone displays, smart wearable device displays, and the like. As technology advances, the original cathode ray tube display has been replaced by a thin and light Liquid Crystal Display (LCD) and has been developed to be lighter and thinner. The LCD does not emit light, and normal display can be performed only by a backlight source, which limits the LCD to be thin enough. In recent years, an organic light emitting diode display (OLED) rises rapidly, can be made thinner by virtue of the advantages of self-luminescence without a backlight source, and is widely applied to devices such as mobile phones and smart watches by some large companies.
However, the OLED also has the disadvantage that it is difficult to overcome, and the organic material itself is unstable, so that the lifetime of the OLED display is difficult to compare with that of the inorganic semiconductor material. Moreover, the light attenuation of the OLED is significant, and long-term operation can cause large difference in light emitting efficiency of different pixels of the display, resulting in uneven display of the display.
Because of the advantages of high breakdown voltage, large thermal conductivity, strong radiation resistance, high response frequency and the like of the third-generation semiconductor, the third-generation semiconductor plays an important role in the fields of white light illumination, high-power display devices, ultraviolet disinfection and the like. Therefore, if the third generation semiconductor can be applied to other fields such as the display industry, the performance of the display must be greatly improved.
The invention discloses a micro light-emitting diode display, which is a display formed by a third-generation semiconductor light-emitting diode structure, has the advantages of self luminescence and no need of backlight of an OLED display, and has the advantages that the OLED does not have: high brightness, high luminous efficiency, long service life and low cost.
Disclosure of Invention
The invention aims to provide a micro light-emitting diode display structure and a manufacturing method, which can simplify the production flow and have good performance.
In order to solve the technical problems, the technical scheme of the invention is as follows: the display comprises one or more than one display unit, and each display unit consists of a plurality of pixels; the method is characterized in that: each pixel comprises two or more sub-pixels, an etching gap exists between every two adjacent sub-pixels, the sub-pixels in the same column in one unit are connected to the same electrode A, the electrode A is limited to be one of an N electrode or a P electrode, the sub-pixels in the same row in one unit are connected to the same electrode B, and the electrode B is limited to be the other one of the N electrode or the P electrode, and row and column driving is achieved.
The basic structure of the sub-pixel comprises a color adjusting layer, an N-type semiconductor layer, an active light emitting area, a P-type semiconductor layer, a P electrode and a substrate which are sequentially stacked, the N electrode is in contact with the N-type semiconductor layer, the stacking direction is defined to be the direction perpendicular to the plane where the rows and the columns are located, and the sub-pixel emits light from the active light emitting area to the color adjusting layer side along the stacking direction.
The N electrode is positioned between the N-type semiconductor layer and the color matching layer.
And the N electrode is positioned on the step surface of the etched step-shaped N-type semiconductor layer.
The sub-pixel further comprises an auxiliary layer, wherein the auxiliary layer at least comprises one of an electron blocking layer, a hole injection layer or an ohmic contact enhancement layer, the electron blocking layer is arranged between the active light emitting area and the P-type semiconductor layer, the hole injection layer is arranged between the P-type semiconductor layer and the P-electrode, and the ohmic contact enhancement layer is arranged between the P-electrode and the P-type semiconductor layer.
A reflecting layer can be arranged between the P electrode and the substrate in the sub-pixel or in an etching gap between adjacent sub-pixels.
1. The manufacturing method for realizing the structure of the micro light-emitting diode display mainly comprises the following steps of manufacturing a display unit, and is characterized in that:
step S1: selecting an epitaxial wafer with a proper specification, wherein the epitaxial wafer is provided with a P-type semiconductor layer, an active light emitting region, an N-type semiconductor layer, a buffer layer and a substrate which are sequentially stacked from top to bottom;
step S2: etching patterns, limiting two mutually vertical directions in a plane of the epitaxial wafer to be a row direction and a column direction, etching a plurality of row direction etching gaps and column direction etching gaps in the row direction and the column direction of the epitaxial wafer, and further forming a plurality of sub-pixels which are distributed in a rectangular array on the epitaxial wafer;
in the step, the depth of the column direction etching gap extends from the side direction of the P type semiconductor layer to the side direction of the substrate to at least penetrate through the N type semiconductor layer; the depth of the etching gap in the row direction extends from the side of the P-type semiconductor layer to the side of the substrate and at least penetrates through the N-type semiconductor layer;
step S3: manufacturing a P electrode, selecting a row direction as an extension direction of the P electrode, manufacturing the P electrode on the P-type semiconductor layer of each sub-pixel of the epitaxial wafer, and enabling each sub-pixel in the same row to share one P electrode;
step S4: flip-chip curing the epitaxial wafer on the substrate, and contacting the P electrode side with the substrate; stripping the buffer layer and the substrate of the epitaxial wafer to expose the N-type semiconductor layer of the epitaxial wafer;
step S5: manufacturing an N electrode, selecting the row direction as the extending direction of the N electrode, manufacturing the N electrode on the N-type semiconductor layer of the extended sub-pixel, and enabling the sub-pixels in the same row to share one N electrode;
step S6: manufacturing a sub-pixel color-adjusting layer, dividing all sub-pixels into a plurality of pixels, and drying two or more sub-pixels in each pixel; manufacturing the same or different color-adjusting layers on the sub-pixels in each pixel according to a sub-pixel color-adjusting scheme, wherein the color-adjusting layers are positioned on the surface of the N electrode far away from the active light-emitting area;
step S7: obtaining a display unit, wherein the display unit is provided with a plurality of pixels, and each pixel comprises two or more sub-pixels.
2. The manufacturing method for realizing the structure of the micro light-emitting diode display mainly comprises the following steps of manufacturing a display unit, and is characterized in that:
step S1: selecting an epitaxial wafer with a proper specification, wherein the epitaxial wafer is provided with a P-type semiconductor layer, an active light emitting region, an N-type semiconductor layer, a buffer layer and a substrate which are sequentially stacked from top to bottom;
step S2: etching patterns, limiting two mutually vertical directions in a plane of the epitaxial wafer to be a row direction and a column direction, etching a plurality of row direction etching gaps and column direction etching gaps in the row direction and the column direction of the epitaxial wafer, and further forming a plurality of sub-pixels which are distributed in a rectangular array on the epitaxial wafer;
in the step, the row direction is selected as the extending direction of the P electrode, and the column direction is selected as the extending direction of the N electrode;
adopting one-step etching in the row direction, wherein the etching gap depth in the row direction extends from the side of the P-type semiconductor layer to the side of the substrate and at least penetrates through the N-type semiconductor layer; the column direction adopts two-step etching, the etching gap in the column direction has two depths, one depth extends from the side direction of the P-type semiconductor layer to the side direction of the substrate and at least penetrates through the N-type semiconductor layer, the other depth extends from the side direction of the P-type semiconductor layer to the side direction of the substrate and does not penetrate through the N-type semiconductor layer, and then the N-type semiconductor layer forms a step structure in the etching gap in the column direction;
step S3: manufacturing an N electrode, namely manufacturing the N electrode on the horizontal plane of the step structure of the N-type semiconductor layer of each sub-pixel of the epitaxial wafer, and enabling each sub-pixel in the same column to share one N electrode;
step S4: manufacturing a P electrode, manufacturing the P electrode on the P-type semiconductor layer of each sub-pixel of the epitaxial wafer, and enabling each sub-pixel in the same row to share one P electrode;
step S5: the epitaxial wafer is integrally flip-chip solidified on the substrate, and the P electrode side is in contact with the substrate; stripping the buffer layer and the substrate of the epitaxial wafer to expose the N-type semiconductor layer of the epitaxial wafer;
step S6: manufacturing a sub-pixel color-adjusting layer, dividing all sub-pixels into a plurality of pixels, and drying two or more sub-pixels in each pixel; manufacturing the same or different color-adjusting layers on the sub-pixels in each pixel according to a sub-pixel color-adjusting scheme, wherein the color-adjusting layers are positioned on the surface of the N electrode far away from the active light-emitting area;
step S7: obtaining a display unit, wherein the display unit is provided with a plurality of pixels, and each pixel comprises two or more sub-pixels.
The invention has the advantages that:
the pixel of the display unit of the light-emitting diode display is composed of two or more than two previous pixels, different sub-pixels can emit light with different colors, and the sub-pixels in the same pixel can emit light with different colors to realize full-color light emission;
in the invention, the same row of sub-pixels in the same unit uses the same P electrode, the sub-pixels in the same row share one N electrode, and row-column driving is adopted, so that the structure can greatly simplify the production flow and is beneficial to reducing the production cost.
Drawings
Fig. 1 is a schematic partial structure diagram of a micro light emitting diode display unit according to a first embodiment of the invention.
Fig. 2 is a sectional view taken along line a-a of fig. 1.
Fig. 3 is a cross-sectional view taken along line B-B of fig. 1.
Fig. 4 is a schematic structural diagram of an epitaxial wafer according to a first embodiment of the invention.
FIGS. 5 to 6 are schematic views of etching processes according to the first embodiment of the present invention.
Fig. 7 is a cross-sectional view taken along line C-C of fig. 6.
Fig. 8 is a cross-sectional view taken along line D-D of fig. 6.
Fig. 9 is a schematic diagram illustrating the fabrication of a P electrode according to the first embodiment of the invention.
Fig. 10 is a schematic diagram of flip-chip and lift-off according to the first embodiment of the present invention.
FIG. 11 is a schematic diagram of fabricating an N electrode and a color matching layer according to a first embodiment of the invention.
Fig. 12 is a schematic partial structure view of a micro light emitting diode display unit according to a second embodiment of the invention.
Fig. 13 is a cross-sectional view taken along line E-E of fig. 1.
Fig. 14 is a sectional view taken along line F-F in fig. 1.
Fig. 15 is a schematic structural view of an epitaxial wafer according to a first embodiment of the present invention.
FIGS. 16 to 17 are schematic views of etching processes according to the first embodiment of the present invention.
Fig. 18 is a sectional view taken along line G-G of fig. 17.
Fig. 19 is a sectional view taken along line H-H in fig. 17.
Fig. 20 is a schematic view of manufacturing an N electrode according to a second embodiment of the invention.
FIG. 21 is a diagram illustrating a filling layer being disposed in an etching gap according to a second embodiment of the present invention.
Fig. 22 is a schematic view illustrating the fabrication of a P electrode according to a second embodiment of the present invention.
FIG. 23 is a schematic view of a second embodiment of a flip chip, lift off and toning layer.
Detailed Description
Example one
The micro light-emitting diode display comprises one or more than one display unit, each display unit is composed of a plurality of pixels, and each pixel comprises two or more than two sub-pixels.
Fig. 1 shows a partial top view of the same cell containing 3 × 4 sub-pixels, an etching gap exists between adjacent sub-pixels, and the sub-pixels 11 in the same column in one cell are connected to the same electrode a, the defined electrode a is one of an N electrode or a P electrode, the sub-pixels in the same row in one cell are connected to the same electrode B, the defined electrode B is the other of the N electrode or the P electrode, and the P electrode is used as an address scanning electrode and the N electrode is used as a data driving electrode, thereby realizing row and column driving. In this embodiment, the electrode a is an N electrode 2, the electrode B is a P electrode 6, and three sub-pixels 11 constitute one pixel 13. The diameter of the sub-pixel is 200nm-500 um, and the etching gap is 20nm-100 um.
In the present embodiment, as shown in fig. 2 and 3, the basic structure of the sub-pixel 1 includes a color modulation layer 1, an N electrode 2, an N-type semiconductor layer 3, an active light emitting region 4, a P-type semiconductor layer 5, a P electrode 6, and a substrate (not shown) stacked in sequence, the stacking direction is defined as a direction perpendicular to the plane where the rows and columns are located, and the sub-pixel emits light from the active light emitting region 4 side to the color modulation layer 1 side along the stacking direction.
It will be appreciated by those skilled in the art that the sub-pixel 1 structure herein is merely exemplary and not limiting, and may include an auxiliary layer including at least one of an electron blocking layer disposed between the active light emitting region 4 and the P-type semiconductor layer 5, a hole injection layer disposed between the P-type semiconductor layer 5 and the P-electrode 6, or an ohmic contact enhancing layer disposed between the P-electrode 6 and the P-type semiconductor layer 5, in addition to the basic structure.
In addition, in order to increase the light output, a reflective layer may be disposed between the P electrode and the substrate in each sub-pixel 11, or in the etching gap between adjacent sub-pixels 11, so as to reflect light in other directions and emit the light, which is not described herein again.
As more specific embodiments of the present invention: in each pixel in the same display unit, the pixel area or the sub-pixel color scheme of at least two pixels may be different, and of course, the pixel area or the sub-pixel color scheme of each pixel in the same display unit may also be the same. Similarly, in each sub-pixel in the same pixel, the relative area or the sub-pixel color-adjusting layer of at least two sub-pixels may be selected to be different, and of course, the relative area or the sub-pixel color-adjusting layer of each sub-pixel in the same pixel may also be the same. And will not be described in detail herein.
The manufacturing method of the display unit in this embodiment is as follows:
step S1: as shown in fig. 4, an epitaxial wafer with a suitable specification is selected, and the epitaxial wafer comprises a P-type semiconductor layer 5, an active light emitting region 4, an N-type semiconductor layer 3, a buffer layer 8 and a substrate 9 which are sequentially stacked from top to bottom;
in this embodiment, the P-type semiconductor layer 5 is Mg-doped Alx1Ga1-x1N, wherein 0<x1<1, wherein the carrier concentration is 1 × 1017～1×1021And the thickness is 50 nm-1000 nm. The active luminous region 4 is Alx2Ga1-x2N/Aly2Ga1-y2N multiple quantum wells with periodicity of 2-10 and total thickness of 10-200 nm, wherein 0<x2<1，0<y2<1，x2≠y2. The N-type semiconductor layer 3 is Si-doped Alx3Ga1-x3N, wherein 0<x3<1, wherein the carrier concentration is 1 × 1018～1×1022And the thickness is 50 nm-10 um. The buffer layer 8 is Alx4Ga1-x4N, wherein 0<x4<1, the thickness is 10 nm-10 um. The substrate 9 is a sapphire substrate.
Step S2: etching patterns, as shown in fig. 5 and 6, defining two mutually perpendicular directions in a plane of an epitaxial wafer as a row direction and a column direction, etching a plurality of row direction etching gaps 10a and column direction etching gaps 10b in the row direction and the column direction of the epitaxial wafer, and further forming a plurality of sub-pixels distributed in a rectangular array on the epitaxial wafer;
in this step, the depth of the column direction etching gap 10b extends from the P-type semiconductor layer 5 side to the substrate side direction to penetrate at least the N-type semiconductor layer 3; the depth of the row direction etching gap 10a extends from the side of the P type semiconductor layer 5 to the substrate side direction and at least penetrates through the N type semiconductor layer 3; in this embodiment, as shown in fig. 7 and 8, the substrate 9 is etched.
Step S3: a P electrode is manufactured, as shown in FIG. 9, the row direction is selected as the extending direction of the P electrode, the P electrode 6 is manufactured on the P type semiconductor layer 5 of each sub-pixel of the epitaxial wafer, and one P electrode 6 is shared by each sub-pixel in the same row;
when the P electrode 6 is manufactured, an Al reflector is evaporated on the P-type semiconductor layer 5, and a nickel-gold electrode is welded on the Al reflector through a gold wire ball.
Step S4: as shown in fig. 10, the epitaxial wafer with the electrodes formed thereon was flip-chip bonded to the substrate 7 with the wiring formed thereon, so that the P-electrode 6 and the wiring of the substrate 7 were well connected. The buffer layer 8 and the substrate 9 are stripped by using a non-contact laser stripping technology, and the chip is etched by using a necessary etching process to expose the N-type semiconductor layer 3.
Step S5: fabricating an N electrode, selecting a column direction as an extending direction of the N electrode 2, fabricating the N electrode 2 on the N-type semiconductor layer 3 of the epitaxial sub-pixel, and making each sub-pixel in the same column share one N electrode 2, as shown in fig. 11;
step S6: manufacturing a sub-pixel color-adjusting layer 1, dividing all sub-pixels into a plurality of pixels, and drying two or more sub-pixels in each pixel; then, manufacturing color adjusting layers with the same or different colors on the sub-pixels in each pixel according to a sub-pixel color adjusting scheme, wherein the color adjusting layers are positioned on the surface of the N electrode far away from the active light emitting area;
step S7: obtaining a display unit, wherein the display unit is provided with a plurality of pixels, and each pixel comprises two or more sub-pixels.
The following table shows the comparison of the parameters of the micro light emitting diode of the present invention with the conventional OLED and LCD:
and (4) conclusion: compared with an LCD (liquid crystal display), the display unit adopted by the micro light-emitting diode display has high color reducibility, does not need a backlight source and is beneficial to thinning the display; compared with the OLED, the organic light-emitting diode is made of the inorganic semiconductor epitaxial wafer, so that the service life is long, and the manufacturing process is simple.
Example two
Fig. 12 shows a partial top view of the same cell containing 3 × 4 sub-pixels, where there is an etched gap between adjacent sub-pixels, and the sub-pixels 11 in the same column in a cell are connected to the same electrode a, defining electrode a as one of N-electrode or P-electrode, the sub-pixels in the same row in a cell are connected to the same electrode B, defining electrode B as the other of N-electrode or P-electrode, and implementing row-column driving. In this embodiment, the electrode a is an N electrode 2, the electrode B is a P electrode 6, and three sub-pixels 11 constitute one pixel 13. The diameter of the sub-pixel is 200nm-500 um, and the etching gap is 20nm-100 um.
In the present embodiment, as shown in fig. 13 and 14, the basic structure of the sub-pixel 1 includes a color modulation layer 1, an N-type semiconductor layer 3, an active light emitting region 4, a P-type semiconductor layer 5, a P-electrode 6, and a substrate (not shown) which are sequentially stacked, wherein the N-type semiconductor layer 3 has a step shape, a step portion thereof is located in an etching gap, and an N-electrode 2 in contact with the N-type semiconductor layer 3 is provided on a step surface of the step portion. The stacking direction is defined as the direction perpendicular to the plane of the row and the column, and the sub-pixel emits light from the active light emitting area 4 side to the color modulation layer 1 side along the stacking direction.
In each pixel in the same display unit, at least two pixels have different pixel areas or different sub-pixel color schemes, or the pixel areas or the sub-pixel color schemes in each pixel in the same display unit are the same. Similarly, in each sub-pixel in the same pixel, the relative area or sub-pixel color-adjusting layer of at least two sub-pixels is different, and of course, the relative area or sub-pixel color-adjusting layer of each sub-pixel in the same pixel may also be the same.
The manufacturing method of the display unit in this embodiment is as follows:
step S1: as shown in fig. 15, an epitaxial wafer with a suitable specification is selected, and the epitaxial wafer comprises a P-type semiconductor layer 5, an active light emitting region 4, an N-type semiconductor layer 3, a buffer layer 8 and a substrate 9 which are sequentially stacked from top to bottom;
step S2: etching patterns, as shown in fig. 16 and 17, defining two mutually perpendicular directions in a plane of the epitaxial wafer as a row direction and a column direction, etching a plurality of row direction etching gaps 10a and column direction etching gaps 10b in the row direction and the column direction of the epitaxial wafer, and further forming a plurality of sub-pixels distributed in a rectangular array on the epitaxial wafer;
in the step, the row direction is selected as the extending direction of the P electrode, and the column direction is selected as the extending direction of the N electrode;
the row direction adopts one-step etching, as shown in fig. 19, the depth of the row direction etching gap 10a extends from the P-type semiconductor layer 5 side to the substrate 9 side and at least penetrates through the N-type semiconductor layer 3; two-step etching is adopted in the column direction, as shown in fig. 18, the column direction etching gap 10b has two depths, one depth extends from the P-type semiconductor layer 5 side to the substrate 9 side and at least penetrates through the N-type semiconductor layer 3, the other depth extends from the P-type semiconductor layer 4 side to the substrate 9 side and does not penetrate through the N-type semiconductor layer 3, and thus the N-type semiconductor layer 3 forms a step structure in the column direction etching gap 10 b;
step S3: manufacturing an N electrode, and as shown in fig. 20 and 21, manufacturing an N electrode 2 by welding on a horizontal plane of the step structure of the N-type semiconductor layer 3 of each sub-pixel of the epitaxial wafer by using a wire bonding method, and enabling each sub-pixel 11 in the same column to share one N electrode 2; in order to avoid the potential short circuit between the N electrode 2 and the P electrode 6 in the next step, the column-direction etching gap 10b is filled with the cured insulating layer 12, and of course, the row-direction etching gap 10a is also filled with the cured insulating layer.
Step S4: manufacturing a P electrode 6 by adopting a film coating mode, as shown in fig. 22, manufacturing the P electrode 6 on the P-type semiconductor layer 5 of each sub-pixel of the epitaxial wafer by adopting a metal wire bonding mode, and enabling each sub-pixel 11 in the same row to share one P electrode;
step S5: as shown in fig. 23, the entire epitaxial wafer is flip-chip cured on the substrate 7 with the P electrode 6 side in contact with the substrate 7; stripping the buffer layer 8 and the substrate 9 of the epitaxial wafer to expose the N-type semiconductor layer 3 of the epitaxial wafer;
step S6: manufacturing a sub-pixel color-adjusting layer 1, dividing all sub-pixels into a plurality of pixels, and drying two or more sub-pixels in each pixel; then, manufacturing color adjusting layers with the same or different colors on the sub-pixels in each pixel according to a sub-pixel color adjusting scheme, wherein the color adjusting layers are positioned on the surface of the N electrode far away from the active light emitting area;
step S7: obtaining a display unit, wherein the display unit is provided with a plurality of pixels, and each pixel comprises two or more sub-pixels.
The following table shows the comparison of the parameters of the micro light emitting diode of the present invention with the conventional OLED and LCD:
and (4) conclusion: compared with the LCD, the display unit adopted by the micro light-emitting diode display has high color reduction degree, does not need a backlight source and is beneficial to thinning the display; compared with the OLED, the organic light-emitting diode is made of the inorganic semiconductor epitaxial wafer, so that the service life is long, and the manufacturing cost is low.
The foregoing shows and describes the general principles and features of the present invention, together with the advantages thereof. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (6)
1. A kind of miniature light-emitting diode display structure, the display includes one or more display units of quantity, every display unit is formed by several picture elements; the method is characterized in that: each pixel comprises two or more sub-pixels, an etching gap exists between every two adjacent sub-pixels, the sub-pixels in the same column in one unit are connected to the same electrode A, the electrode A is limited to be one of an N electrode or a P electrode, the sub-pixels in the same row in one unit are connected to the same electrode B, the electrode B is limited to be the other one of the N electrode or the P electrode, and row and column driving is achieved; the basic structure of the sub-pixel comprises a color adjusting layer, an N-type semiconductor layer, an active light emitting area, a P-type semiconductor layer, a P electrode and a substrate which are sequentially stacked, the N electrode is in contact with the N-type semiconductor layer, the stacking direction is defined to be the direction which is perpendicular to the plane where the rows and the columns are located, and the sub-pixel emits light from the active light emitting area to the color adjusting layer side along the stacking direction; the sub-pixel further comprises an auxiliary layer, wherein the auxiliary layer at least comprises one of an electron blocking layer, a hole injection layer or an ohmic contact enhancement layer, the electron blocking layer is arranged between the active light emitting area and the P-type semiconductor layer, the hole injection layer is arranged between the P-type semiconductor layer and the P-electrode, and the ohmic contact enhancement layer is arranged between the P-electrode and the P-type semiconductor layer.
2. The micro light-emitting diode display structure of claim 1, wherein: the N electrode is positioned between the N-type semiconductor layer and the color matching layer.
3. The micro light-emitting diode display structure of claim 1, wherein: and the N electrode is positioned on the step surface of the etched step-shaped N-type semiconductor layer.
4. The micro light-emitting diode display structure of claim 1, wherein: a reflecting layer can be arranged between the P electrode and the substrate in the sub-pixel or in an etching gap between adjacent sub-pixels.
5. A manufacturing method for realizing the structure of the micro light-emitting diode display is mainly used for manufacturing a display unit and is characterized in that:
step S1: selecting an epitaxial wafer with a proper specification, wherein the epitaxial wafer is provided with a P-type semiconductor layer, an active light emitting region, an N-type semiconductor layer, a buffer layer and a substrate which are sequentially stacked from top to bottom;
step S2: etching patterns, limiting two mutually vertical directions in a plane of the epitaxial wafer to be a row direction and a column direction, etching a plurality of row direction etching gaps and column direction etching gaps in the row direction and the column direction of the epitaxial wafer, and further forming a plurality of sub-pixels which are distributed in a rectangular array on the epitaxial wafer;
in the step, the depth of the column direction etching gap extends from the side direction of the P type semiconductor layer to the side direction of the substrate to at least penetrate through the N type semiconductor layer; the depth of the etching gap in the row direction extends from the side of the P-type semiconductor layer to the side of the substrate and at least penetrates through the N-type semiconductor layer;
step S3: manufacturing a P electrode, selecting a row direction as an extension direction of the P electrode, manufacturing the P electrode on the P-type semiconductor layer of each sub-pixel of the epitaxial wafer, and enabling each sub-pixel in the same row to share one P electrode;
step S4: flip-chip curing the epitaxial wafer on the substrate, and contacting the P electrode side with the substrate; stripping the buffer layer and the substrate of the epitaxial wafer to expose the N-type semiconductor layer of the epitaxial wafer;
step S5: manufacturing an N electrode, selecting the row direction as the extending direction of the N electrode, manufacturing the N electrode on the N-type semiconductor layer of the extended sub-pixel, and enabling the sub-pixels in the same row to share one N electrode;
step S6: manufacturing a sub-pixel color-adjusting layer, dividing all sub-pixels into a plurality of pixels, and drying two or more sub-pixels in each pixel; manufacturing the same or different color-adjusting layers on the sub-pixels in each pixel according to a sub-pixel color-adjusting scheme, wherein the color-adjusting layers are positioned on the surface of the N electrode far away from the active light-emitting area;
step S7: obtaining a display unit, wherein the display unit is provided with a plurality of pixels, and each pixel comprises two or more sub-pixels.
6. A manufacturing method for realizing the structure of the micro light-emitting diode display is mainly used for manufacturing a display unit and is characterized in that:
step S1: selecting an epitaxial wafer with a proper specification, wherein the epitaxial wafer is provided with a P-type semiconductor layer, an active light emitting region, an N-type semiconductor layer, a buffer layer and a substrate which are sequentially stacked from top to bottom;
step S2: etching patterns, limiting two mutually vertical directions in a plane of the epitaxial wafer to be a row direction and a column direction, etching a plurality of row direction etching gaps and column direction etching gaps in the row direction and the column direction of the epitaxial wafer, and further forming a plurality of sub-pixels which are distributed in a rectangular array on the epitaxial wafer;
in the step, the row direction is selected as the extending direction of the P electrode, and the column direction is selected as the extending direction of the N electrode;
adopting one-step etching in the row direction, wherein the etching gap depth in the row direction extends from the side of the P-type semiconductor layer to the side of the substrate and at least penetrates through the N-type semiconductor layer; the column direction adopts two-step etching, the etching gap in the column direction has two depths, one depth extends from the side direction of the P-type semiconductor layer to the side direction of the substrate and at least penetrates through the N-type semiconductor layer, the other depth extends from the side direction of the P-type semiconductor layer to the side direction of the substrate and does not penetrate through the N-type semiconductor layer, and then the N-type semiconductor layer forms a step structure in the etching gap in the column direction;
step S3: manufacturing an N electrode, namely manufacturing the N electrode on the horizontal plane of the step structure of the N-type semiconductor layer of each sub-pixel of the epitaxial wafer, and enabling each sub-pixel in the same column to share one N electrode;
step S4: manufacturing a P electrode, manufacturing the P electrode on the P-type semiconductor layer of each sub-pixel of the epitaxial wafer, and enabling each sub-pixel in the same row to share one P electrode;
step S5: the epitaxial wafer is integrally flip-chip solidified on the substrate, and the P electrode side is in contact with the substrate; stripping the buffer layer and the substrate of the epitaxial wafer to expose the N-type semiconductor layer of the epitaxial wafer;
step S6: manufacturing a sub-pixel color-adjusting layer, dividing all sub-pixels into a plurality of pixels, and drying two or more sub-pixels in each pixel; manufacturing the same or different color-adjusting layers on the sub-pixels in each pixel according to a sub-pixel color-adjusting scheme, wherein the color-adjusting layers are positioned on the surface of the N electrode far away from the active light-emitting area;
step S7: obtaining a display unit, wherein the display unit is provided with a plurality of pixels, and each pixel comprises two or more sub-pixels.
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| CN101324306A (en) * | 2007-06-15 | 2008-12-17 | 统宝光电股份有限公司 | Light-emitting diode arrays and methods of manufacture |
| CN103474425A (en) * | 2013-08-14 | 2013-12-25 | 中国科学院长春光学精密机械与物理研究所 | High-luminescence-uniformity miniaturized flexible LED area array device and preparation method thereof |
| CN104584110A (en) * | 2012-08-21 | 2015-04-29 | Lg电子株式会社 | Display device using semiconductor light emitting device and method of fabricating the same |
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| CN101324306A (en) * | 2007-06-15 | 2008-12-17 | 统宝光电股份有限公司 | Light-emitting diode arrays and methods of manufacture |
| CN104584110A (en) * | 2012-08-21 | 2015-04-29 | Lg电子株式会社 | Display device using semiconductor light emitting device and method of fabricating the same |
| CN103474425A (en) * | 2013-08-14 | 2013-12-25 | 中国科学院长春光学精密机械与物理研究所 | High-luminescence-uniformity miniaturized flexible LED area array device and preparation method thereof |
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Denomination of invention: A micro LED display structure and manufacturing method Effective date of registration: 20220215 Granted publication date: 20200821 Pledgee: CIC financing guarantee Haian Co.,Ltd. Pledgor: DURA-CHIP (NANTONG) Ltd. Registration number: Y2022320010071 |