CN107769600A - A kind of asymmetric more level power translation circuits - Google Patents
A kind of asymmetric more level power translation circuits Download PDFInfo
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- CN107769600A CN107769600A CN201711282919.4A CN201711282919A CN107769600A CN 107769600 A CN107769600 A CN 107769600A CN 201711282919 A CN201711282919 A CN 201711282919A CN 107769600 A CN107769600 A CN 107769600A
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- 238000013519 translation Methods 0.000 title claims abstract description 64
- 239000003990 capacitor Substances 0.000 claims description 42
- 230000005669 field effect Effects 0.000 claims description 14
- 230000005611 electricity Effects 0.000 claims description 13
- KJLLKLRVCJAFRY-UHFFFAOYSA-N mebutizide Chemical compound ClC1=C(S(N)(=O)=O)C=C2S(=O)(=O)NC(C(C)C(C)CC)NC2=C1 KJLLKLRVCJAFRY-UHFFFAOYSA-N 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 18
- 238000005516 engineering process Methods 0.000 description 5
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 2
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- 238000013459 approach Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0067—Converter structures employing plural converter units, other than for parallel operation of the units on a single load
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
The invention discloses a kind of asymmetric more level power translation circuits, including the first dc source, the second dc source, switching capacity unit, the first full-bridge circuit and the second full-bridge circuit.And by adjusting the ratio of the first dc source and the second dc source, and each full control is controlled to switch on-off, constant DC voltage is converted into more level exchange outputs, and in positive and negative two times level and positive and negative seven times level of the output for the first dc source, the electric capacity of switching capacity unit is in discharge condition, when output is not positive and negative two times of level of the first dc source and positive and negative seven times of level, the electric capacity of switching capacity unit is in charged state.It can be seen that the application only needs two input powers to export plurality of level alternating current, negligible amounts, and device is less, and circuit structure is simple；When only output is positive and negative two times of level and positive and negative seven times of level, electric capacity is in discharge condition, and other states are in charged state so that electric capacity has small voltage ripple.
Description
Technical field
The present invention relates to electronic power converter technical field, more particularly to a kind of asymmetric more level power conversion
Circuit.
Background technology
As energy crisis and energy pollution approach step by step, obtaining novel energy has become very urgent, with wind energy and
Solar energy be representative distributed generation technology and using battery and super capacitor as the distributed energy storage technology of representative increasingly
Paid much attention to by countries in the world.
And the development and application of emerging energy and new technology is highly dependent on the performance of electronic power inversion device, in recent years,
Multi-level inverter circuit based on switching capacity also enjoys great popularity, still, the existing multi-level inverse conversion electricity based on switching capacity
Capacitor can only charge once or twice within an output voltage cycle in road, cause capacitance voltage ripple larger, this is undoubtedly
Limit the application of this novel inverter.Therefore, how to design that circuit structure is simple, voltage ripple is small and input power number
It is to have the problem of to be solved to measure much less level inverter circuit.
The content of the invention
It is an object of the invention to provide a kind of asymmetric more level power translation circuits, so as to solve existing based on switch electricity
The problem of complicated and capacitance voltage ripple of the multi-level inverter circuit of appearance is larger.
To achieve the above object, the present invention provides a kind of asymmetric more level power translation circuits, including the first direct current
Source, the second dc source, switching capacity unit, the first full-bridge circuit and the second full-bridge circuit；
First full-bridge circuit includes the first full control switch, the second full control switch, the 3rd full control switch and the 4th full control
Switch；Second full-bridge circuit includes the 5th full control switch, the 6th full control switch, the 7th full control switch and eight convergent points control and opened
Close；
The anode of first dc source by the first end of the switching capacity unit and the described first full control switch,
Described 3rd first end that control switchs entirely is connected, and negative terminal controls the second of switch entirely by the switching capacity unit and described second
End, the second end of the 4th full control switch are connected；Second end of the described first full control switch and the described second full control switch
First end is connected, and the second end of the described 3rd full control switch is connected with the first end of the described 4th full control switch；
The of the first end of the anode of second dc source and the described 5th full control switch, the 7th full control switch
One end is connected, and negative terminal is connected with the second end of the described 6th full control switch, the second end of eight convergent points control switch；Described 5th
Second end of full control switch is connected with the first end of the described 6th full control switch, the second end that the described 7th full control switchs with it is described
The first end of eight convergent points control switch is connected；
The tie point of described first full control switch and the second full control switch switchs and described the with the described 7th full control
The tie point of eight convergent points control switch is connected, and the tie point of the described 3rd full control switch and the described 4th full control switch is as an output
The tie point of end, the described 5th full control switch and the described 6th full control switch is as another output end；The control of each full control switch
End is connected by drive circuit with controller；
Wherein, by adjusting the ratio of first dc source and second dc source, and each full control is controlled to open
The break-make of pass, constant DC voltage is converted into more level exchange outputs；And exporting as first dc source just
When minus two times of level and positive and negative seven times of level, the electric capacity of the switching capacity unit is in discharge condition, is not described in output
When positive and negative two times of level of the first dc source and positive and negative seven times of level, the electric capacity of the switching capacity unit is in charging shape
State.
Alternatively, the switching capacity unit includes the 9th full control switch, perfect control switch, the first diode and first
Capacitor；
The first end of described 9th full control switch and the positive pole of first diode with first dc source
Anode is connected, the second end of the described 9th full control switch and the first end of the perfect control switch, first capacitor
One end is connected；Switch is controlled entirely with the negative terminal of first dc source, described second in second end of the perfect control switch
Second end is connected with the second end of the described 4th full control switch；The negative pole of first diode is another with first capacitor
One end, the first end of the first full control switch are connected with the first end of the described 3rd full control switch；Described 9th full control switch
It is connected with the control terminal of the perfect control switch by drive circuit with controller.
Alternatively, the magnitude of voltage of second dc source is five times of magnitude of voltage of first dc source；
Wherein, by controlling each full control to switch on-off, so that output is positive one times of first direct current power source voltage
It is level, minus one times level, positive two times of level, minus two times of level, positive three times level, negative three times level, positive four times of level, minus four times
Level, positive five times of level, minus five times of level, positive six times of level, minus six times of level, positive seven times of level, minus seven times of level or zero electricity
It is flat.
Alternatively, the switching capacity unit includes the 3rd full-bridge circuit, the second diode, the 3rd diode, the second electricity
Container and the 3rd capacitor；3rd full-bridge circuit includes the 11st full control switch, the 12nd full control switch, the 13rd full control
Switch and the 14th full control switch；
The anode of first dc source switchs with the described 11st full first end for controlling switch, the 13rd full control
First end be connected with the positive pole of second diode, the second end of negative terminal and the described 12nd full control switch, the described tenth
Second end of four full control switches, the negative terminal of the 3rd diode are connected；Second end of the described 11st full control switch with it is described
The first end of 12nd full control switch, one end of the 3rd capacitor are connected, the other end of the 3rd capacitor with it is described
The anode of 3rd diode, the second end of the second full control switch are connected with the second end of the described 4th full control switch；
One end of the negative pole of second diode and second capacitor, the first full control switch first end and
The first end of described 3rd full control switch is connected；Second end of the described 13rd full control switch is another with second capacitor
End, the first end of the 14th full control switch are connected.
Alternatively, the magnitude of voltage of second dc source is seven times of magnitude of voltage of first dc source；
Wherein, by controlling each full control to switch on-off, so that output is positive one times of first direct current power source voltage
It is level, minus one times level, positive two times of level, minus two times of level, positive three times level, negative three times level, positive four times of level, minus four times
It is level, positive five times of level, minus five times of level, positive six times of level, minus six times of level, positive seven times of level, minus seven times of level, just octuple
Level, negative octuple level, positive nine times of level, minus nine times of level, positive ten times of level, minus ten times of level or zero level.
Alternatively, each full control switch is N-channel electric power field-effect transistor, wherein, the control of each full control switch
End, first end and the second end are respectively grid, drain electrode and the source electrode of the N-channel electric power field-effect transistor.
Alternatively, each full control switch is P-channel electric power field-effect transistor, wherein, the control of each full control switch
End, first end and the second end are respectively grid, source electrode and the drain electrode of the N-channel electric power field-effect transistor.
Alternatively, each full control switch is insulated gate bipolar transistor, wherein, the control terminal of each full control switch,
First end and the second end are respectively grid, the collector and emitter of the N-channel electric power field-effect transistor.
The asymmetric more level power translation circuits of one kind provided by the present invention, it includes the first dc source, second straight
Flow power supply, switching capacity unit, the first full-bridge circuit and the second full-bridge circuit.It is and straight by the first dc source of adjustment and second
The ratio of power supply is flowed, and controls each full control to switch on-off, constant DC voltage is converted into more level exchanges exports, and
Export for positive and negative two times of level of the first dc source and positive and negative seven times of level when, the electric capacity of switching capacity unit is in electric discharge shape
State, when output is not positive and negative two times of level of the first dc source and positive and negative seven times of level, at the electric capacity of switching capacity unit
In charged state.It can be seen that the application only needs two input powers, required number of power sources is less, and circuit devcie is less, circuit
It is simple in construction, plurality of level alternating current can be exported；And when only output is positive and negative two times of level and positive and negative seven times of level, at electric capacity
In discharge condition, other states are in charged state so that electric capacity has less voltage ripple.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
The embodiment of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis
The accompanying drawing of offer obtains other accompanying drawings.
Fig. 1 is a kind of structural representation of asymmetric more level power translation circuits provided in an embodiment of the present invention；
Fig. 2 is a kind of concrete structure schematic diagram of asymmetric more level power translation circuits provided in an embodiment of the present invention；
Fig. 3 is operation mode when asymmetric more level power translation circuits provided in an embodiment of the present invention export zero level
Schematic diagram；
Fig. 4 is work when asymmetric more level power translation circuits provided in an embodiment of the present invention export positive one times of level
Mode schematic diagram；
Fig. 5 is work when asymmetric more level power translation circuits provided in an embodiment of the present invention export positive two times of level
Mode schematic diagram；
Fig. 6 is work when asymmetric more level power translation circuits provided in an embodiment of the present invention export positive three times level
Mode schematic diagram；
Fig. 7 is work when asymmetric more level power translation circuits provided in an embodiment of the present invention export positive four times of level
Mode schematic diagram；
Fig. 8 is work when asymmetric more level power translation circuits provided in an embodiment of the present invention export positive five times of level
Mode schematic diagram；
Fig. 9 is work when asymmetric more level power translation circuits provided in an embodiment of the present invention export positive six times of level
Mode schematic diagram；
Figure 10 is work when asymmetric more level power translation circuits provided in an embodiment of the present invention export positive seven times of level
Make mode schematic diagram；
Figure 11 is work when asymmetric more level power translation circuits provided in an embodiment of the present invention export minus one times level
Make mode schematic diagram；
Figure 12 is work when asymmetric more level power translation circuits provided in an embodiment of the present invention export minus two times of level
Make mode schematic diagram；
Figure 13 is work when three times level is born in asymmetric more level power translation circuit outputs provided in an embodiment of the present invention
Make mode schematic diagram；
Figure 14 is work when asymmetric more level power translation circuits provided in an embodiment of the present invention export minus four times of level
Make mode schematic diagram；
Figure 15 is work when asymmetric more level power translation circuits provided in an embodiment of the present invention export minus five times of level
Make mode schematic diagram；
Figure 16 is work when asymmetric more level power translation circuits provided in an embodiment of the present invention export minus six times of level
Make mode schematic diagram；
Figure 17 is work when asymmetric more level power translation circuits provided in an embodiment of the present invention export minus seven times of level
Make mode schematic diagram；
Figure 18 is that another concrete structure of asymmetric more level power translation circuits provided in an embodiment of the present invention is illustrated
Figure.
Embodiment
To make the purpose, technical scheme and advantage of the embodiment of the present invention clearer, below in conjunction with the embodiment of the present invention
In accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is
Part of the embodiment of the present invention, rather than whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art
The every other embodiment obtained under the premise of creative work is not made, belongs to the scope of protection of the invention.
Embodiment one
Fig. 1 is refer to, Fig. 1 is that a kind of structure of asymmetric more level power translation circuits provided in an embodiment of the present invention is shown
It is intended to, the circuit includes the first dc source V1, the second dc source V2, switching capacity unit, the first full-bridge circuit and second
Full-bridge circuit；
It is complete that first full-bridge circuit includes the first full control switch Q1, the second full control switch Q2, the 3rd full control switch Q3 and the 4th
Control switch Q4；Second full-bridge circuit includes the 5th full control switch Q5, the 6th full control switch Q6, the 7th full control switch Q7 and eight convergent points
Control switch Q8；
First dc source V1 anode passes through switching capacity unit and the first full control switch Q1 first end, the 3rd full control
Switch Q3 first end is connected, and negative terminal is switched by switching capacity unit and the second full control switch Q2 the second end, the 4th full control
Q4 the second end is connected；First full control switch Q1 the second end is connected with the second full control switch Q2 first end, and the 3rd full control is opened
The second end for closing Q3 is connected with the 4th full control switch Q4 first end；
Second dc source V2 anode and the 5th full control switch Q5 first end, the 7th full control switch Q7 first end phase
Even, negative terminal is connected with the 6th full control switch Q6 the second end, eight convergent points control switch Q8 the second end；The of 5th full control switch Q5
Two ends are connected with the 6th full control switch Q6 first end, the 7th full control switch Q7 the second end and the first of eight convergent points control switch Q8
End is connected；
Control switch Q2 tie point and the 7th full control switch Q7 and eight convergent points control switch first full control switch Q1 and second entirely
Q8 tie point is connected, and the tie point that the 3rd full control switch Q3 and the 4th controls switch Q4 entirely connects as an output end, the output end
The anode of supported V 0 is connected to, the 5th full control switch Q5 and the 6th controls switch Q6 tie point as another output end, the output end entirely
It is connected to the negative terminal of supported V 0；The control terminal of each full control switch is connected by drive circuit with controller；
Wherein, by adjusting the first dc source V1 and the second dc source V2 ratio, and each full control switch is controlled
Break-make, constant DC voltage is converted into 15 kinds of level exchange outputs；And positive and negative two times in output for the first dc source
When level and positive and negative seven times of level, the electric capacity of switching capacity unit is in discharge condition, is not the first dc source in output
When positive and negative two times of level and positive and negative seven times of level, the electric capacity of switching capacity unit is in charged state.
It is appreciated that above-mentioned each full control switch can be N-channel electric power field-effect transistor, wherein, each full control
Control terminal, first end and the second end of switch are respectively grid, drain electrode and the source electrode of N-channel electric power field-effect transistor；Can be with
It is P-channel electric power field-effect transistor, wherein, control terminal, first end and the second end of each full control switch are respectively N-channel electricity
Grid, source electrode and the drain electrode of field of force effect transistor；Can also be insulated gate bipolar transistor, wherein, each full control switch
Control terminal, first end and the second end be respectively the grid of N-channel electric power field-effect transistor, collector and emitter.Certainly,
It can also be other devices for possessing identity function, be not limited thereto.
In the present embodiment, by adjusting the ratio of the first dc source and the second dc source, and each full control is accordingly controlled
Switch on-off, constant DC voltage is converted into more level exchange outputs, and be the positive and negative of the first dc source in output
When two times of level and positive and negative seven times of level, the electric capacity of switching capacity unit is in discharge condition, is not the first direct current in output
When positive and negative two times of level in source and positive and negative seven times of level, the electric capacity of switching capacity unit is in charged state.So, it is only necessary to two
Individual input power, required number of power sources is less, and circuit devcie is less, and circuit structure is simple, can export plurality of level alternating current；
And when only output is positive and negative two times of level and positive and negative seven times of level, electric capacity is in discharge condition, and other states are in charging
State so that electric capacity has less voltage ripple.
Embodiment two
Based on above-described embodiment one, referring to a kind of concrete structure of asymmetric more level power translation circuits shown in Fig. 2
Schematic diagram, above-mentioned switching capacity unit include the 9th full control switch Q9, perfect control switch Q10, the first diode D1 and first
Capacitor C1；
The anode phase of 9th full control switch Q9 first end and the first diode D1 positive pole with the first dc source V1
Even, the 9th full control switch Q9 the second end is connected with perfect control switch Q10 first end, the first capacitor C1 one end；The
Perfect control switch Q10 the second end and the first dc source V1 negative terminal, the second full control switch Q2 the second end and the 4th full control
Switch Q4 the second end is connected；First diode D1 negative pole and the first capacitor C1 other end, the first full control switch Q1's
First end is connected with the 3rd full control switch Q3 first end；9th full control switch Q9 and perfect control switch Q10 control terminal is equal
It is connected by drive circuit with controller.
In certain embodiments, the magnitude of voltage of the second dc source can be set to the five of the magnitude of voltage of the first dc source
Times, i.e. V2=5V1, then by controlling each full control to switch on-off, so that output is positive one times of the first direct current power source voltage
It is level, minus one times level, positive two times of level, minus two times of level, positive three times level, negative three times level, positive four times of level, minus four times
Level, positive five times of level, minus five times of level, positive six times of level, minus six times of level, positive seven times of level, minus seven times of level or zero electricity
It is flat.
Specifically, operation mode when exporting zero level referring to asymmetric more level power translation circuits shown in Fig. 3 shows
It is intended to, when perfect control switch Q10, the first full control switch Q1, the 3rd full control switch Q3, the 5th full control switch Q5, the 7th full control
Switch Q7 is simultaneously turned on, and the 9th full control switch Q9, the second full control switch Q2, the 4th full control switch Q4, the 6th full control switch Q6,
When eight convergent points control switch Q8 is simultaneously turned off, the first capacitor C1 passes through the first diode D1 and perfect control switch Q10 and first
Dc source V1Parallel connection, and the first dc source V1 voltage is charged to, the output of asymmetric more level power translation circuits
Voltage is equal to zero, i.e. V0=0.
Operation mode when exporting positive one times of level referring to asymmetric more level power translation circuits shown in Fig. 4 is illustrated
Figure, when perfect control switch Q10, the second full control switch Q2, the 3rd full control switch Q3, the 5th full control switch Q5, the 7th full control are opened
Q7 is closed to simultaneously turn on, and the 9th full control switch Q9, the first full control switch Q1, the 4th full control switch Q4, the 6th full control switch Q6, the
When eight convergent points control switch Q8 is simultaneously turned off, the first capacitor C1 is straight by the first diode D1 and perfect control switch Q10 and first
Flow power supply V1Parallel connection, and the voltage V1 of the first dc source is charged to, the output electricity of asymmetric more level power translation circuits
Pressure is equal to the voltage of the first dc source, i.e. V0=V1.
Operation mode when exporting positive two times of level referring to asymmetric more level power translation circuits shown in Fig. 5 is illustrated
Figure, when the 9th full control switch Q9, the second full control switch Q2, the 3rd full control switch Q3, the 5th full control switch Q5, the 7th full control switch
Q7 is simultaneously turned on, and the perfect control switch Q10, the first full control switch Q1, the 4th full control switch Q4, the 6th full control switch Q6, the
When eight convergent points control switch Q8 is simultaneously turned off, the first diode D1 cut-offs, the first capacitor C1 passes through the 9th full control switch Q9 and first
Dc source V1Series connection, the output voltage of asymmetric more level power translation circuits are equal to the two of the voltage of the first dc source
Times, i.e. V0=2V1.
Operation mode when exporting positive three times level referring to asymmetric more level power translation circuits shown in Fig. 6 is illustrated
Figure, when the 9th full control switch Q9, the first full control switch Q1, the 4th full control switch Q4, the 6th full control switch Q6, the 7th full control switch
Q7 is simultaneously turned on, and the perfect control switch Q10, the second full control switch Q2, the 3rd full control switch Q3, the 5th full control switch Q5, the
When eight convergent points control switch Q8 is simultaneously turned off, the first capacitor C1 is connected by the 9th full control switch Q9 with the first dc source V1, and
By the first full control switch Q1 and the 7th, control switch Q7 and the second dc source V2 differential concatenations, asymmetric more level powers become entirely
The output voltage of circuit is changed equal to three times of the voltage of the first dc source, i.e. V0=3V1.
Operation mode when exporting positive four times of level referring to asymmetric more level power translation circuits shown in Fig. 7 is illustrated
Figure, when perfect control switch Q10, the first full control switch Q1, the 4th full control switch Q4, the 6th full control switch Q6, the 7th full control are opened
Q7 is closed to simultaneously turn on, and the 9th full control switch Q9, the second full control switch Q2, the 3rd full control switch Q3, the 5th full control switch Q5, the
When eight convergent points control switch Q8 is simultaneously turned off, the first capacitor C1 is straight by the first diode D1 and perfect control switch Q10 and first
Stream power supply V1 is in parallel and is charged to the voltage V1 of the first dc source, and switchs the control switches entirely of Q1 and the 7th by the first full control
Q7 and the second dc source V2 differential concatenations, the output voltage of asymmetric more level power translation circuits are equal to the first dc source
Four times of voltage, i.e. V0=4V1.
Operation mode when exporting positive five times of level referring to asymmetric more level power translation circuits shown in Fig. 8 is illustrated
Figure, when perfect control switch Q10, the first full control switch Q1, the 3rd full control switch Q3, the 6th full control switch Q6, the 7th full control are opened
Q7 is closed to simultaneously turn on, and the 9th full control switch Q9, the second full control switch Q2, the 4th full control switch Q4, the 5th full control switch Q5, the
When eight convergent points control switch Q8 is simultaneously turned off, the first capacitor C1 is straight by the first diode D1 and perfect control switch Q10 and first
Stream power supply V1 is in parallel and is charged to the voltage V1 of the first dc source, the output voltage of asymmetric more level power translation circuits
Equal to five times of the voltage of the first dc source, i.e. V0=5V1.
Operation mode when exporting positive six times of level referring to asymmetric more level power translation circuits shown in Fig. 9 is illustrated
Figure, when perfect control switch Q10, the second full control switch Q2, the 3rd full control switch Q3, the 6th full control switch Q6, the 7th full control are opened
Q7 is closed to simultaneously turn on and the 9th full control switch Q9, the first full control switch Q1, the 4th full control switch Q4, the 5th full control switch Q5, the
When eight convergent points control switch Q8 is simultaneously turned off, the first capacitor C1 is straight by the first diode D1 and perfect control switch Q10 and first
Stream power supply V1 is in parallel and is charged to the voltage V1 of the first dc source, and switchs the control switches entirely of Q2 and the 7th by the second full control
Q7 connects with the second dc source V2, and the output voltage of asymmetric more level power translation circuits is equal to the electricity of the first dc source
Six times of pressure, i.e. V0=6V1.
Operation mode when exporting positive seven times of level referring to asymmetric more level power translation circuits shown in Figure 10 is illustrated
Figure, when the 9th full control switch Q9, the second full control switch Q2, the 3rd full control switch Q3, the 6th full control switch Q6, the 7th full control switch
Q7 is simultaneously turned on and perfect control switch Q10, the first full control switch Q1, the 4th full control switch Q4, the 5th full control switch Q5, the 8th
When full control switch Q8 is simultaneously turned off, the first capacitor C1 is connected V1 by the 9th full control switch Q9 with the first dc source, and is led to
Crossing the second full control switch Q2 and the 7th, control switch Q7 connects with the second dc source V2 entirely, asymmetric more level power translation circuits
Output voltage be equal to seven times of voltage of the first dc source, i.e. V0=7V1.
Operation mode when exporting minus one times level referring to asymmetric more level power translation circuits shown in Figure 11 is illustrated
Figure, when perfect control switch Q10, the first full control switch Q1, the 4th full control switch Q4, the 5th full control switch Q5, the 7th full control are opened
Q7 is closed to simultaneously turn on and the 9th full control switch Q9, the second full control switch Q2, the 3rd full control switch Q3, the 6th full control switch Q6, the
When eight convergent points control switch Q8 is simultaneously turned off, the first capacitor C1 is straight by the first diode D1 and perfect control switch Q10 and first
Stream power supply V1 is in parallel and is charged to the voltage V1 of the first dc source, the output voltage of asymmetric more level power translation circuits
Equal to the minus one times of the voltage of the first dc source, i.e. V0=-1V1.
Operation mode when exporting minus two times of level referring to asymmetric more level power translation circuits shown in Figure 12 is illustrated
Figure, when the 9th full control switch Q9, the first full control switch Q1, the 4th full control switch Q4, the 5th full control switch Q5, the 7th full control switch
Q7 is simultaneously turned on and perfect control switch Q10, the second full control switch Q2, the 3rd full control switch Q3, the 6th full control switch Q6, the 8th
When full control switch Q8 is simultaneously turned off, the first capacitor C1 is connected by the 9th full control switch Q9 with the first dc source V1, non-right
Claim the output voltage of more level power translation circuits equal to minus two times of the voltage of the first dc source, i.e. V0=-2V1.
Operation mode signal during three times level is born in asymmetric more level power translation circuit outputs with reference to shown in figure 13
Figure, when the 9th full control switch Q9, the second full control switch Q2, the 3rd full control switch Q3, the 5th full control switch Q5, eight convergent points control switch
Q8 is simultaneously turned on and perfect control switch Q10, the first full control switch Q1, the 4th full control switch Q4, the 6th full control switch Q6, the 7th
When full control switch Q7 is simultaneously turned off, the first capacitor C1 is connected by the 9th full control switch Q9 with the first dc source V1, and is led to
Cross the first full control switch Q1 and the 7th control switch Q7 and the second dc source V2 differential concatenations entirely, asymmetric more level power conversion
The output voltage of circuit is equal to minus three times of the voltage of the first dc source, i.e. V0=-3V1.
Asymmetric more level power translation circuits with reference to shown in figure 14 export operation mode signal during minus four times of level
Figure, when perfect control switch Q10, the second full control switch Q2, the 3rd full control switch Q3, the 5th full control switch Q5, eight convergent points control are opened
Q8 is closed to simultaneously turn on and the 9th full control switch Q9, the first full control switch Q1, the 4th full control switch Q4, the 6th full control switch Q6, the
When seven full control switch Q7 are simultaneously turned off, the first capacitor C1 is straight by the first diode D1 and perfect control switch Q10 and first
Stream power supply V1 is in parallel and is charged to the voltage V1 of the first dc source, and switchs the control switches entirely of Q1 and the 7th by the first full control
Q7 and the second dc source V2 differential concatenations, the output voltage of asymmetric more level power translation circuits are equal to the first dc source
Minus four times of voltage, i.e. V0=-4V1.
Asymmetric more level power translation circuits with reference to shown in figure 15 export operation mode signal during minus five times of level
Figure, when perfect control switch Q10, the first full control switch Q1, the 3rd full control switch Q3, the 5th full control switch Q5, eight convergent points control are opened
Q8 is closed to simultaneously turn on and the 9th full control switch Q9, the second full control switch Q2, the 4th full control switch Q4, the 6th full control switch Q6, the
When seven full control switch Q7 are simultaneously turned off, the first capacitor C1 is straight by the first diode D1 and perfect control switch Q10 and first
Stream power supply V1 is in parallel and is charged to the voltage V1 of the first dc source, the output voltage of asymmetric more level power translation circuits
Equal to minus five times of the voltage of the first dc source, i.e. V0=-5V1.
Asymmetric more level power translation circuits with reference to shown in figure 16 export operation mode signal during minus six times of level
Figure, when perfect control switch Q10, the first full control switch Q1, the 4th full control switch Q4, the 5th full control switch Q5, eight convergent points control are opened
Q8 is closed to simultaneously turn on and the 9th full control switch Q9, the second full control switch Q2, the 3rd full control switch Q3, the 6th full control switch Q6, the
When seven full control switch Q7 are simultaneously turned off, the first capacitor C1 is straight by the first diode D1 and perfect control switch Q10 and first
Stream power supply V1 is in parallel and is charged to the voltage V1 of the first dc source, and switchs the control switches entirely of Q2 and the 7th by the second full control
Q7 connects with the second dc source V2, and the output voltage of asymmetric more level power translation circuits is equal to the electricity of the first dc source
Minus six times of pressure, i.e. VO=-6V1.
Asymmetric more level power translation circuits with reference to shown in figure 17 export operation mode signal during minus seven times of level
Figure, when the 9th full control switch Q9, the first full control switch Q1, the 4th full control switch Q4, the 5th full control switch Q5, eight convergent points control switch
Q8 is simultaneously turned on and perfect control switch Q10, the second full control switch Q2, the 3rd full control switch Q3, the 6th full control switch Q6, the 7th
When full control switch Q7 is simultaneously turned off, the first capacitor C1 is connected by the 9th full control switch Q9 with the first dc source V1, and is led to
Crossing the second full control switch Q2 and the 7th, control switch Q7 connects with the second dc source V2 entirely, asymmetric more level power translation circuits
Output voltage be equal to minus seven times of voltage of the first dc source, i.e. V0=7V1.
In the present embodiment, switching capacity unit is used for two constant DC voltages by cascade change into voltage with multiple levels
Output, and especially by five times of the magnitude of voltage that the magnitude of voltage of the second dc source is set to the first dc source, reasonably control
Make each full control to switch on-off, the alternating current of exportable 15 kinds of varying levels.
Embodiment three
Based on above-described embodiment one, referring to the specific knot of the another kind of asymmetric more level power translation circuits shown in Figure 18
Structure schematic diagram, above-mentioned switching capacity unit include the 3rd full-bridge circuit, the second diode D1, the 3rd diode D2, the second electric capacity
Device C1 and the 3rd capacitor C2；3rd full-bridge circuit includes the 11st full control switch Q9, the 12nd full control switch Q10, the 13rd
Full control switch Q11 and the 14th controls switch Q12 entirely；
The of first dc source V1 anode and the 11st full control switch Q9 first end, the 13rd full control switch Q11
One end is connected with the second diode D1 positive pole, and negative terminal and the 12nd full control switch Q10 the second end, the 14th full control switch
Q11 the second end, the 3rd diode D2 negative terminal are connected；11st full control switch Q9 the second end switchs with the 12nd full control
Q10 first end, the 3rd capacitor C2 one end are connected, the 3rd capacitor C2 other end and the 3rd diode D2 anode,
Second full control switch Q2 the second end is connected with the 4th full control switch Q4 the second end；
Second diode D1 negative pole and the second capacitor C1 one end, the first full control switch Q1 first end and the 3rd are complete
Control switch Q3 first end is connected；It is 13rd full control switch Q11 the second end and the second capacitor C1 other end, the 14th complete
Control switch Q12 first end is connected.
In certain embodiments, can be by the seven of the magnitude of voltage that the magnitude of voltage of the second dc source is the first dc source
Times, i.e. V2=7V1, and by controlling each full control to switch on-off, so that positive one times electricity of the output for the first direct current power source voltage
Flat, minus one times level, positive two times of level, minus two times of level, positive three times level, negative three times level, positive four times of level, minus four times of electricity
Flat, positive five times of level, minus five times of level, positive six times of level, minus six times of level, positive seven times of level, minus seven times of level, just octuple electricity
Put down, negative octuple level, positive nine times of level, minus nine times of level, positive ten times of level, minus ten times of level or zero level, totally 21 kinds of differences
The exchange output of level.Asymmetric more level power change-over circuit corresponding operation modes during as output varying level, it is and upper
It is similar to state each operation mode of embodiment two, will not be repeated here.
In the present embodiment, especially by the seven of the magnitude of voltage that the magnitude of voltage of the second dc source is set to the first dc source
Times, reasonably control each full control to switch on-off, the alternating current of exportable 21 kinds of varying levels.
Each embodiment is described by the way of progressive in specification, and what each embodiment stressed is and other realities
Apply the difference of example, between each embodiment identical similar portion mutually referring to.
More level power translation circuits asymmetric to one kind provided by the present invention are described in detail above.Herein
Apply specific case to be set forth the principle and embodiment of the present invention, the explanation of above example is only intended to help
Understand the method and its core concept of the present invention.It should be pointed out that for those skilled in the art, do not taking off
On the premise of from the principle of the invention, some improvement and modification can also be carried out to the present invention, these are improved and modification also falls into this
In invention scope of the claims.
Claims (8)
- A kind of 1. asymmetric more level power translation circuits, it is characterised in that including the first dc source, the second dc source, Switching capacity unit, the first full-bridge circuit and the second full-bridge circuit；First full-bridge circuit includes the first full control switch, the second full control switch, the 3rd full control switch and the 4th full control switch； Second full-bridge circuit includes the 5th full control switch, the 6th full control switch, the 7th full control switch and eight convergent points control switch；The anode of first dc source passes through the first end of the switching capacity unit and the described first full control switch, described The first end of 3rd full control switch is connected, negative terminal by the second end of the switching capacity unit and the described second full control switch, Second end of the described 4th full control switch is connected；Second end of the described first full control switch and the first of the described second full control switch End is connected, and the second end of the described 3rd full control switch is connected with the first end of the described 4th full control switch；The anode of second dc source and the first end of the described 5th full control switch, the first end of the 7th full control switch It is connected, negative terminal is connected with the second end of the described 6th full control switch, the second end of eight convergent points control switch；Described 5th full control Second end of switch is connected with the first end of the described 6th full control switch, the second end and the described 8th of the described 7th full control switch The first end of full control switch is connected；The tie point and the described 7th full control switch and the eight convergent points of described first full control switch and the second full control switch The tie point of control switch is connected, and the tie point of the described 3rd full control switch and the described 4th full control switch is as an output end, institute The tie point of the 5th full control switch and the described 6th full control switch is stated as another output end；The control terminal of each full control switch is logical Overdrive circuit is connected with controller；Wherein, by adjusting the ratio of first dc source and second dc source, and each full control switch is controlled Break-make, constant DC voltage is converted into more level exchange outputs；And in positive and negative two that output is first dc source When times level and positive and negative seven times of level, the electric capacity of the switching capacity unit is in discharge condition, is not described first in output When positive and negative two times of level of dc source and positive and negative seven times of level, the electric capacity of the switching capacity unit is in charged state.
- 2. asymmetric more level power translation circuits according to claim 1, it is characterised in that the switching capacity unit Including the 9th full control switch, perfect control switch, the first diode and the first capacitor；The anode of the first end of described 9th full control switch and the positive pole of first diode with first dc source It is connected, the second end of the described 9th full control switch and first end, one end of first capacitor of the perfect control switch It is connected；The second of switch is controlled entirely with the negative terminal of first dc source, described second in second end of the perfect control switch The second end with the described 4th full control switch is held to be connected；The negative pole of first diode is another with first capacitor End, the first end of the first full control switch are connected with the first end of the described 3rd full control switch；Described 9th full control switch and The control terminal of the perfect control switch is connected by drive circuit with controller.
- 3. asymmetric more level power translation circuits according to claim 2, it is characterised in that second dc source Magnitude of voltage be five times of magnitude of voltage of first dc source；Wherein, by controlling each full control to switch on-off so that output for first direct current power source voltage positive one times of level, Minus one times level, positive two times of level, minus two times of level, positive three times level, negative three times level, positive four times of level, minus four times of level, Positive five times of level, minus five times of level, positive six times of level, minus six times of level, positive seven times of level, minus seven times of level or zero level.
- 4. asymmetric more level power translation circuits according to claim 1, it is characterised in that the switching capacity unit Including the 3rd full-bridge circuit, the second diode, the 3rd diode, the second capacitor and the 3rd capacitor；The 3rd full-bridge electricity Road includes the 11st full control switch, the 12nd full control switch, the 13rd full control switch and the 14th full control switch；The of the first end of the anode of first dc source and the described 11st full control switch, the 13rd full control switch One end is connected with the positive pole of second diode, the second end of negative terminal and the described 12nd full control switch, the described 14th complete Control the second end of switch, the negative terminal of the 3rd diode is connected；The second end and the described tenth of described 11st full control switch The first end of two full control switches, one end of the 3rd capacitor are connected, the other end and the described 3rd of the 3rd capacitor The anode of diode, the second end of the second full control switch are connected with the second end of the described 4th full control switch；One end of the negative pole of second diode and second capacitor, the first end of the first full control switch and described The first end of 3rd full control switch is connected；The other end of described 13rd complete the second end for controlling switch and second capacitor, The first end of described 14th full control switch is connected.
- 5. asymmetric more level power translation circuits according to claim 4, it is characterised in that second dc source Magnitude of voltage be seven times of magnitude of voltage of first dc source；Wherein, by controlling each full control to switch on-off so that output for first direct current power source voltage positive one times of level, Minus one times level, positive two times of level, minus two times of level, positive three times level, negative three times level, positive four times of level, minus four times of level, Positive five times of level, minus five times of level, positive six times of level, minus six times of level, positive seven times of level, minus seven times of level, just octuple level, Negative octuple level, positive nine times of level, minus nine times of level, positive ten times of level, minus ten times of level or zero level.
- 6. asymmetric more level power translation circuits according to any one of claim 1 to 5, it is characterised in that each full control Switch is N-channel electric power field-effect transistor, wherein, the control terminal, first end and the second end difference of each full control switch For grid, drain electrode and the source electrode of the N-channel electric power field-effect transistor.
- 7. asymmetric more level power translation circuits according to any one of claim 1 to 5, it is characterised in that each full control Switch is P-channel electric power field-effect transistor, wherein, the control terminal, first end and the second end difference of each full control switch For grid, source electrode and the drain electrode of the N-channel electric power field-effect transistor.
- 8. asymmetric more level power translation circuits according to any one of claim 1 to 5, it is characterised in that each full control Switch is insulated gate bipolar transistor, wherein, the control terminal, first end and the second end of each full control switch are respectively institute State grid, the collector and emitter of N-channel electric power field-effect transistor.
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| CN109194170A (en) * | 2018-09-28 | 2019-01-11 | 华东交通大学 | A kind of seven electrical level inverters using switched-capacitor circuit |
| CN111224574A (en) * | 2020-02-13 | 2020-06-02 | 广东工业大学 | Multi-level conversion system |
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| KR20160116254A (en) * | 2015-03-27 | 2016-10-07 | 숭실대학교산학협력단 | Single-sourced H-bridge multi-level inverter |
| CN106972748A (en) * | 2017-04-26 | 2017-07-21 | 广东工业大学 | A kind of many level power translation circuits and system |
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| KR20160116254A (en) * | 2015-03-27 | 2016-10-07 | 숭실대학교산학협력단 | Single-sourced H-bridge multi-level inverter |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109194170A (en) * | 2018-09-28 | 2019-01-11 | 华东交通大学 | A kind of seven electrical level inverters using switched-capacitor circuit |
| CN111224574A (en) * | 2020-02-13 | 2020-06-02 | 广东工业大学 | Multi-level conversion system |
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