CN105226983B - A kind of more level PWM modulator approaches based on mixed carrier - Google Patents
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Abstract
The invention discloses a kind of more level PWM modulator approaches based on mixed carrier.This method is first by reference sinusoidal signal vrefTake absolute value high voltage unit modulated signal vm(abs), and then the modulated signal v of low voltage unit is obtained by comparing with computingm(LVC).The modulated signal of high voltage unit and frequency are f2Triangle carrier signal vtrbCompare to obtain logic pulse signal B, at the same with voltage reference signal vrhCompare to obtain logic pulse signal P.The modulated signal of low voltage unit is respectively f with frequency1Triangle carrier signal vtraAnd vtrcCompare to obtain logic pulse signal A and C.Reference sinusoidal signal compared with no-voltage polarity pulse signal D.Then this four logic pulse signals and polarity pulse signal are produced into a kind of PWM drive signal of optimization through overdriving logical allocation unit.There is no power to pour in down a chimney problem for the method for the present invention, and optimizes the equivalent switching frequency of inverter high-low pressure unit.
Description
Technical field
The invention belongs to Multilevel Inverters PWM technical fields, and in particular to one kind is suitable for the mixing that voltage ratio is 1: 2
More level PWM modulator approaches based on mixed carrier of seven electrical level inverter of cascaded H-bridges.
Background technology
In field of power electronics, especially mesohigh, high-power applications occasion, multi-level converter obtains more and more
Concern and application.Compared with two traditional level converters, multi-level converter is opened in improvement output voltage waveforms quality, reduction
Closing voltage stress of pipe etc. has obvious advantage.The end of the nineties in last century, India scholar M.D.Manjrekar are proposed
Seven electrical level inverter of the Mixed cascading H bridges topology that DC voltage ratio is 1: 2, its structure are as shown in Figure 1.The topology is by traditional
Isobaric Cascade H bridge inverter develops, and can export more level under equal concatenation unit number, reduce switch
The number of device and isolated power supply, thus receive much concern, become mesohigh, the research hotspot in high-power applications field.
The development of hybrid cascade multilevel converter, research and improvement to its modulation strategy propose new requirement.Fig. 1
Shown topological hybrid modulation principle is as shown in Fig. 2, high voltage unit low frequency operation, low voltage unit high-frequency work.This method is closed
The work characteristics of different voltages level switch device is make use of to reason, while exports seven level PWM waveforms for consecutive variations, it is humorous
Wave property is good.However, in the range of certain modulation ratio, low voltage unit has that power pours in down a chimney.In order to solve this problem,
Low voltage unit DC side can replace diode uncontrollable rectifier bridge using controllable rectifier bridge, at this time energy can with two-way flow,
So as to keep the stabilization of its DC voltage.But this method structure and control is more complicated, considerably increase inverter
Volume and cost, constrain the topological practicality.
Therefore, it is necessary to traditional modulator approach is improved, so as to promote development and the reality of hybrid multilevel topology
With change.How in the case where not increasing system cost, the good output characteristics of system not only can guarantee that, but also hybrid modulation can be solved
The intrinsic power of method pours in down a chimney problem, while the switching frequency for reducing high voltage unit as far as possible has important practical significance.
The content of the invention
Goal of the invention
The purpose of the present invention is to propose to it is a kind of suitable for Mixed cascading H bridges seven electrical level inverters based on the more of mixed carrier
Level PWM modulator approach, on the one hand solves the problems, such as that the intrinsic power of conventional hybrid modulation strategy pours in down a chimney, and on the other hand reduces high pressure
The switching frequency of unit, while the equivalent output frequency of low voltage unit is improved, it can be protected in the case where not increasing system cost
The good output characteristics of card system, improves the efficiency and practicality of the multi-electrical level inverter.
Technical solution
Technical scheme is as follows：
(1) this method realize circuit include modulating wave generating unit U1, logical pulse generating unit U2 and driving logic
Allocation unit U3 three parts.Modulating wave generating unit U1 is by reference sinusoidal signal (vref), voltage reference signal (vrh), all-wave it is whole
Current circuit (Abs), a comparator (T1), scaling circuit (K) and summing circuit (J) composition；Logical pulse generating unit
U2 is by four comparator (T2~T5) and triangle carrier signal (vtra, vtrb, vtrc) composition；Logical allocation unit U3 is driven by seven
Dual input and door (Y1~Y7), four dual input OR gate (Z1~Z4) and seven NOT gate (X1~X7) composition.Wherein, triangular carrier is believed
Number vtrbPeak-to-peak value is E, above zero reference line, and between E and 2E, frequency f2, triangle carrier signal vtraWith
Triangle carrier signal vtrcPeak-to-peak value is 2E, and between-E and E, phase differs 180 °, and frequency is f1(f2≤f1)。
(2) in modulating wave generating unit U1：Reference sinusoidal signal vrefThe input terminal of full-wave rectifying circuit Abs is connect, its is defeated
Outlet is the modulated signal v of high voltage unitm(abs)；The modulated signal v of high voltage unitm(abs)Access comparator T1Positive input
End, voltage reference signal vrhAccess comparator T1Inverting input, comparator T1Output terminal be logic pulse signal P；Patrol
Collect the input terminal of pulse signal P access scaling circuits K, the output signal of scaling circuit K and the modulation of high voltage unit
Signal vm(abs)Summing circuit J is accessed at the same time, the modulated signal v of low voltage unit is obtained by difference operationm(LVC)。
(3) in logical pulse generating unit U2：The modulated signal v of high voltage unitm(abs)Access comparator T2Positive it is defeated
Enter end, triangle carrier signal vtrbAccess comparator T2Inverting input；The modulated signal v of low voltage unitm(LVC)It is respectively connected to
Comparator T3And T4Normal phase input end, triangle carrier signal vtrcAccess comparator T3Inverting input, triangle carrier signal
vtraAccess comparator T4Inverting input；Reference sinusoidal signal vrefAccess comparator T5Normal phase input end, comparator T5's
Anti-phase input terminates zero reference potential.
(4) in logical allocation unit U3 is driven：Comparator T5The polarity pulse signal D of output is as switching tube Q21Drive
Dynamic signal, comparator T5Output termination NOT gate X3Output signal afterwards is as switching tube Q22Drive signal；Comparator T2Output
Signal B and polarity pulse signal D connects and door Y3Two input terminals, comparator T2Output terminal through NOT gate X1Afterwards with switching tube Q22
Drive signal connect and door Y5Two input terminals, with door Y3Output terminal and with door Y5Output termination OR gate Z3Two it is defeated
Enter end, OR gate Z3Output signal as switching tube Q24Drive signal, OR gate Z3Output termination NOT gate X5Output signal afterwards
As switching tube Q23Drive signal；Comparator T4Output signal A and comparator T5Output signal D connect and door Y1Two
Input terminal, comparator T4Output terminal through NOT gate X2Afterwards with switching tube Q22Drive signal connect and door Y2Two input terminals, with door
Y1Output terminal and with door Y2Output termination OR gate Z2Two input terminals, OR gate Z2Output signal as switching tube Q11's
Drive signal, OR gate Z2Output termination NOT gate X7Output signal afterwards is as switching tube Q12Drive signal；Comparator T2It is defeated
Outlet is through NOT gate X1Afterwards with comparator T1Output signal P meet OR gate Z1Two input terminals, comparator T3Output signal C and
OR gate Z1Output termination and door Y4Two input terminals, with door Y4Output terminal and comparator T5Output termination and door Y7Two
A input terminal, with door Y4Output terminal through NOT gate X4Afterwards with switching tube Q22Drive signal connect and door Y6Two input terminals, with door
Y7Output terminal and with door Y6Output termination OR gate Z4Two input terminals, OR gate Z4Output signal as switching tube Q14's
Drive signal, OR gate Z4Output termination NOT gate X6Output signal afterwards is as switching tube Q13Drive signal.
Beneficial effect
The method of the present invention can ensure that seven electrical level inverter high and low pressure unit of Mixed cascading H bridges cooperates, and synthesis is high
Seven level output voltage waveforms of frequency modulation.Meanwhile two concatenation unit output voltage polarity it is identical all the time, compare scope in complete modulation
It is interior that there is no power to pour in down a chimney problem.In addition, high voltage unit uses the relatively low carrier wave of frequency in section [E, 2E] and [- E, -2E]
PWM modulation is carried out, reduces switching frequency；Low voltage unit in the section with high voltage unit complementary duty, in rest interval
Multiple-frequency modulation is carried out using the higher carrier wave of frequency, improves the harmonic characterisitic of output voltage.
Brief description of the drawings
Patent of the present invention is described further with reference to the accompanying drawings and examples.
Fig. 1 is seven electrical level inverter main circuit of Mixed cascading H bridges.
Fig. 2 is the hybrid modulation stratgy schematic diagram having pointed out.
Fig. 3 is the modulation principle for more level PWM modulator approach high voltage units based on mixed carrier that the present invention is carried.
Fig. 4 is the modulation principle for more level PWM modulator approach low voltage units based on mixed carrier that the present invention is carried.
Fig. 5 is that more level PWM modulator approach circuits based on mixed carrier that the present invention is carried realize schematic diagram.
Fig. 6 is using after the more level PWM modulator approaches based on mixed carrier of the invention carried, compares M in different modulating
Under output situation, be that Mixed cascading H seven electrical level inverters of bridge are low, high voltage unit output voltage waveforms respectively from top to bottom in figure
And the total output voltage waveforms of inverter after synthesis.,
Fig. 7 is modulation ratio when being 0.9, in output voltage section [+2E ,+3E], the drive signal of low voltage unit switching tube
And low voltage unit output voltage waveforms.
Embodiment
More level PWM tune based on mixed carrier proposed by the present invention suitable for seven electrical level inverter of Mixed cascading H bridges
Method processed, its PWM waveform synthesis mode in each voltage range are as shown in table 1：
Section [+2E ,+3E]：High voltage unit perseverance output level+2E, low voltage unit use frequency as f1Carrier wave carry out times
Frequency modulation system, outputPWM waveform, its equivalent output frequency is 2f1.The inverter finally synthesized exports
PWM waveform, equivalent output frequency is 2f1。
Section [+E ,+2E]：This section uses frequency as f2(f2≤f1) carrier wave be modulated.High voltage unit and low pressure list
First output voltage polarity is identical, and when output voltage complementation, i.e. high voltage unit output level 0, low voltage unit output level+E, and
During high voltage unit output level+2E, low voltage unit output level 0.In this section, the equal output frequency of high and low pressure unit is f2's
PWM waveform, the inverter output finally synthesized arePWM waveform, output frequency f2。
Section [0 ,+E]：High voltage unit perseverance output level 0, low voltage unit uses frequency as f1Carrier wave carry out times frequency modulation
System, outputPWM waveform, its equivalent output frequency is 2f1.The inverter finally synthesized exportsPWM ripples
Shape, equivalent output frequency are 2f1。
Section [0 ,-E]：High voltage unit perseverance output level 0, low voltage unit uses frequency as f1Carrier wave carry out times frequency modulation
System, outputPWM waveform, its equivalent output frequency is 2f1.The inverter finally synthesized exportsPWM ripples
Shape, equivalent output frequency are 2f1。
Section [- E, -2E]：This section uses frequency as f2(f2≤f1) carrier wave be modulated.High voltage unit and low pressure list
First output voltage polarity is identical, and when output voltage complementation, i.e. high voltage unit output level 0, low voltage unit output level-E, and
During high voltage unit output level -2E, low voltage unit output level 0.In this section, the equal output frequency of high and low pressure unit is f2's
PWM waveform, the inverter output finally synthesized arePWM waveform, output frequency f2。
Section [- 2E, -3E]：High voltage unit perseverance output level -2E, low voltage unit use frequency as f1Carrier wave carry out times
Frequency modulation system, outputPWM waveform, its equivalent output frequency is 2f1.The inverter finally synthesized exports's
PWM waveform, equivalent output frequency are 2f1。
1 Mixed cascading of table, seven electrical level inverter output level synthetic method
The modulation that Fig. 3 gives more level PWM modulator approach high voltage units based on mixed carrier that the present invention is carried is former
Reason.The modulated signal v of high voltage unitm(abs)It is by reference sinusoidal signal vrefTake absolute value gained.Triangle carrier signal vtrbPeak peak
It is worth for E, on zero reference line, and between+E and+2E, its frequency is f2.By the modulated signal of high voltage unit
vm(abs)With triangle carrier signal vtrbIt is compared, when modulated signal is more than carrier signal, exports high level, otherwise export zero
Level, so obtains the logic pulse signal B of high voltage unit.With reference sinusoidal signal vrefDirectly pole is relatively obtained with no-voltage
Property pulse signal D.The modulated signal v of high voltage unitm(abs)With voltage reference signal vrhCompare, logical pulse letter can be obtained
Number P, it is in section [θ1, π-θ1] and [π+θ1, 2 π-θ1] in perseverance be high level, perseverance is zero level in rest interval.Wherein, θ1、π-
θ1、π+θ1With 2 π-θ1It is the modulated signal v by high voltage unitm(abs)With voltage reference signal vrhIntersection point determine, Voltage Reference
Signal vrhIt is then a constant voltage 2E.
In modulated signal positive half period, polarity pulse signal D perseverances are high level, switching tube Q21Keep permanent opening state
(Q22Perseverance shut-off).At this time, triangle carrier signal vtrbSwitch tube Q23、Q24The output voltage of place bridge arm is modulated.Work as letter
Number vm(abs)＞ vtrbShi Kaitong switching tubes Q24, otherwise open switching tube Q23.In this way, each switching tube of high voltage unit in positive half period
Drive signal can be expressed as with mathematical logic formula：
Q21=D,Q24=B,
In modulated signal negative half-cycle, polarity pulse signal D perseverances are zero level, switching tube Q22Keep permanent opening state
(Q21Perseverance shut-off).As signal vm(abs)＞ vtrbShi Kaitong switching tubes Q23, otherwise open switching tube Q24.It is in this way, high in negative half-cycle
The drive signal of pressure each switching tube of unit can be expressed as with mathematical logic formula：
Q21=D,Q23=B,
With reference to the driving rule of switching tube in the modulated signal positive and negative half period, it is easy to obtain each switching tube of high voltage unit
Drive signal mathematical logic expression formula unified within a modulation period, i.e.,：
Q21=D,
The modulation that Fig. 4 gives more level PWM modulator approach low voltage units based on mixed carrier that the present invention is put forward is former
Reason.After scaling circuit K, its amplitude is changed logic pulse signal P, in section [θ1, π-θ1] and [π+θ1, 2
π-θ1] in perseverance be level 2E, perseverance is zero level in rest interval.The signal so with the modulated signal v of high voltage unitm(abs)
Make the difference to obtain the modulated signal v of low voltage unitm(LVC).Triangle carrier signal vtraWith triangle carrier signal vtrcPeak-to-peak value is 2E, is situated between
Between-E and E, phase differs 180 °, and frequency is f1(f2≤f1).The modulated signal v of low voltage unitm(LVC)With triangular carrier
Signal vtrbCompare to obtain logic pulse signal BL, the modulated signal v of low voltage unitm(LVC)With triangle carrier signal vtraAnd vtrcRespectively
Compare to obtain logic pulse signal A and C.
In modulated signal positive half period：
Section [+E ,+2E]：Switching tube Q at this time11Perseverance conducting (Q12Perseverance shut-off), pass through controlling switch pipe Q14To produce and height
Press the PWM waveform of unit complementation.As signal vm(LVC)＜ vtrbWhen, low voltage unit output level+E, switching tube Q14Conducting, on the contrary open
Close pipe Q13Conducting.Therefore, the logical drive signal of each switching tube of low voltage unit can be expressed as：
Q11=A,
Section [0 ,+E] ∪ [+2E ,+3E]：Low voltage unit is multiple-frequency modulation in the section, according to the spy of this modulator approach
Point, the drive signal of each switching tube can be expressed as：
Q11=A,Q14=C,
Two formulas are readily available the left bridge arm switching tube Q of low voltage unit more than11And Q12In the drive signal of positive half period：
Q11=A,
And the right bridge arm switching tube Q of low voltage unit13And Q14Drive signal need to combine two parts of signals, ascend the throne
In the signal of section [+E ,+2E]With the signal C positioned at section [0 ,+E] ∪ [+2E ,+3E].And in the method, can by Fig. 4
To find out, signalPerseverance is high level in section [0 ,+E] ∪ [+2E ,+3E], and signal C is permanent for height in section [+E ,+2E]
Level, therefore switching tube Q14Logical drive signal can be by signalCombined with signal C by logic "and" operation：
Similarly, in modulated signal negative half-cycle, the logical drive signal expression of each switching tube of low voltage unit is：
Q12=A,
The signal it can be seen from Fig. 3 and Fig. 4Can be by signalSum to obtain with signal P：
With reference to this formula, the driving rule of low voltage unit switching tube in the modulated signal positive and negative half period is subjected to unified combination,
Each switching tube drive signal of low voltage unit mathematical logic expression formula unified within a modulation period is obtained, i.e.,：
Fig. 5 is that the circuit of above-mentioned more level PWM modulation principles based on mixed carrier realizes schematic diagram, it is sent out by modulating wave
Raw unit U1, logical pulse generating unit U2 and driving logical allocation unit U3 three parts composition.Wherein, modulating wave generating unit
U1 is by reference sinusoidal signal (vref), voltage reference signal (vrh), full-wave rectifying circuit (Abs), a comparator (T1), ratio
Computing circuit (K) and summing circuit (J) composition, its function are to produce the modulated signal v of high voltage unitm(abs), low voltage unit tune
Signal v processedm(LVC)With logic pulse signal P.Logical pulse generating unit U2 is by four comparator (T2~T5) and triangular carrier letter
Number (vtra, vtrb, vtrc) composition.Its function is to produce three by the comparison of modulated signal and carrier signal and no-voltage to patrol
Collect pulse signal A, B, C and a polarity pulse signal D.Logical allocation unit U3 is driven by seven dual inputs and door (Y1~Y7)、
Four dual input OR gate (Z1~Z4) and seven NOT gate (X1~X7) composition, its function is to realize above-mentioned unified mathematical logic expression
The described driving logical laws of formula.Its realization principle is described in detail below：
In modulating wave generating unit U1：Reference sinusoidal signal vrefThe input terminal of full-wave rectifying circuit Abs is connect, it is exported
Hold the modulated signal v for high voltage unitm(abs)；The modulated signal v of high voltage unitm(abs)Access comparator T1Normal phase input end,
Voltage reference signal vrhAccess comparator T1Inverting input, comparator T1Output be logic pulse signal P；Logical pulse
The input terminal of signal P access scaling circuits K, the output signal of scaling circuit K and the modulated signal of high voltage unit
vm(abs)Summing circuit J is accessed at the same time, the modulated signal v of low voltage unit is obtained by difference operationm(LVC)。
In logical pulse generating unit U2：The modulated signal v of high voltage unitm(abs)Access comparator T2Positive input
End, triangle carrier signal vtrbAccess comparator T2Inverting input；The modulated signal v of low voltage unitm(LVC)It is respectively connected to compare
Compared with device T3And T4Normal phase input end, triangle carrier signal vtrcAccess comparator T3Inverting input, triangle carrier signal vtra
Access comparator T4Inverting input；Reference sinusoidal signal vrefAccess comparator T5Normal phase input end, comparator T5It is anti-
Mutually zero reference potential of input termination.
In logical allocation unit U3 is driven：Comparator T5The polarity pulse signal D of output is as switching tube Q21Driving
Signal, comparator T5Output termination NOT gate X3Output signal afterwards is as switching tube Q22Drive signal；Comparator T2Output is patrolled
Pulse signal B and polarity pulse signal D is collected to connect and door Y3Two input terminals, comparator T2Output terminal through NOT gate X1Afterwards and open
Close pipe Q22Drive signal connect and door Y5Two input terminals, with door Y3Output terminal and with door Y5Output termination OR gate Z3's
Two input terminals, OR gate Z3Output signal as switching tube Q24Drive signal, OR gate Z3Output termination NOT gate X5Afterwards defeated
Go out signal as switching tube Q23Drive signal；Comparator T4The logic pulse signal A of output and polarity pulse signal D connects and door
Y1Two input terminals, comparator T4Output terminal through NOT gate X2Afterwards with switching tube Q22Drive signal connect and door Y2Two it is defeated
Enter end, with door Y1Output terminal and with door Y2Output termination OR gate Z2Two input terminals, OR gate Z2Output signal as opening
Close pipe Q11Drive signal, OR gate Z2Output termination NOT gate X7Output signal afterwards is as switching tube Q12Drive signal；Than
Compared with device T2Output terminal through NOT gate X1Afterwards with comparator T1The logic pulse signal P of output meets OR gate Z1Two input terminals, compare
Device T3The logic pulse signal C and OR gate Z of output1Output termination and door Y4Two input terminals, with door Y4Output terminal and ratio
Compared with device T5Output termination and door Y7Two input terminals, with door Y4Output terminal through NOT gate X4Afterwards with switching tube Q22Driving letter
Number connect and door Y6Two input terminals, with door Y7Output terminal and with door Y6Output termination OR gate Z4Two input terminals, OR gate
Z4Output signal as switching tube Q14Drive signal, OR gate Z4Output termination NOT gate X6Output signal afterwards is as switch
Pipe Q13Drive signal.
Fig. 6 is using after the more level PWM modulator approaches based on mixed carrier of the invention carried, compares M in different modulating
Under output situation, be that Mixed cascading H seven electrical level inverters of bridge are low, high voltage unit output voltage waveforms respectively from top to bottom in figure
And the total output voltage waveforms of inverter after synthesis.As can be seen that two units cooperate, high frequency modulated is respectively synthesized
Three level (M=0.3), five level (M=0.6) and seven level (M=0.9) output voltage waveforms, and two unit output voltages
Polarity is identical all the time, thus there is no power to pour in down a chimney problem in the range of complete modulation ratio.
When Fig. 7 is modulation ratio M=0.9, in output voltage section [+2E ,+3E], the driving letter of low voltage unit switching tube
Number and low voltage unit output voltage waveforms.It can be seen from the figure that low voltage unit output voltage equivalent frequency is real for switching tube
Twice of border switching frequency, i.e. low voltage unit realize multiple-frequency modulation.
Claims (1)
- A kind of 1. more level PWM modulator approaches based on mixed carrier, it is characterised in that：This method realizes that circuit includes modulating wave generating unit U1, logical pulse generating unit U2 and driving logical allocation unit U3 three parts, wherein modulating wave generating unit U1 are by reference sinusoidal signal vref, voltage reference signal vrh, full-wave rectifying circuit Abs, a comparator T1, scaling circuit K and summing circuit J composition；Logical pulse generating unit U2 is by four comparator T2 ~T5With triangle carrier signal vtra, triangle carrier signal vtrb, triangle carrier signal vtrcComposition；Drive logical allocation unit U3 By seven dual inputs and door Y1~Y7, four dual input OR gate Z1~Z4With seven NOT gate X1~X7Composition, triangle carrier signal vtrb Peak-to-peak value is E, on zero reference line, and between E and 2E, frequency f2；Triangle carrier signal vtraCarried with triangle Ripple signal vtrcPeak-to-peak value is 2E, and between-E and E, phase differs 180 °, and frequency is f1, wherein, frequency f2It is less than or equal to Frequency f1,Reference sinusoidal signal vrefThe input terminal of full-wave rectifying circuit Abs is connect, the output terminal of full-wave rectifying circuit Abs is high pressure list The modulated signal v of memberm(abs), the modulated signal v of high voltage unitm(abs)Access comparator T1Normal phase input end, Voltage Reference letter Number vrhAccess comparator T1Inverting input, comparator T1Output terminal be logic pulse signal P, logic pulse signal P connects Enter the input terminal of scaling circuit K, the output signal of scaling circuit K and the modulated signal v of high voltage unitm(abs)At the same time Summing circuit J is accessed, the modulated signal v of low voltage unit is obtained by difference operationm(LVC),The modulated signal v of high voltage unitm(abs)Access comparator T2Normal phase input end, triangle carrier signal vtrbAccess comparator T2Inverting input；The modulated signal v of low voltage unitm(LVC)It is respectively connected to comparator T3And T4Normal phase input end, triangle carry Ripple signal vtrcAccess comparator T3Inverting input, triangle carrier signal vtraAccess comparator T4Inverting input；Benchmark Sinusoidal signal vrefAccess comparator T5Normal phase input end, comparator T5Anti-phase input terminate zero reference potential, comparator T5 The polarity pulse signal D of output is as switching tube Q21Drive signal, comparator T5Output termination NOT gate X3Output signal afterwards As switching tube Q22Drive signal；Comparator T2The logic pulse signal B and polarity pulse signal D of output connect and door Y3Two A input terminal, comparator T2Output terminal through NOT gate X1Afterwards with switching tube Q22Drive signal connect and door Y5Two input terminals, with Door Y3Output terminal and with door Y5Output termination OR gate Z3Two input terminals, OR gate Z3Output signal as switching tube Q24 Drive signal, OR gate Z3Output termination NOT gate X5Output signal afterwards is as switching tube Q23Drive signal；Comparator T4It is defeated The logic pulse signal A and polarity pulse signal D gone out connects and door Y1Two input terminals, comparator T4Output terminal through NOT gate X2 Afterwards with switching tube Q22Drive signal connect and door Y2Two input terminals, with door Y1Output terminal and with door Y2Output termination or Door Z2Two input terminals, OR gate Z2Output signal as switching tube Q11Drive signal, OR gate Z2Output termination NOT gate X7 Output signal afterwards is as switching tube Q12Drive signal；Comparator T2Output terminal through NOT gate X1Afterwards with comparator T1Output Logic pulse signal P meets OR gate Z1Two input terminals, comparator T3The logic pulse signal C and OR gate Z of output1Output terminal Connect and door Y4Two input terminals, with door Y4Output terminal and comparator T5Output termination and door Y7Two input terminals, with door Y4Output terminal through NOT gate X4Afterwards with switching tube Q22Drive signal connect and door Y6Two input terminals, with door Y7Output terminal and With door Y6Output termination OR gate Z4Two input terminals, OR gate Z4Output signal as switching tube Q14Drive signal, OR gate Z4Output termination NOT gate X6Output signal afterwards is as switching tube Q13Drive signal.
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| CN106685249B (en) * | 2017-01-03 | 2019-03-12 | 浙江大学 | A kind of zero voltage switch modulator approach of three-phase four-wire system zero voltage switch inverter |
| CN108282104B (en) * | 2017-01-06 | 2020-02-04 | 南京航空航天大学 | Modulation and voltage stabilization control method suitable for single-power-supply binary hybrid cascaded H-bridge multi-level inverter |
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| CN108306538B (en) * | 2017-01-13 | 2020-06-26 | 南京航空航天大学 | Improved carrier phase-shift modulation method suitable for hybrid cascaded H-bridge multi-level inverter |
| CN106862046B (en) * | 2017-02-28 | 2022-03-29 | 重庆西山科技股份有限公司 | Drive signal generation device and method and ultrasonic system |
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