Constant current mode inverse excitation type converter based on primary side feedback
Technical field
Integrated circuit fields are the utility model is related to, are converted more particularly to the constant current mode inverse-excitation type based on primary side feedback
Device.
Background technology
Hand-held personal telecommunication terminal (such as mobile phone) product in recent years, quickly grows.Its related charger market is therewith
Development.Inverse excitation type converter is widely used in this field due to its own cost, performance advantage.And various use primary side
The constant-current controller of feedback, because its peripheral structure is simple, cost is cheap, is widely accepted and applies.
Fig. 1 is a kind of constant current mode inverse-excitation type variator based on primary side feedback of the prior art, including rectifier bridge 101,
∏ mode filters 102, absorbing circuit 103, the transformer being made up of armature winding Np, secondary windings Ns and assists winding Naux
104th, secondary output circuit 105, auxiliary circuit 106, constant-current controller 107 and metal oxide semiconductor field effect tube Q1, it is secondary
Level winding Ns is also associated with commutation diode D6, output capacitance C4, dummy resistance R2, and assists winding Naux is also associated with rectification
Diode D7, output capacitance C5, feedback resistance R3 and R4, metal oxide semiconductor field effect tube Q1 grid and current constant control
The output end connection of device 107, metal oxide semiconductor field effect tube Q1 drain electrode are connected with armature winding Np, metal oxide
Semiconductor field Q1 source electrode is grounded by primary current sampling resistor R119, and constant-current controller 107 includes removing Magnetic testi
Module 108, phase inverter 110, current source 113 and 114, transmitting switch 115 and 116, electric capacity C131, comparator 118, rest-set flip-flop
121st, drive module 123, comparator 128 etc..
The input of degaussing detection module 108 is connected with assists winding Vaux voltage division signal, degaussing detection module 108
Output end connects the input of phase inverter 110 and the control terminal of switch 116, the output end connecting valve 115 of phase inverter 110 respectively
Control terminal, switch one end of 115 one end connecting valve 116, switch 116 other end and be grounded by current source 114, switched
115 other end connects supply voltage by current source 113, switchs 115 one end and is grounded by electric capacity C131, switch 115 one
End is also connected with the in-phase input end of comparator 118, the inverting input of the first reference voltage input comparator 118, comparator 118
Output end connection rest-set flip-flop 121 S ends, the output end of rest-set flip-flop 121 passes through drive module 123 and connects metal oxide
The grid of semiconductor field 118, the same phase of the source electrode connection comparator 128 of metal oxide semiconductor field effect tube 118
Input, the inverting input of comparator 128 input the second reference voltage, the output end connection rest-set flip-flop 121 of comparator 128
R ends.
Constant-current controller 107 needs to extract the degaussing time of the current signal and transformer that flow through armature winding Np
Tdemag, by exporting the conducting and cut-off of modulated signal controlling switch, to stablize output current.In the system shown in figure 1,
The current signal for flowing through armature winding Np is the electric current of metal oxide semiconductor field effect tube Q1 source electrodes outflow, and transformer is gone
Magnetic time Tdemag can be obtained by the node among feedback resistance R3 and R4.
Assuming that secondary windings Ns is I by the commutation diode D6 and output capacitance C4 electric currents exportedout, metal oxide
Semiconductor field Q1 source voltage is Vcs, current sampling resistor R119 resistance value is Rcs, the armature winding Np number of turn
For Npri, the secondary windings Ns number of turn is Nsec, the cycle of the output signal of constant-current controller 107 is T.
When converter is operated in non-continuous mode:
As can be seen that can be by simultaneously constant from formula (1)And Vcs-peakMethod carry out constant output current.
With reference to Fig. 1 and Fig. 2, if metal oxide semiconductor field effect tube Q1 is turned on, current sampling resistor is flowed through
R119 electric current linearly increases.It is assumed that the magnitude of voltage of the second reference voltage is Vref2, metal oxide semiconductor field effect tube Q1
Source voltage enter comparator 128 together with the second reference voltage.When metal oxide semiconductor field effect tube Q1 source electrode
When voltage is more than the second reference voltage, then the output voltage of comparator 128 is high level.
So metal oxide semiconductor field effect tube Q1 source voltage values VcsFor:
Vcs=Vref2 (2)
When metal oxide semiconductor field effect tube Q1 ends, the energy that is stored in transformer 104 is released to defeated
Go out end, demagnetization process starts.In demagnetization process, degaussing detection module 108 is carried out to the signal among feedback resistance R3 and R4
Processing, export degaussing time signal, that is, Tdemag.The output signal controlling transmission of degaussing detection module 108 switch 116, instead
The output signal controlling transmission switch 115 of phase device 110, by current source 113 and 114, discharge and recharge is carried out to electric capacity C131.Assuming that
The magnitude of voltage of first reference voltage is Vref1, electric capacity C131 voltage signal and the first reference voltage signal enter comparator together
118.When electric capacity C131 voltage signal is more than the first reference voltage signal, the output signal of comparator 118 for high level simultaneously
Into rest-set flip-flop 121, the output signal of rest-set flip-flop 121 enters drive module 123, finally produces modulated signal, control gold
Belong to the open-minded of oxide semiconductor field effect pipe Q1.Assuming that the electric current of current source 113 and 114 is I respectively1And I2, now draw:
By formula (1), (2) and (3) simultaneous, with reference to Fig. 1 and Fig. 2, it can be seen that the constant-current controller 107 of primary side feedback is logical
Cross constantAnd Vcs-peakTo realize the course of work of constant output current.
But existing primary side feedback constant current technology, converter can only operate in non-continuous mode, the mode converter is worked as
Power output is more than 20 watt-hours, the problems such as transformer utilization factor is not high, and switching tube current stress is excessive be present.
Therefore, there is an urgent need to a kind of appearance for the technology for being adaptive to continuous and non-continuous mode primary side constant current.
Utility model content
Purpose of utility model:The purpose of this utility model be to provide it is a kind of be adaptive to it is continuous and non-continuous mode based on
The constant current mode inverse excitation type converter of primary side feedback.
Technical scheme:Constant current mode inverse excitation type converter described in the utility model based on primary side feedback, including rectifier bridge,
The direct-flow output signal of rectifier bridge is filtered by wave filter, filter output connection first resistor R11 and the first electric capacity
One end of the parallel circuit of one end of the parallel circuit of C31 compositions, first resistor R11 and the first electric capacity C31 compositions is also connected with just
Level winding Np non-same polarity, first resistor R11 are connected the one or two pole with the other end of the first electric capacity C31 parallel circuits formed
Pipe D51 negative electrode, the first diode D51 anode connect armature winding Np Same Name of Ends and MOS field respectively
Effect pipe Q11 drain electrode, secondary windings Ns Same Name of Ends connect the second diode D61 anode, the second diode D61 negative electrode
One end of the parallel circuit of the second electric capacity C41 and second resistance R21 compositions is connected, the second electric capacity C41 and second resistance R21 is formed
Parallel circuit other end connection secondary windings Ns non-same polarity, assists winding Naux Same Name of Ends connection 3rd resistor
R31 one end, 3rd resistor R31 one end are also connected with the 3rd diode D71 anode, the 3rd diode D71 negative electrode connection
3rd electric capacity C51 one end, the 3rd electric capacity C51 other end ground connection, assists winding Naux non-same polarity are also grounded, the 3rd electricity
The resistance R31 other end is grounded by the 4th resistance R41, armature winding Np, secondary windings Ns and assists winding Naux composition transformations
Device, metal oxide semiconductor field effect tube Q11 source electrode connect the 5th resistance Rcs1 one end, and the 5th resistance Rcs1's is another
End ground connection, in addition to oscillator, the S ends of the output end connection rest-set flip-flop of oscillator, the output end of rest-set flip-flop pass through driving
Module connection metal oxide semiconductor field effect tube Q1 grid, the R ends of rest-set flip-flop connect the output end of the first OR gate, the
The output end of the input connection first comparator of one OR gate, the in-phase input end of first comparator connect the 5th electricity respectively
Rcs1 one end and one end of first switch are hindered, the inverting input of first comparator inputs the first reference voltage, first switch
The other end connect the 4th electric capacity C243 one end, the 4th electric capacity C243 the other end ground connection, the 4th electric capacity C243 one end is also
An input of output current computing module is connected, the output end of output current computing module connects the first operational amplifier
Inverting input, the in-phase input end of the first operational amplifier input the second reference voltage, the output end of the first operational amplifier
The input with sampling time module is opened in connection, is opened and is connected the another of the first OR gate with an output end of sampling time module
One input, the control terminal that first switch is connected with sampling time module another output end is opened, 3rd resistor R31's is another
One end is also connected with the input of degaussing detection module, and the output end of degaussing detection module connects the another of output current computing module
Individual input.
Further, described open includes triangular-wave generator, the output end point of triangular-wave generator with sampling time module
The in-phase input end of the second comparator and the in-phase input end of the 3rd comparator are not connected, and the output end of the second comparator, which is used as, to be opened
Logical and sampling time module a output end, the inverting input of the second comparator connect the 6th resistance R101 one end, the
The inverting input of two comparators also connects as the input opened with sampling time module, the 6th resistance R101 other end
7th resistance R111 one end, the 7th resistance R111 other end ground connection, the 7th resistance R111 one end is also connected with the 3rd and compared
The inverting input of device, the input of the output end connection monostable module of the 3rd comparator, the output end of monostable module are made
To open another output end with sampling time module.
Further, described open includes the 4th comparator with sampling time module, and the in-phase input end of the 4th comparator connects
Connecing the 5th resistance Rcs1 one end, the inverting input of the 4th comparator is as the input opened with sampling time module, and
The output end of four comparators is as the output end opened with sampling time module, the output end connection latch of rest-set flip-flop
Clock end, the data input pin connection latch of latchEnd, latchEnd be also connected with first with one of door it is defeated
Enter end, first with another input of door be also respectively connected with rest-set flip-flop output end and second with an input of door,
The Q ends connection second of latch and another input of door, first is connected the control of second switch with the output end of door respectively
End and the control terminal of the 3rd switch, one end of second switch are grounded by the first current source, and the other end of second switch connects respectively
The inverting input of the 5th comparator and one end of the 4th switch are connect, the inverting input of the 5th comparator also passes through the second electric capacity
C731 is grounded, and the in-phase input end of the 5th comparator inputs the 3rd reference voltage, the output end connection the 3rd of the 5th comparator with
One input of door, the 3rd be connected the output end of first and door with another input of door, the 3rd and door output end company
An input of the second OR gate is connect, the other end of the 4th switch connects supply voltage by the second current source, the 4th switch
Control terminal connection second and the output end of door, second is also connected with the control terminal of the 5th switch with the output end of door, the 5th switch
One end is grounded by the 3rd current source, and the inverting input and the 3rd that the 5th other end switched connects the 6th comparator respectively is opened
One end of pass, the other end of the 3rd switch connect supply voltage by the 4th current source, and the inverting input of the 6th comparator is also
It is grounded by the 3rd electric capacity C732, the in-phase input end of the 6th comparator inputs the 4th reference voltage, the output of the 6th comparator
End connection the 4th and an input of door, the 4th is connected the output end of second and door with another input of door, the 4th and
The output end of door connects another input of the second OR gate, the output end connection the 5th of the second OR gate and an input of door
End, the 5th be connected the output end of rest-set flip-flop with another input of door, the 5th opened with the output end of door as conduct and
Another output end of sampling time module.
Further, the output current computing module includes the second operational amplifier, the second operational amplifier it is same mutually defeated
Enter an input of the end as output current computing module, the inverting input of the second operational amplifier connects the second computing and put
The output end of big device, the output end of the second operational amplifier are also connected with one end of the 6th switch, the other end difference of the 6th switch
The 8th resistance R305 one end and one end of the 7th switch are connected, the 8th resistance R305 other end is connect by the 9th electric capacity C306
Ground, the output end of the 8th resistance R305 other end also as output current computing module, the control terminal connection of the 6th switch are anti-
The input of phase device, the control terminal of the switch of output end connection the 7th of phase inverter, the input of phase inverter are also used as output current
Another input of computing module.
Beneficial effect:, can not only the utility model discloses a kind of constant current mode inverse excitation type converter based on primary side feedback
It is operated in non-continuous mode, moreover it is possible to be operated in continuous mode.In addition, transformer utilization factor is high in the utility model, compared to only
It can be operated in for the variator of non-continuous mode, power can do more.
Brief description of the drawings
Fig. 1 is the circuit diagram of the constant current mode inverse excitation type converter of primary side feedback of the prior art;
Fig. 2 is simplified timing diagram when constant current mode inverse excitation type converter works in Fig. 1;
Fig. 3 is the circuit diagram of the constant current mode inverse excitation type converter in the utility model embodiment;
Fig. 4 is that the circuit with one embodiment of sampling time module is opened in the utility model embodiment
Figure;
Fig. 5 be open with sampling time module use one embodiment circuit when constant current mode inverse excitation type converter non-
Continuous and continuous mode output current formula;
Fig. 6 be open with sampling time module use one embodiment circuit when constant current mode inverse excitation type converter non-
Simplified timing diagram during continuous mode;
Fig. 7 is to open constant current mode inverse excitation type converter when using the circuit of one embodiment with sampling time module connecting
Simplified timing diagram during Discontinuous Conduction mode;
Fig. 8 is the circuit diagram of the output current computing module in the utility model embodiment;
Fig. 9 is that the circuit with second embodiment of sampling time module is opened in the utility model embodiment
Figure;
Figure 10 be open with sampling time module using second embodiment circuit when constant current mode inverse excitation type converter exist
Simplified timing diagram during non-continuous mode;
Figure 11 be open with sampling time module using second embodiment circuit when constant current mode inverse excitation type converter exist
Simplified timing diagram during continuous mode.
Embodiment
With reference to the accompanying drawings and detailed description, the technical solution of the utility model is further introduced.
Present embodiment discloses a kind of constant current mode inverse excitation type converter based on primary side feedback, as shown in figure 3, bag
Rectifier bridge 201 is included, rectifier bridge 201 includes the 4th diode D11, the 5th diode D21, the 6th diode D31 and the seven or two pole
Pipe D41, the 4th diode D11 anode connect the 6th diode D31 negative electrode, the 4th diode D11 negative electrode connection the 5th
Diode D21 negative electrode, the 5th diode D21 anode connect the 7th diode D41 negative electrode, the 7th diode D41 sun
Pole connects the 6th diode D31 anode.The direct-flow output signal of rectifier bridge 201 is filtered by wave filter 202.Wave filter
202 include inductance L11, and inductance L11 one end connects the 7th electric capacity C11 one end and the 5th diode D21 negative electrode, inductance respectively
The L11 other end connects the 8th electric capacity C21 one end and first resistor R11 one end respectively, the 8th electric capacity C21 other end and
The 7th electric capacity C11 other end is grounded.First resistor R11 one end is also connected with the first electric capacity C31 one end, first resistor
The R11 other end connects the first electric capacity C31 other end.First electric capacity C31 one end is also connected with the non-of the same name of armature winding Np
End, the first electric capacity C31 other end are also connected with the first diode D51 negative electrode, and the first diode D51 anode connects just respectively
The drain electrode of level winding Np Same Name of Ends and metal oxide semiconductor field effect tube Q11, secondary windings Ns Same Name of Ends connection the
Two diode D61 anode, the second diode D61 negative electrode connect the electricity in parallel that the second electric capacity C41 forms with second resistance R21
The one end on road, the second electric capacity C41 are connected the non-of the same name of secondary windings Ns with the other end of the second resistance R21 parallel circuits formed
End, assists winding Naux Same Name of Ends connection 3rd resistor R31 one end, 3rd resistor R31 one end is also connected with the three or two pole
Pipe D71 anode, the 3rd diode D71 negative electrode connect the 3rd electric capacity C51 one end, and the 3rd electric capacity C51 other end is grounded,
Assists winding Naux non-same polarity is also grounded, and the 3rd resistor R31 other end is grounded by the 4th resistance R41, armature winding
Np, secondary windings Ns and assists winding Naux composition transformers 204, metal oxide semiconductor field effect tube Q11 source electrode connect
Connect the 5th resistance Rcs1 one end 224, the 5th resistance Rcs1 other end ground connection.Wherein, first resistor R11, the first electric capacity C31
Absorbing circuit 203 is collectively constituted with the first diode D51.Second diode D61, the second electric capacity C41 and second resistance R21 are common
Form secondary output circuit 205.3rd diode D71, the 3rd electric capacity C51,3rd resistor R31 and common group of the 4th resistance R41
Into auxiliary circuit 206.Constant current mode inverse excitation type converter also includes constant-current controller 2071, and constant-current controller 2071 includes oscillator
212, the S ends of the output end connection rest-set flip-flop 214 of oscillator 212, the output end 215 of rest-set flip-flop 214 passes through drive module
217 connection metal oxide semiconductor field effect tube Q1 grid, the R ends of rest-set flip-flop 214 connect the output of the first OR gate 220
End, the output end of the input connection first comparator 223 of the first OR gate 220, the in-phase input end of first comparator 223
The 5th resistance Rcs1 one end 224 and one end of first switch 236 are connected respectively, and the inverting input of first comparator 223 is defeated
Enter the first reference voltage, the other end of first switch 236 connects the 4th electric capacity C243 one end, the 4th electric capacity C243 other end
Ground connection, the 4th electric capacity C243 one end are also connected with an input 237 of output current computing module 225, and output current calculates
The output end 226 of module 225 connects the inverting input of the first operational amplifier 227, the first operational amplifier 227 it is same mutually defeated
Enter the second reference voltage of end input, the input with sampling time module 407 is opened in the output end connection of the first operational amplifier 227
End 228, another input that the first OR gate 220 is connected with an output end 221 of sampling time module 407 is opened, it is open-minded
With the control terminal of another output end 235 connection first switch 236 of sampling time module 407, the 3rd resistor R31 other end is also
The input of degaussing detection module 210 is connected, the output end connection output current computing module 225 of degaussing detection module 210
Another input 211.
Open with one embodiment of sampling time module 407 as shown in figure 4, including triangular-wave generator 230, triangle
The output end of wave producer 230 connects the in-phase input end of the second comparator 242 and the homophase input of the 3rd comparator 240 respectively
End, the output end of the second comparator 242 is as the output end 221 opened with sampling time module 407, the second comparator
242 inverting input connects the 6th resistance R101 one end, and the inverting input of the second comparator 242, which is also used as, to be opened and adopt
The input 228 of sample time module 407, the 6th resistance R101 other end connect the 7th resistance R111 one end, the 7th resistance
R111 other end ground connection, the 7th resistance R111 one end is also connected with the inverting input of the 3rd comparator 240, the 3rd comparator
The input of 240 output end connection monostable module 234, the output end conduct of monostable module 234 is opened and the sampling time
Another output end 235 of module 407.6th resistance R101 and the 7th resistance R111 resistance is equal.
Second embodiment with sampling time module 407 is opened as shown in figure 9, including the 4th comparator 781, the 4th ratio
In-phase input end compared with device 781 connects the 5th resistance Rcs1 one end 224, and the inverting input of the 4th comparator 781, which is used as, to be opened
Logical and sampling time module 407 input 228, the output end of the 4th comparator 781, which is used as, to be opened and sampling time module 407
An output end 221, the output end 215 of rest-set flip-flop 214 connects the clock end of latch 701, and the data of latch 701 are defeated
Enter end connection latch 701End, latch 701End is also connected with first and an input of door 704, and first and door
704 another input is also respectively connected with the output end 215 and second of rest-set flip-flop 214 and an input of door 703, lock
The Q ends connection second of storage 701 and another input of door 703, first is connected second switch respectively with the output end of door 704
The control terminal of 722 control terminal and the 3rd switch 723, one end of second switch 722 are grounded by the first current source 711, and second
The other end of switch 722 connects the inverting input of the 5th comparator 741 and one end of the 4th switch 721 respectively, and the 5th compares
The inverting input of device 741 is also grounded by the second electric capacity C731, and the in-phase input end of the 5th comparator 741 inputs the 3rd benchmark
Voltage, output end connection the 3rd and the input of door 751 of the 5th comparator 741, the 3rd with another input of door 751
End connection first and the output end of door 704, the 3rd is connected an input of the second OR gate 761 with the output end of door 751, and the 4th
The other end of switch 721 connects supply voltage, the control terminal connection second of the 4th switch 721 and door by the second current source 710
703 output end, second is also connected with the control terminal of the 5th switch 714 with the output end of door 703, and one end of the 5th switch 714 leads to
Cross the 3rd current source 724 to be grounded, the other end of the 5th switch 714 connects the inverting input and the of the 6th comparator 742 respectively
One end of three switches 723, the other end of the 3rd switch 723 connect supply voltage, the 6th comparator by the 4th current source 713
742 inverting input is also grounded by the 3rd electric capacity C732, and the in-phase input end of the 6th comparator 742 inputs the 4th benchmark electricity
Pressure, output end connection the 4th and the input of door 752 of the 6th comparator 742, the 4th with another input of door 752
Connection second and the output end of door 703, the 4th is connected another input of the second OR gate 761 with the output end of door 752, and second
The output end connection the 5th of OR gate 761 and an input of door 771, the 5th is connected RS with another input of door 771 touches
Send out the output end 215 of device 214, the 5th with the output end of door 771 as open with sampling time module 407 another is defeated
Go out end 235.
Wherein, output current computing module 225 is as shown in figure 8, including the second operational amplifier 301, the second operation amplifier
An input of the in-phase input end of device 301 as output current computing module 225, the second operational amplifier 301 it is anti-phase
Input connects the output end of the second operational amplifier 301, and the output end of the second operational amplifier 301 is also connected with the 6th switch
302 one end, the other end of the 6th switch 302 connect the 8th resistance R305 one end and one end of the 7th switch 303 respectively, the
The eight resistance R305 other end is grounded by the 9th electric capacity C306, and the 8th resistance R305 other end also calculates as output current
The output end of module 225, the input of the control terminal connection phase inverter 304 of the 6th switch 302, the output end of phase inverter 304 connect
Connect the control terminal of the 7th switch 303, another also as output current computing module 225 of the input of phase inverter 304 inputs
End.
When opening the circuit with the use first embodiment of sampling time module 407, constant current mode inverse excitation type converter is operated in
Output current formula and simplified timing diagram difference during non-continuous mode are as shown in Figure 5 and Figure 6.Signal caused by oscillator 212
So that the output voltage of rest-set flip-flop 214 is changed into high level from low level, the output signal of drive module 217 is high level, that
Metal oxide semiconductor field effect tube Q11 enters conducting state, and armature winding Np electric current is by zero linear increase, the 5th electricity
Voltage on resistance Rcs1 also linearly increases.When second reference voltage is equal with the output voltage of the first operational amplifier 227, second
The output voltage of comparator 242 begins to overturn so that the output voltage of rest-set flip-flop 214 is changed into low level from high level, drives
The output signal of dynamic model block 217 is low level, then metal oxide semiconductor field effect tube Q11 enters cut-off state.In gold
Belong in oxide semiconductor field effect pipe Q11 turn on process, when the output voltage of the first operational amplifier 227 passes through the 6th resistance
After R101 and the 7th resistance R111 partial pressure, because the 6th resistance R101 and the 7th resistance R111 resistance is equal, the 6th resistance
The magnitude of voltage of R101 and the 7th resistance R111 intermediate node is equal to the half of the output voltage values of the first operational amplifier 227.
So when the second reference voltage is equal with the magnitude of voltage of the 6th resistance R101 and the 7th resistance R111 intermediate node, the 3rd compares
The output signal of device 240 is begun turning, and from the inference of the proportional theorem of parallel lines separated time section, flip-flop transition is exactly that RS is touched
Send out the half of the high level time of the output voltage of device 214.
In Fig. 5, if the high level time of the output voltage of rest-set flip-flop 214 is Ton, then the 3rd comparator 240 exports
Voltage is by the low time uprisedIf the peak value of the 5th resistance Rcs1 voltage is Vcs-peak, then the 4th electric capacity
C243 voltage is
In output current computing module 225, the 8th resistance R305 resistance is R0, output current computing module 225 it is defeated
Go out voltage V0, because the 9th electric capacity C306, in a cycle, the electric charge of charging and discharging is equal, combined circuit connection, can obtain
Go out:
So,
V0Equal to the second reference voltage, it is assumed that be Vref, then:
Output current formula is during non-continuous mode:
Formula (3) and (4) simultaneous can obtain:
It can be seen that constant output current.
When opening the circuit with the use first embodiment of sampling time module 407, constant current mode inverse excitation type converter is operated in
Output current formula and simplified timing diagram difference during continuous mode are as shown in figure 5 and figure 7.The output voltage production of oscillator 212
Raw signal causes the output voltage of rest-set flip-flop 214 to be changed into high level from low level, and the output signal of drive module 217 is height
Level, then metal oxide semiconductor field effect tube Q11 enters conducting state, and armature winding Np electric current is not zero simultaneously linearly
Increase, the voltage on the 5th resistance Rcs1 also linearly increases.Assuming that the initial value of the voltage on the 5th resistance Rcs1 is Vcs-min,
When second reference voltage is equal with the output voltage of the first operational amplifier 227, the output voltage of the second comparator 242 is begun to
Upset so that the output voltage of rest-set flip-flop 214 is changed into low level from high level, and the output signal of drive module 217 is low electricity
It is flat, then metal oxide semiconductor field effect tube Q11 enters cut-off state.In metal oxide semiconductor field effect tube Q11
In turn on process, when the output voltage of the first operational amplifier 227 passes through the 6th resistance R101 and the 7th resistance R111 partial pressure
Afterwards, because the 6th resistance R101 and the 7th resistance R111 resistance is equal, the 6th resistance R101 and the 7th resistance R111 segmentum intercalaris
The magnitude of voltage of point is equal to the half of the output voltage values of the first operational amplifier 227.So when the second reference voltage and the 6th
When the magnitude of voltage of resistance R101 and the 7th resistance R111 intermediate node is equal, the output signal of the 3rd comparator 240 is begun turning,
From the inference of the proportional theorem of parallel lines separated time section, flip-flop transition is exactly the height electricity of the output voltage of rest-set flip-flop 214
Half between usually.
In Fig. 5, if the high level time of the output voltage of rest-set flip-flop 214 is Ton, then the 3rd comparator 240 exports
Voltage is by the low time uprisedIf the peak value of the 5th resistance Rcs1 voltage is Vcs-peak, then the 4th electric capacity
C243 voltage is
The input voltage of another input 211 of output current computing module 225 is Tdemag, cycle T, is similarly obtained
Go out:
The voltage of the output end 226 of output current computing module 225 is:
The voltage of the output end 226 of output current computing module 225 is equal to the second reference voltage V ref, namely:
Output current formula is during continuous mode:
Formula (8) and (9) simultaneous can be obtained:
It can be seen that constant output current.