CN107765997B

CN107765997B - Method for scrambling write data of solid state disk

Info

Publication number: CN107765997B
Application number: CN201710913796.3A
Authority: CN
Inventors: 伦建坤; 郭超
Original assignee: Ramaxel Technology Shenzhen Co Ltd
Current assignee: Ramaxel Technology Shenzhen Co Ltd
Priority date: 2017-09-30
Filing date: 2017-09-30
Publication date: 2020-09-01
Anticipated expiration: 2037-09-30
Also published as: CN107765997A

Abstract

The invention discloses a method for scrambling write-in data of a solid state disk, which is characterized in that matched scrambling code seeds are obtained according to information of Page address Page Addr, Page internal code word address Necc Addr, erasing times PE cycle of a write-in block and scrambling code seed table offset Remap Ofst of the write-in data, a scrambler calculates to obtain scrambling codes of the write-in data according to the obtained scrambling code seeds, and the scrambling of the write-in data is realized according to the obtained scrambling codes. The invention greatly improves the randomness of the data by correlating the scrambling with the page address of the data to be written, the code word address in the page and the erasing times of the writing block, thereby ensuring that the data in the page has no correlation, the data between pages in the block has no correlation and the data of the same memory unit in the block has no correlation in different erasing times.

Description

Method for scrambling write data of solid state disk

Technical Field

The invention relates to a solid state disk control technology, in particular to a method for scrambling write-in data of a solid state disk.

Background

The flash memory stores data by applying voltage to the control gate, is sensitive to certain written data patterns, and is easy to cause unbalance of internal electric quantity of the flash memory due to continuous input of all 1 s or all 0 s, so that signal anti-interference performance is reduced, and the reliability of the data in the flash memory is poor. Therefore, the NAND flash Controller is required to add scrambling codes to the data written by the user, so that the

data

0 and 1 finally written into the flash memory are basically balanced, and the probability of bit flipping of the data is reduced. With the progress of semiconductor technology and the increase of the capacity of a single storage unit of the flash memory, the influence of the randomness of data written into the flash memory on the service life of the flash memory is more obvious, so that the randomness of the data must be ensured.

The randomness requirement of the flash memory particles on the written data is mainly embodied in three aspects, namely, the data in a page has no correlation; 2: data between pages in a block has no correlation; 3: the same memory location in the block has no data dependency under different PE cycles. FIG. 1 is a schematic diagram of data within a page without dependency requirements; FIG. 2 is a schematic diagram of intra-block inter-page data no dependency requirements; FIG. 3 is a schematic diagram of the same memory location within a block with no dependency requirements for data in different PE cycles; each circle represents an access unit, and there is no correlation between data in the filled circles in each figure. Therefore, the added scrambling codes are required to simultaneously realize no correlation in the three aspects so as to ensure the randomness of the data.

Disclosure of Invention

In view of the above drawbacks, the present invention aims to improve and ensure the randomness of scrambled data.

The invention provides a method for scrambling write data in a solid state disk, which is characterized in that matched scrambling code seeds are obtained according to information of Page address Page Addr, Page internal code word address Necc Addr, erasing times PE cycle of a write block and scrambling code seed table offset Remap Ofst of the write data, a scrambler calculates and obtains scrambling codes of the write data according to the obtained scrambling code seeds, and scrambling of the write data is realized according to the obtained scrambling codes.

The method for scrambling the write-in data of the solid state disk is characterized in that the scrambling code seed table offset Remap Ofst is obtained according to the following method: remap Ofst is floor (Page Addr/1).

The method for scrambling the write data of the solid state disk is characterized in that scrambling seeds corresponding to the write data are obtained by inquiring a scrambling seed table through a scrambling seed index number index, and the scrambling seed index is obtained through the following method: index mod (Page Addr × 4+ Necc Addr + Remap Ofst + PE cycle, 32).

The method for scrambling the write data of the solid state disk is characterized by comprising the following steps of:

step 1: acquiring a page address PageAddr, a page internal code word address Necc Addr and an erasing frequency PE cycle of a writing block of the written data according to the address information to be actually written of the current written data;

step 2: calculating to obtain scrambling code seed table offset RemapOfst according to RemapOfst which is floor (Page Addr/1);

and step 3: calculating to obtain a scrambling code seed Index according to Index (Page Addr multiplied by 4+ Necc Addr + Remap Ofst + PE cycle,32) mod;

and 4, step 4: inquiring a scrambling code seed table to obtain scrambling code seeds according to the obtained scrambling code seed index;

and 5: the scrambler scrambles the input write data according to the obtained scrambling code seeds.

The method for scrambling the write data of the solid state disk is characterized in that the Page Addr, the Page internal code word address Necc Addr and the erasing times PE cycle of the write block in the step 1 are obtained by software according to the address information of the write data, and the steps 2 to 5 are all automatically executed by hardware.

The invention greatly improves the randomness of the data by correlating the scrambling with the page address of the data to be written, the code word address in the page and the erasing times of the writing block, thereby ensuring that the data in the page has no correlation, the data between pages in the block has no correlation and the data of the same memory unit in the block has no correlation in different erasing times.

Drawings

FIG. 1 is a schematic diagram of data within a page without dependency requirements;

FIG. 2 is a schematic diagram of intra-block inter-page data no dependency requirements;

FIG. 3 is a schematic diagram of the same memory location within a block with no dependency requirements for data in different PE cycles;

FIG. 4 is a block diagram of a hardware Seed scrambling implementation method;

fig. 5 is a diagram illustrating the effect of hardware Seed scrambling.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In many data transmissions, the sequence of 0-1 is considered to be an unstable signal and needs to be avoided as much as possible, so scrambling is widely used in this situation. The randomness requirement of the flash memory particles on the written data is mainly embodied in three aspects, namely, the data in a page has no correlation; 2: data between pages in a block has no correlation; 3: the same memory location in the block has no data dependency under different PE cycles.

FIG. 4 is a block diagram of a hardware Seed scrambling implementation method; wherein Page Addr represents the Page address, Necc Addr represents the code word address in the Page, PE cycle represents the erasing times of the block, and Remap Ofst represents the initial offset of the Seed Table. The selected Scrb seed is guaranteed to be different in a certain period by operating according to a set rule through Page Addr, Necc Addr, PE cycle and Remap Ofst.

First, taking 4 codewords in each page, every 1 page, adding 1 to Remap _ offset, and 32 seeds in the Seed Table as an example, the detailed steps of the Hard Seed scrambling scheme are given:

and 5: the scrambler scrambles the input write-in data according to the obtained scrambling code seeds, and the data are not correlated under different PE cycles by the same storage unit in the block due to the fact that the scrambling code seeds are obtained through calculation and are correlated with the PE cycles of erasing times.

The scrambling code seeds are obtained by calculation and are associated with Page addresses Page Addr and Remap Ofst, so that no correlation of data among pages in a block is ensured; the Necc Addr and Seed ensure that the data within the page has no dependencies.

FIG. 5 is a schematic diagram illustrating the effect of hardware Seed scrambling, where the PE cycles ensure that data has no correlation in the same memory location in the block under different PE cycles, i.e. as shown in FIG. 3; page Addr and Remap Ofst ensure that data between pages in a block have no correlation, namely shown in FIG. 2; the Necc Addr and Seed ensure that the data in the page has no dependency, as shown in fig. 1.

The decoding process is the same as the scrambling process, ensuring that the data can be correctly recovered.

While the invention has been described with reference to a particular embodiment, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. A method for scrambling write data in a solid state disk is characterized in that matched scrambling code seeds are obtained according to information of a Page address Page Addr, a Page internal code word address Necc Addr, erasing times PE cycle of a write block and offset Remap Ofst of a scrambling code seed table of the write data, specifically, the scrambling code seeds are obtained by inquiring the scrambling code seed table through a scrambling code index, and the scrambling code seed index is obtained through the following method:

index mod (Page Addr × 4+ Necc Addr + Remap Ofst + PE cycle, 32); the scrambler calculates the scrambling code of the write-in data according to the obtained scrambling code seeds, and the scrambling of the write-in data is realized according to the obtained scrambling code.

2. The method for scrambling write data in a solid state disk according to claim 1, wherein the scrambling code seed table offset Remap off is obtained as follows: remap Ofst is floor (Page Addr/1).

3. The method for scrambling write data in a solid state disk according to claim 2, wherein the scrambling of the current write data is implemented according to the following steps:

step 1: acquiring a Page address Page Addr, an in-Page code word address Necc Addr and an erasing frequency PE cycle of a writing block of the written data according to the address information to be actually written of the current written data;

step 2: calculating to obtain scrambling code seed table offset Remap Ofst according to Remap Ofst which is floor (Page Addr/1);

4. The method for scrambling write data in a solid state disk according to claim 3, wherein the Page Addr, the intra-Page codeword address Necc Addr and the erasing times PE cycle of the write block in step 1 are obtained by software according to the address information of the write data, and steps 2 to 5 are all automatically executed by hardware.