CN107727243B - Uncooled infrared focal plane array readout circuit - Google Patents
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- 230000010354 integration Effects 0.000 claims abstract description 14
- 238000001514 detection method Methods 0.000 claims abstract description 12
- 230000005669 field effect Effects 0.000 claims description 75
- 239000003990 capacitor Substances 0.000 claims description 9
- 239000000758 substrate Substances 0.000 abstract description 17
- 230000004044 response Effects 0.000 abstract description 11
- 230000008859 change Effects 0.000 abstract description 8
- 230000004888 barrier function Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 6
- 238000003331 infrared imaging Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- 230000003287 optical effect Effects 0.000 description 4
- 230000005855 radiation Effects 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 230000035945 sensitivity Effects 0.000 description 3
- 230000000712 assembly Effects 0.000 description 2
- 238000000429 assembly Methods 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 238000012937 correction Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- XHCLAFWTIXFWPH-UHFFFAOYSA-N [O-2].[O-2].[O-2].[O-2].[O-2].[V+5].[V+5] Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[V+5].[V+5] XHCLAFWTIXFWPH-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 239000003814 drug Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000005459 micromachining Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
- 229910001935 vanadium oxide Inorganic materials 0.000 description 1
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/02—Constructional details
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/10—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
- G01J5/20—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors using resistors, thermistors or semiconductors sensitive to radiation, e.g. photoconductive devices
- G01J5/22—Electrical features thereof
- G01J5/24—Use of specially adapted circuits, e.g. bridge circuits
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J2005/0077—Imaging
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/10—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
- G01J5/20—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors using resistors, thermistors or semiconductors sensitive to radiation, e.g. photoconductive devices
- G01J2005/202—Arrays
Abstract
The invention provides an uncooled infrared focal plane array reading circuit, which comprises: a bias circuit capable of generating a bias current; a bias voltage generating circuit connected to an output of the bias circuit, capable of converting the bias current into a bias voltage; and the detection and integration circuit is connected to the output of the bias circuit and the output of the bias generation circuit, can generate two paths of almost same currents, integrates the difference of the two generated currents and outputs the integrated current as voltage. The reading circuit can offset the voltage output and the response rate change of the detector caused by the temperature fluctuation of the substrate, and meets the requirements of applications without TEC and barrier.
Description
Technical Field
The invention relates to an infrared imaging technology, in particular to an uncooled infrared focal plane array reading circuit in the infrared imaging technology.
background
At present, the uncooled infrared imaging technology has important application in the fields of military, industry and agriculture, medicine, astronomy and the like. The infrared focal plane array as the core of the uncooled infrared imaging technology comprises an infrared detector array and a reading circuit. The microbolometer Focal Plane Array (FPA) has high sensitivity, is an uncooled infrared focal plane array which is most widely applied, and has the working principle that the temperature changes after a thermosensitive material absorbs incident infrared radiation, so that the resistance value of the thermosensitive material changes, and the size of an infrared radiation signal is detected by measuring the change of the resistance value.
Microbolometers generally adopt a cantilever beam microbridge structure manufactured by a micromachining technology. The bridge deck is deposited with a layer of thermosensitive material with high Temperature Coefficient of Resistance (TCR), and is supported by two legs with good mechanical properties and plated with conductive material, the contact points of the legs and the substrate are piers, which are electrically connected to a silicon readout circuit (ROIC) under a microbolometer. The thermally sensitive material is connected to the electrical path of the read-out circuit via bridge legs and piers, forming a pixel cell which is temperature sensitive and connected to the read-out circuit.
The sensitive pixel unit is also called as a sensitive microbolometer, and two blind microbolometers are correspondingly arranged on the sensitive pixel unit, wherein one bridge deck is thermally short-circuited with the substrate, and the temperature is constantly equal to the temperature of the substrate, so that the sensitive pixel unit is called as a thermal short-circuit microbolometer; the other is a shielded microbolometer, which is identical in structure to the sensitive microbolometer but is shielded so that it cannot sense the target radiation, and is called a shielded microbolometer. The two blind micro bolometers can effectively counteract the output voltage fluctuation caused by the resistance value of the sensitive pixel unit along with the temperature change of the substrate, and realize the function without TEC (thermoelectric cooler).
The read-out circuit is used for processing and reading out the signals of the microbolometer, and has important influence on the performance of the infrared imaging system. In recent years, users have higher and higher requirements on infrared focal plane array detector assemblies, and the infrared focal plane array detector assemblies not only have high requirements on performance, but also have low power consumption, simplicity and easiness in use. The traditional infrared focal plane array detector assembly needs to strictly control the substrate temperature by using a TEC (thermoelectric cooler), so that the performance of the detector is not influenced by the temperature fluctuation of the substrate. Meanwhile, blocking piece correction is needed at intervals to ensure the image quality. But the separation blade can increase consumption and noise on the one hand, reduces the disguise, and on the other hand, the unable target of observing in the separation blade calibration process has brought the inconvenience for the user.
The new generation of infrared focal plane array detector assembly does not use TEC for temperature control, and does not need baffle plate correction, which is realized mainly by the special design of a reading circuit. The sensing circuit needs to try to counteract the sensitivity of the detector voltage output and responsivity to substrate temperature, ensuring that the voltage output and responsivity fluctuate relatively little and are substantially linear over the operating range. Therefore, a user can compensate the fluctuation of voltage output and response rate when designing the movement, and TEC-free and blocking piece-free operation is realized.
Disclosure of Invention
The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. It should be understood that this summary is not an exhaustive overview of the invention. It is not intended to determine the key or critical elements of the present invention, nor is it intended to limit the scope of the present invention. Its sole purpose is to present some concepts in a simplified form as a prelude to the more detailed description that is discussed later.
One of the technical problems to be solved by the invention is to provide an uncooled infrared focal plane reading circuit which can offset the voltage output and the response rate change of a detector caused by the temperature fluctuation of a substrate and meet the requirements of TEC-free and barrier-free application.
one aspect of the present invention provides an uncooled infrared focal plane array readout circuit, including: a bias circuit capable of generating a bias current; a bias voltage generating circuit connected to an output of the bias circuit, capable of converting the bias current into a bias voltage; and the detection and integration circuit is connected to the output of the bias circuit and the output of the bias generation circuit, can generate two paths of almost same currents, integrates the difference of the two generated currents and outputs the integrated current as voltage.
According to the above aspects of the invention, the uncooled infrared focal plane array reading circuit provided by the invention can offset the detector voltage output and response rate change caused by substrate temperature fluctuation by realizing good matching, and can meet the requirements of applications without TEC and barrier.
These and other advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments of the present invention, taken in conjunction with the accompanying drawings.
Drawings
To further clarify the above and other advantages and features of the present invention, a more particular description of embodiments of the invention will be rendered by reference to the appended drawings. Which are incorporated in and form a part of this specification, along with the detailed description that follows. Elements having the same function and structure are denoted by the same reference numerals. It is appreciated that these drawings depict only typical examples of the invention and are therefore not to be considered limiting of its scope. In the drawings:
FIG. 1 is a schematic diagram of an uncooled infrared focal plane array readout circuit according to a first embodiment of the present invention;
FIG. 2 is a schematic diagram of an uncooled infrared focal plane array readout circuit according to a second embodiment of the invention;
Fig. 3 is a schematic diagram of an uncooled infrared focal plane array readout circuit according to a third embodiment of the present invention.
Detailed Description
Exemplary embodiments of the present invention will be described hereinafter with reference to the accompanying drawings. In the interest of clarity and conciseness, not all features of an actual implementation are described in the specification. It will of course be appreciated that in the development of any such actual embodiment, numerous implementation-specific decisions must be made to achieve the developers' specific goals, such as compliance with system-related and business-related constraints, which will vary from one implementation to another. Moreover, it will be appreciated that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking for those of ordinary skill in the art having the benefit of this disclosure. It should be noted that, in order to avoid obscuring the present invention with unnecessary details, only the device structures and/or processing steps closely related to the scheme according to the present invention are shown in the drawings, and other details not so relevant to the present invention are omitted.
One aspect of the present invention provides an uncooled infrared focal plane array readout circuit, including: a bias circuit capable of generating a bias current; a bias voltage generating circuit connected to an output of the bias circuit, capable of converting the bias current into a bias voltage; and the detection and integration circuit is connected to the output of the bias circuit and the output of the bias generation circuit, can generate two paths of almost same currents, integrates the difference of the two generated currents and outputs the integrated current as voltage.
As described in the background section, the infrared focal plane array, which is the core of uncooled infrared imaging technology, includes two parts, an infrared detector array and a readout circuit. In order to counteract the sensitivity of the voltage output and the response rate of the detector to the temperature of the substrate and ensure that the voltage output and the response rate have small and basically linear fluctuation in a working range, the readout circuit generates the bias current of the detector through the bias circuit so that the detector can keep constant current at different temperatures, the bias current is converted into the bias voltage of the detector through the bias generation circuit so as to counteract the bias noise, the fluctuation of the temperature of the substrate and the joule heat, and then two paths of almost same current are generated through the detection and the integration circuit, and then the current is subjected to difference and integrated into the voltage output. Because the temperature coefficients of voltage output and responsivity are very small, the requirements of no TEC and no barrier sheet can be met.
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
Fig. 1 is a schematic diagram of an uncooled infrared focal plane array readout circuit according to a first embodiment of the present invention. In the first embodiment, as shown in fig. 1, the bias circuit 10 includes: input bias current IbThe fifth field effect transistor M5And a fourth field effect transistor M4And a third operational amplifier op 3. Input bias current IbOne end of the first FET is connected to ground line or power line Vsk, and the other end is connected to the fifth FET M5And the fourth field effect transistor M4The node designated Veb is the output of the bias circuit 10. The positive input end of the third operational amplifier op3 is connected with the reference voltage Vref, and the negative input end is connected with the fifth field effect transistor M5The output of the source electrode is connected with a fifth field effect transistor M5A gate electrode of (1). Fourth field effect transistor M4And the source is connected to the power supply line Vsk or the ground line, and the drain is connected to the negative input terminal of the third operational amplifier op 3.
Fig. 2 is a schematic diagram of an uncooled infrared focal plane array readout circuit according to a second embodiment of the present invention. In the second embodiment, as shown in FIG. 2, the fourth field effect transistor M4Can also be shorted, which can be simplifiedCircuit, omitting the third operational amplifier op3 and the fifth field effect transistor M5. Fig. 3 is a schematic diagram of an uncooled infrared focal plane array readout circuit according to a third embodiment of the present invention. In the third embodiment, as shown in fig. 3, a sixth fet M is added to fig. 26The grid electrode and the drain electrode of the field effect transistor are in short circuit, and the drain electrode is connected with an input bias current IbThe source electrode is connected with a fourth field effect transistor M4Of the substrate. Sixth field effect transistor M6Is also the output Vcas.
In the first embodiment of the present invention, as shown in fig. 1, the bias voltage generating circuit 20 includes a first mirror fet M1mA second operational amplifier op2, a third field effect transistor M3Mirror image microbolometer resistance Rsm. First mirror image field effect transistor M1mA gate connected to the first output Veb of the bias circuit 10, a source connected to the power supply line Vsk or ground, and a drain connected to the third FET M3And the negative input of the second operational amplifier op 2. The positive end of the second operational amplifier op2 is connected with the reference voltage Vref, and the output end is connected with the third field effect transistor M3A gate electrode of (1). And the third field effect transistor M3Is connected with the mirror image microbolometer resistor RsmThe node being the output of the bias voltage generating circuit 20, the node name being D. Mirror microbolometer resistance RsmTo the negative terminal ground or power supply line Vsk. For a focal plane array with M rows and N columns, the voltage at the D point needs to drive the detection and integration circuit 30 at N columns, so the D point can be output by an analog buffer bf.
in the third embodiment, as shown in fig. 3, the bias voltage generating circuit 20 further includes a second mirror field effect transistor M5mThe grid is connected with the second output Vcas of the bias circuit 10, and the source is connected with the first mirror image field effect transistor M1mDrain electrode of the first field effect transistor M is connected with the third field effect transistor M3And the negative input of the second operational amplifier op 2.
Mirror microbolometer resistance RsmThe resistance and the sensitive microbolometer are temperature-sensitive resistors made of the same material such as vanadium oxide, amorphous silicon and titanium oxide. The mirror microbolometer resistance may be the same thermal, electrical as the sensitive microbolometerThe optical characteristics are that the optical characteristics are only shielded, the target radiation cannot be induced, the optical characteristics can also be thermally short-circuited with the substrate, and the temperature is constantly equal to the substrate temperature. Mirror microbolometer resistance R for noise reductionsmand a third field effect transistor M3First mirror image field effect transistor M1mSecond mirror image field effect transistor M5mThe structures of the second operational amplifier op2 and the like can be K rows connected in parallel, and the value range of K is between 1 and 80. For matching, the mirror microbolometer resistance is equal to the sensitive microbolometer resistance, and there are K columns of mirror microbolometers per row.
In a first embodiment of the invention, as shown in fig. 1, the detection and integration circuit 30 comprises a first field effect transistor M1A second field effect transistor M2A first operational amplifier op1, a sensitive microbolometer RsOperational amplifier of integrator and reset switch SrstAnd an integrating capacitor Cint. First field effect transistor M1The gate is connected to the first output Veb of the bias circuit 10, the source is connected to the power line Vsk or ground, and the drain is connected to the second FET M2Drain electrode of (1), negative input end of operational amplifier (opant) of integrator, and integrating capacitor (C)intPositive terminal and reset switch SrstTo one end of (a). The positive input end of the first operational amplifier op1 is connected with the output end of the bias generating circuit 20, and the negative input end is connected with the second field effect transistor M2Source electrode and sensitive microbolometer Rsthe output end of the second field effect transistor M is connected with the positive end of the first field effect transistor2A gate electrode of (1). Sensitive microbolometer RsTo the negative terminal ground or power supply line Vsk. The positive input end of the operational amplifier opint of the integrator is connected with the reference voltage Vref, and the output end of the operational amplifier is connected with the integrating capacitor Cintand a reset switch SrstAnd the other end of the same.
In the third embodiment, as shown in fig. 3, the detecting and integrating circuit 30 further includes a seventh fet M7A gate connected to the second output Vcas of the bias circuit 10, and a source connected to the first field effect transistor M1Drain electrode of the first field effect transistor M is connected with the second field effect transistor M2And the negative input of the integrator op-amp, int.
The following description will specifically describe the present invention by taking 640 x 512 array infrared focal plane array readout circuit as an example, but the scope of the present invention is not limited thereto.
As shown in fig. 1, 2 and 3, the infrared focal plane array readout circuit includes a bias circuit 10, a bias generation circuit 20 and a detection and integration circuit 30. In the detection and integration circuit 30, the integrator operates to amplify the point to the first field effect transistor M1With sensitive microbolometer RsIs integrated, and the output expression is:
Wherein, I1Is a first field effect transistor M1Current of (I)SIs a sensitive microbolometer RsThe current of (2). T isintAnd Cintrespectively, integration time and integration capacitance, VintIs the output of the integrator op-amp.
And the first field effect transistor M1And a sensitive microbolometer RsIs controlled by the bias circuit 10 and the bias generating circuit 20. For the purpose of matching, a first field effect transistor M1First mirror image field effect transistor M1mAnd a fourth field effect transistor M4Are matched, so it can be seen that:
I1＝Ib,......(2)
I1m＝K*Ib,......(3)
Wherein VDIs the voltage of node D, IbIs the magnitude of the input bias current and has no temperature coefficient. Thus, the probe output expression is:
Under perfect match conditions, RsmIs Rs1/K of, thus the voltage output VintIs equal to the reference voltage Vref. However, due to non-uniformity of the microbolometer resistanceIn fact, the voltage output VintWill be at a reference voltage VrefFluctuating up and down. However, as can be seen from the formula (5), even if there is a non-uniformity, VintAlmost without temperature coefficient, since RsmAnd RsThe temperature coefficients of (a) and (b) cancel each other out.
the response of the detector is when the target temperature TtChange dTttemperature T of sensitive microbolometersChange dTsThus the resistance R of the sensitive microbolometersIs changed so that the integrator outputs VintA change occurs. The response rate is then:
Wherein alpha issIs the temperature coefficient of resistance of a sensitive microbolometer, typically-0.022/deg.C,The rate of change of the temperature of the sensitive microbolometer with the target temperature is determined by the target temperature, the microbolometer manufacturing process and the optical element parameters, and the typical value is 0.01. From the equation (6), it can be seen that the microbolometer resistance R is due to the mirror imagesmWith sensitive microbolometer RsThe temperature coefficients of (a) and (b) cancel each other out, and the temperature coefficient of the responsivity is also small.
Comparing formulas (5) and (6), the infrared focal plane reading circuit of the invention realizes good matching by adopting the mirror image microbolometer and the sensitive microbolometer, counteracts the voltage output and response rate change caused by substrate temperature fluctuation, has small temperature coefficient of the voltage output and response rate, and ensures the stability of the voltage output and response rate under different substrate temperatures, thereby meeting the requirements of no TEC and no barrier of the detector, greatly simplifying the system design, and reducing the cost, the power consumption, the area and the volume.
The present invention has been described above with reference to specific examples, but the present invention is not limited to these specific examples. It will be understood by those skilled in the art that various changes, substitutions of equivalents, variations, and the like can be made thereto without departing from the spirit of the invention, and the scope of the invention is to be determined from the following claims. Also, in the structure of the present invention, the respective components may be decomposed and/or recombined, and these decomposition and/or recombination should be regarded as an equivalent of the present invention.
Claims (7)
1. An uncooled infrared focal plane array readout circuit, comprising:
A bias circuit (10), the bias circuit (10) being capable of generating a bias current, the bias circuit (10) comprising an input bias current (I)b) And a fourth field effect transistor (M)4) And a sixth field effect transistor (M)6) Said fourth field effect transistor (M)4) As a first output (Veb) of said bias circuit (10), said sixth field effect transistor (M)6) Is shorted to the drain and the drain is connected to the input bias current (I)b) The source electrode is connected with the fourth field effect transistor (M)4) And the sixth field effect transistor (M)6) As a second output (Vcas) of the bias circuit (10);
a bias voltage generating circuit (20), the bias voltage generating circuit (20) being connected to an output of the bias circuit (10) and being capable of converting the bias current into a bias voltage;
And a detection and integration circuit (30), wherein the detection and integration circuit (30) is connected to the output of the bias circuit (10) and the output of the bias generation circuit (20), can generate two paths of almost same current, integrates the difference of the two generated paths of current and outputs the integrated current as voltage.
2. The uncooled infrared focal plane array readout circuit of claim 1, wherein the bias voltage generation circuit (20) includes a first mirror field effect transistor (M)1m) A second operational amplifier (op2), a third field effect transistor (M)3) Mirror image microbolometer resistance (R)sm)，
The first mirror field effect transistor (M)1m) The grid is connected with the biasA first output (Veb) of the circuit (10) is connected with a source electrode of a power line (Vsk) or a ground wire and a drain electrode of the circuit is connected with the third field effect transistor (M)3) And a negative input of the second operational amplifier (op 2);
The positive end of the second operational amplifier (op2) is connected with a reference voltage (Vref), and the output end is connected with the third field effect transistor (M)3) A gate electrode of (1);
the third field effect transistor (M)3) Is connected to the mirror microbolometer resistance (R)sm) The mirror microbolometer resistance (R), the mirror microbolometer resistance (R)sm) As an output node (D) of the bias generation circuit (20);
the mirror microbolometer resistance (R)sm) To the negative terminal ground or power supply line (Vsk).
3. The uncooled infrared focal plane array readout circuit of claim 1,
The bias voltage generating circuit (20) includes a first mirror field effect transistor (M)1m) A second mirror image field effect transistor (M)5m) A second operational amplifier (op2), a third field effect transistor (M)3) Mirror image microbolometer resistance (R)sm)，
The first mirror field effect transistor (M)1m) A gate connected to the first output (Veb) of the bias circuit (10), a source connected to a power line (Vsk) or ground, and a drain connected to the second mirror FET (M)5m) A source electrode of (a);
The second mirror field effect transistor (M)5m) The gate is connected to the second output (Vcas) of the bias circuit (10), and the source is connected to the first mirror field effect transistor (M)1m) Is connected to the third field effect transistor (M)3) And a negative input of the second operational amplifier (op 2);
The positive end of the second operational amplifier (op2) is connected with a reference voltage (Vref), and the output end is connected with the third field effect transistor (M)3) A gate electrode of (1);
the third field effect transistor (M)3) Is connected to the mirror microbolometer resistance (R)sm) The mirror image microbolometerResistance (R)sm) As an output node (D) of the bias generation circuit (20);
The mirror microbolometer resistance (R)sm) To the negative terminal ground or power supply line (Vsk).
4. the uncooled infrared focal plane array readout circuit according to claim 2 or 3, wherein the bias voltage generation circuit (20) further comprises an analog buffer (bf),
The output node (D) is connected to the analog buffer (bf) as an output of the bias voltage generation circuit (20).
5. The uncooled infrared focal plane array readout circuit of claim 3, wherein the mirrored microbolometer resistance (R)sm) The third field effect transistor (M)3) The first mirror image field effect transistor (M)1m) The second mirror image field effect transistor (M)5m) And the second operational amplifier (op2) is connected in parallel by K columns, and the value range of K is between 1 and 80.
6. The uncooled infrared focal plane array readout circuit of claim 1, wherein the detection and integration circuit (30) includes a first field effect transistor (M)1) A second field effect transistor (M)2) A first operational amplifier (op1), a sensitive microbolometer (R)s) An integrator operational amplifier (opint) and a reset switch (S)rst) And an integrating capacitor (C)int)，
The first field effect transistor (M)1) A gate connected to the first output (Veb) of the bias circuit (10), a source connected to a power line (Vsk) or ground, and a drain connected to the second FET (M)2) Drain electrode of (1), negative input end of integrator operational amplifier (opint), and integrating capacitor (C)int) Positive terminal and reset switch (S)rst) One end of (a);
The positive input end of the first operational amplifier (op1) is connected with the output end of the bias voltage generating circuit (20), and the negative input end is connected with the second field effect transistor (M)2) And said sensitive microbolometer (R)s) And an output terminal of the second field effect transistor (M)2) A gate electrode of (1);
Said sensitive microbolometer (R)s) A negative terminal ground line or power supply line (Vsk);
the positive input end of the integrator operational amplifier (opint) is connected with a reference voltage (Vref), and the output end of the integrator operational amplifier (opint) is connected with an integrating capacitor (C)int) Negative terminal and reset switch (S)rst) And the other end of the same.
7. The uncooled infrared focal plane array reading circuit of one of claims 2 to 3 and 5, wherein the detection and integration circuit (30) includes a first field effect transistor (M)1) Seventh field effect transistor (M)7) A second field effect transistor (M)2) A first operational amplifier (op1), a sensitive microbolometer (R)s) An integrator operational amplifier (opint) and a reset switch (S)rst) And an integrating capacitor (C)int)，
The first field effect transistor (M)1) A gate connected to the first output (Veb) of the bias circuit (10), a source connected to a power line (Vsk) or ground, and a drain connected to the seventh FET (M)7) A source electrode of (a);
The seventh field effect transistor (M)7) Is connected to the second output (Vcas) of the bias circuit (10), and has its source connected to the first field effect transistor (M)1) Is connected to the second field effect transistor (M)2) Drain electrode of (1), negative input end of integrator operational amplifier (opint), and integrating capacitor (C)int) Positive terminal and reset switch (S)rst) One end of (a);
The positive input end of the first operational amplifier (op1) is connected with the output end of the bias voltage generating circuit (20), and the negative input end is connected with the second field effect transistor (M)2) And said sensitive microbolometer (R)s) And an output terminal of the second field effect transistor (M)2) A gate electrode of (1);
Said sensitive microbolometer (R)s) A negative terminal ground line or power supply line (Vsk);
The positive input end of the integrator operational amplifier (opint) is connected with a reference voltage (Vref), and the output end of the integrator operational amplifier (opint) is connected with an integrating capacitor (C)int) Negative terminal and resetSwitch (S)rst) And the other end of the same.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711175496.6A CN107727243B (en) | 2017-11-22 | 2017-11-22 | Uncooled infrared focal plane array readout circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711175496.6A CN107727243B (en) | 2017-11-22 | 2017-11-22 | Uncooled infrared focal plane array readout circuit |
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| Publication Number | Publication Date |
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| CN107727243A CN107727243A (en) | 2018-02-23 |
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| CN110012246B (en) * | 2019-03-26 | 2020-06-02 | 电子科技大学 | Method for realizing high-speed window function of focal plane array reading circuit |
| CN111829670B (en) * | 2019-04-16 | 2021-09-21 | 杭州海康微影传感科技有限公司 | Uncooled infrared focal plane array reading circuit |
| TWI705235B (en) | 2019-07-19 | 2020-09-21 | 財團法人工業技術研究院 | Sensing devices |
| CN114422723B (en) * | 2022-01-18 | 2023-03-24 | 电子科技大学 | Infrared focal plane pixel level digital reading circuit and method |
| CN116222792B (en) * | 2023-04-28 | 2023-07-25 | 杭州海康微影传感科技有限公司 | Uncooled infrared focal plane array reading circuit, reading method thereof and detector |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201233548Y (en) * | 2008-07-25 | 2009-05-06 | 深圳市远望谷信息技术股份有限公司 | Voltage-current conversion circuit |
| CN102494781A (en) * | 2011-12-14 | 2012-06-13 | 电子科技大学 | Readout circuit bias structure |
| CN103776544A (en) * | 2014-01-09 | 2014-05-07 | 电子科技大学 | Readout circuit of uncooled infrared focal plane array |
| CN103900722A (en) * | 2014-04-18 | 2014-07-02 | 电子科技大学 | Reading circuit of uncooled infrared focal plane array |
| CN104251741A (en) * | 2014-09-18 | 2014-12-31 | 电子科技大学 | Self-adaptive infrared focal plane array readout circuit |
| CN104251740A (en) * | 2014-09-18 | 2014-12-31 | 电子科技大学 | Reading circuit of uncooled infrared focal plane array |
| CN104266767A (en) * | 2014-09-22 | 2015-01-07 | 电子科技大学 | Substrate temperature infrared focal plane array detector compensation reading circuit |
| CN105352606A (en) * | 2015-08-20 | 2016-02-24 | 电子科技大学 | Reading circuit of uncooled infrared focal plane array detector |
-
2017
- 2017-11-22 CN CN201711175496.6A patent/CN107727243B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201233548Y (en) * | 2008-07-25 | 2009-05-06 | 深圳市远望谷信息技术股份有限公司 | Voltage-current conversion circuit |
| CN102494781A (en) * | 2011-12-14 | 2012-06-13 | 电子科技大学 | Readout circuit bias structure |
| CN103776544A (en) * | 2014-01-09 | 2014-05-07 | 电子科技大学 | Readout circuit of uncooled infrared focal plane array |
| CN103900722A (en) * | 2014-04-18 | 2014-07-02 | 电子科技大学 | Reading circuit of uncooled infrared focal plane array |
| CN104251741A (en) * | 2014-09-18 | 2014-12-31 | 电子科技大学 | Self-adaptive infrared focal plane array readout circuit |
| CN104251740A (en) * | 2014-09-18 | 2014-12-31 | 电子科技大学 | Reading circuit of uncooled infrared focal plane array |
| CN104266767A (en) * | 2014-09-22 | 2015-01-07 | 电子科技大学 | Substrate temperature infrared focal plane array detector compensation reading circuit |
| CN105352606A (en) * | 2015-08-20 | 2016-02-24 | 电子科技大学 | Reading circuit of uncooled infrared focal plane array detector |
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