CN107704421A - A kind of polycaryon processor and message processing method - Google Patents
A kind of polycaryon processor and message processing method Download PDFInfo
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- CN107704421A CN107704421A CN201710818602.1A CN201710818602A CN107704421A CN 107704421 A CN107704421 A CN 107704421A CN 201710818602 A CN201710818602 A CN 201710818602A CN 107704421 A CN107704421 A CN 107704421A
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
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Abstract
The present invention, which provides a kind of polycaryon processor and message processing method, the polycaryon processor, to be included：SSO modules, interrupt control unit and multiple Core；The SSO modules, for counting the quantity for the WQE for belonging to same Group；When the WQE of statistics quantity reaches default amount threshold, first Core of the interrupt control unit into the multiple Core with Group bindings is notified to send the first interrupt requests, wherein, the default amount threshold is more than 1；First Core, for after first interrupt requests being received, the WQE belonged to the Group of the first Core bindings being obtained from the SSO modules, message is read from internal memory based on the WQE of acquisition and is handled.The present invention can effectively reduce the frequency of interruption and the frequency of Core start and stop packet receiving threads, save the resource of processor.
Description
Technical field
The present invention relates to network communication technology field, more particularly to a kind of polycaryon processor and message processing method.
Background technology
Polycaryon processor generally includes PKI (Packet Input, message receive) module, SSO (Schedule/
Synchronize/Order, dispatching message) module and multiple Core (core), based on multiple Core parallel processing capability, net
The message processing capability of network equipment greatly promotes.
At present, polycaryon processor mainly carries out Message processing using the packet receiving thread in down trigger mechanism triggering Core,
Specially：PKI modules are responsible for receiving message, and message is parsed, the result after parsing is added into WQE corresponding to message
In (Work Queue Entry, work item), then by WQE be stored in SSO modules, message is stored in internal memory；Exist when in SSO modules
During WQE, down trigger Core obtains WQE from SSO modules, and Core is read corresponding to the WQE based on the WQE of acquisition from internal memory
Message is handled；When Core continuous several times do not get WQE, packet receiving thread is exited.When WQE being again present in SSO modules
When, down trigger Core carries out Message processing again.
When data traffic is smaller and the time interval of message arrival processor is extremely uneven, it may appear that frequently interrupt, frequency
Numerous wake-up and the situation for exiting packet receiving thread, cause quantity flow is smaller but to consume more processor resource.
The content of the invention
It is an object of the invention to provide a kind of polycaryon processor and message processing method, to smaller in data traffic
When, reduce the occupancy to processor resource.
For achieving the above object, the invention provides following technical scheme：
On the one hand, the present invention provides a kind of polycaryon processor, and the polycaryon processor includes：SSO modules, interrupt control unit
And multiple Core；
The SSO modules, for counting the quantity for the WQE for belonging to same Group；When the WQE of statistics quantity reaches pre-
If amount threshold when, notify the interrupt control unit into the multiple Core with the Group binding the first Core send out
The first interrupt requests are sent, wherein, the default amount threshold is more than 1；
First Core, for after first interrupt requests are received, obtained from the SSO modules belong to
The Group of first Core bindings WQE, reads message from internal memory based on the WQE of acquisition and is handled.
On the other hand, the present invention provides a kind of message processing method, the SSO modules included applied to polycaryon processor, institute
Stating polycaryon processor also includes：Interrupt control unit and multiple Core, methods described include：
Statistics belongs to same Group WQE quantity；
When the WQE of statistics quantity reaches default amount threshold, notify the interrupt control unit to the multiple
The first Core in Core with Group bindings sends the first interrupt requests so that the first Core receive it is described
After first interrupt requests, the WQE belonged to the Group of the first Core bindings is obtained from the SSO modules, based on acquisition
WQE message read from internal memory handled, wherein, the default amount threshold is more than 1.
The present invention presets WQE amount threshold, and the quantity threshold for each Group it can be seen from above description
Value is more than 1, and when the Group of SSO modules statistics WQE quantity is not up to default amount threshold, SSO modules are not notified that
Interrupt control unit trigger with Group binding Core carry out Message processing, relative in SSO modules in the prior art simply by the presence of
WQE notes that interrupt control unit triggering Core carries out Message processing, and present invention reduces the frequency of interruption and Core start and stop to use
In the frequency of the packet receiving thread of processing message, the resource of processor has been saved.
Brief description of the drawings
Technical scheme in order to illustrate the embodiments of the present invention more clearly, make required in being described below to embodiment
Accompanying drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for
For those of ordinary skill in the art, on the premise of not paying creative work, other can also be obtained according to these accompanying drawings
Accompanying drawing.
Fig. 1 is a kind of structural representation of polycaryon processor shown in the embodiment of the present invention；
Fig. 2 is a kind of flow chart of message processing method shown in the embodiment of the present invention.
Embodiment
Here exemplary embodiment will be illustrated in detail, its example is illustrated in the accompanying drawings.Following description is related to
During accompanying drawing, unless otherwise indicated, the same numbers in different accompanying drawings represent same or analogous key element.Following exemplary embodiment
Described in embodiment do not represent and the consistent all embodiments of the present invention.On the contrary, they be only with it is such as appended
The example of the consistent apparatus and method of some aspects being described in detail in claims, of the invention.
It is only merely for the purpose of description specific embodiment in terminology used in the present invention, and is not intended to be limiting the present invention.
It is also intended in " one kind " of the singulative of the invention with used in appended claims, " described " and "the" including majority
Form, unless context clearly shows that other implications.It is also understood that term "and/or" used herein refers to and wrapped
Containing the associated list items purpose of one or more, any or all may be combined.
It will be appreciated that though various information, but this may be described using term first, second, third, etc. in the present invention
A little information should not necessarily be limited by these terms.These terms are only used for same type of information being distinguished from each other out.For example, do not departing from
In the case of the scope of the invention, the first information can also be referred to as the second information, and similarly, the second information can also be referred to as
One information.Depending on linguistic context, word as used in this " if " can be construed to " ... when " or " when ...
When " or " in response to determining ".
The embodiment of the present invention proposes a kind of polycaryon processor, and the polycaryon processor includes PKI modules, SSO modules, interrupts control
Device processed and multiple Core.Referring to Fig. 1, for a kind of structural representation of polycaryon processor shown in the embodiment of the present invention, this is more
Core processor includes Core1~Core5, totally 5 Core.The quantity of Core shown in Fig. 1 is merely illustrative, and the present invention is not right
Core quantity is limited.
The modules that polycaryon processor includes will be described below：
PKI modules：For distributing Group for message, the Group of distribution Group marks are filled up to corresponding to message
In WQE, message is stored in the internal memory outside polycaryon processor, and WQE corresponding to message is sent to SSO modules.
SSO modules：For counting the quantity for the WQE for belonging to same Group；When the WQE of statistics quantity reaches default
During amount threshold, first Core of the interrupt control unit into the multiple Core with Group bindings is notified to send the
One interrupt requests.
Specifically, SSO modules count the quantity for the WQE for belonging to each Group for each Group respectively, when statistics
When some Group WQE quantity reaches default amount threshold, SSO modules notice interrupt control unit is tied up to the Group
Fixed Core (being designated as the first Core) sends the first interrupt requests, wherein, the default amount threshold is more than 1.
Referring to table 1, for the Group and Core binding relationship being pre-configured with the SSO modules shown in the embodiment of the present invention,
The table is merely illustrative, and the present invention is not defined to the specific binding relationship between Group and Core.
| Group | Core |
| Group0~Group7 | Core1 |
| Group8~Group15 | Core2 |
| Group16~Group30 | Core3 |
| Group31~Group54 | Core4 |
| Group55~Group63 | Core5 |
Table 1
For example, default amount threshold is 2, if the Group0 of SSO modules statistics WQE quantity is 1, less than default
Amount threshold, then SSO modules be not notified that interrupt control unit sends interrupt requests to the Core1 that is bound with Group0；If SSO moulds
Block statistics Group0 quantity be 2, reach default amount threshold, then SSO modules notify interrupt control unit to Group0
The Core1 of binding sends interrupt requests.
First Core：For after first interrupt requests are received, obtained from the SSO modules belong to it is described
The Group of first Core bindings WQE, reads message from internal memory based on the WQE of acquisition and is handled.
Specifically, the first Core sends the instruction for obtaining WQE, SSO to SSO modules after the first interrupt requests are received
Module there will be belong to and be sent to the first Core with the Group WQE of the first Core bindings, the first Core is based on acquisition
The storage address for the message that WQE includes, reading message is handled from internal memory.
For example, Core1 after interrupt requests are received, starts packet receiving thread, the packet receiving thread sends to SSO modules and obtained
WQE instruction, SSO modules, will local existing category according to the Core1 being pre-configured with and Group0~Group7 binding relationship
Be sent to Core1 in Group0~Group7 WQE, Core1 read based on the WQE of acquisition from internal memory corresponding to message carry out
Processing.When Core1 continuous several times do not get WQE from SSO modules, illustrate to there is currently no the report for needing Core1 to handle
Text, therefore, exit packet receiving thread.After waiting down trigger next time, it is again started up packet receiving thread and is handled.
It can be seen from the above description that the present invention presets WQE amount threshold, and the quantity threshold for each Group
Value is more than 1, and when the Group of SSO modules statistics WQE quantity is not up to default amount threshold, SSO modules are not notified that
Interrupt control unit trigger with Group binding Core carry out Message processing, relative in SSO modules in the prior art simply by the presence of
WQE notes that interrupt control unit triggering Core carries out Message processing, and present invention reduces the frequency of interruption and Core start and stop to receive
The frequency of envelope curve journey, the resource of processor is saved.
In addition, the present invention is provided with timer for each Group, it is preferable that the timer can directly use SSO
The hardware timer of inside modules.Specifically, SSO modules are additionally operable to configure the time-out time of timer corresponding with Group, when
During timer expiry, notice interrupt control unit (is designated as second to the Core of Group bindings corresponding with the timer of time-out
Core the second interrupt requests) are sent；2nd Core is used for after the second interrupt requests are received, and obtains and belongs to from SSO modules
With the Group of the 2nd Core bindings WQE, (do not reach very little so as to avoid the quantity of the WQE due to belonging to a certain Group
Default amount threshold), and the Core processing with Group bindings can not be triggered in time, cause message delay or discarding.
The embodiment of the present invention also proposes a kind of message processing method, is at the message shown in the embodiment of the present invention referring to Fig. 2
Message processing process is described from SSO module sides for the flow chart of reason method, the embodiment.
Step 201, statistics belongs to same Group WQE quantity.
Step 202, when the WQE of statistics quantity reaches default amount threshold, notify the interrupt control unit to institute
State the first Core in multiple Core with Group bindings and send the first interrupt requests, so that the first Core is being received
To after first interrupt requests, the WQE belonged to the Group of the first Core bindings, base are obtained from the SSO modules
Message is read from internal memory in the WQE of acquisition to be handled, wherein, the default amount threshold is more than 1.
Further, the SSO modules include timer, wherein, the corresponding timer of each Group, the side
Method also includes：
Configure the time-out time of timer；
When the timer expires, the interrupt control unit the to the timer corresponding Group bindings with time-out is notified
Two Core send the second interrupt requests, so that the 2nd Core is after second interrupt requests are received, from the SSO moulds
The WQE belonged to the Group of the 2nd Core bindings is obtained in block.
Further, the timer is hardware timer.
The implementation process of above-mentioned message processing method specifically refers to the above-mentioned description to each module in polycaryon processor, herein
Repeat no more.
Now still by taking polycaryon processor shown in Fig. 1 as an example, the polycaryon processor and Message processing process are introduced.
As shown in table 1, Group and Core binding relationship is configured in SSO modules；It is default to belong to each Group's
WQE amount threshold is 2；The time-out time for configuring timer corresponding to each Group is 100ms.
When message Packet1 reaches polycaryon processor, PKI modules are that Packet1 distributes Group0, and obtain Packet1
Storage address (being designated as Address1) in internal memory, Group0 and Address1 are filled up to the (notes of WQE corresponding to Packet1
For WQE1) in, WQE1 is sent to SSO modules, and be in Address1 memory space by Packet1 deposit memory address.
SSO modules statistics belongs to each Group WQE quantity, and now, the quantity for belonging to Group0 WQE is 1,
Less than amount threshold 2, SSO modules are not notified that interrupt control unit sends interrupt requests to the Core1 bound with Group0.
When message Packet2 reaches polycaryon processor, PKI modules are that Packet2 distributes Group8, and obtain Packet2
Storage address (being designated as Address2) in internal memory, Group8 and Address2 are filled up to the (notes of WQE corresponding to Packet2
For WQE2) in, WQE2 is sent to SSO modules, and be in Address2 memory space by Packet2 deposit memory address.
SSO modules statistics belongs to each Group WQE quantity, and now, the quantity for belonging to Group0 WQE is 1,
The quantity for belonging to Group8 WQE is 1, respectively less than amount threshold 2, SSO modules be not notified that interrupt control unit to Group0
The Core1 of binding sends interrupt requests, is not also notified that interrupt control unit sends to interrupt to the Core2 bound with Group8 and asks
Ask.
When message Packet3 reaches polycaryon processor, PKI modules are that Packet3 distributes Group0, and obtain Packet3
Storage address (being designated as Address3) in internal memory, Group0 and Address3 are filled up to the (notes of WQE corresponding to Packet3
For WQE3) in, WQE3 is sent to SSO modules, and be in Address3 memory space by Packet3 deposit memory address.
SSO modules statistics belongs to each Group WQE quantity, and now, the quantity for belonging to Group0 WQE is 2,
Reaching default amount threshold, SSO modules notify interrupt control unit to send interrupt requests to the Core1 bound with Group0,
Core1 starts packet receiving thread after receiving the interrupt requests, the instruction for obtaining WQE is sent to SSO modules, SSO modules are according to this
Group0~the Group7 and Core1 of ground record binding relationship, Core1, Core1 roots are sent to by the WQE1 for belonging to Group0
According to the Address1 that WQE1 includes Packet1 processing is read from internal memory.After processing, Core1 sends to SSO modules obtain again
WQE instruction is taken, the WQE3 for belonging to Group0 is sent to Core1, the Address3 that Core1 includes according to WQE3 by SSO modules
Packet3 processing is read from internal memory.When Core1 sends the instruction for obtaining WQE to SSO modules again, if in SSO modules
The WQE with Group0~Group7 of Core1 bindings is not belonged to, then Core1 can not get WQE, not obtained in continuous several times
After getting WQE, Core1 exits packet receiving thread.
If the WQE for belonging to Group8 of SSO modules statistics quantity is always 1, in timer corresponding to Group8
When time-out time (100ms) reaches, SSO modules notify interrupt control unit to send interrupt requests to the Core2 bound with Group8,
Core2 starts packet receiving thread after receiving the interrupt requests, the instruction for obtaining WQE is sent to SSO modules, SSO modules are according to this
Group8~the Group15 and Core2 of ground record binding relationship, Core2, Core2 are sent to by the WQE2 for belonging to Group8
Packet2 processing is read from internal memory according to the Address2 that WQE2 includes.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
God any modification, equivalent substitution and improvements done etc., should be included within the scope of protection of the invention with principle.
Claims (6)
1. a kind of polycaryon processor, it is characterised in that the polycaryon processor includes：Dispatching message SSO modules, interrupt control unit
And multiple core Core；
The SSO modules, for counting the quantity for the work item WQE for belonging to same group of Group；When the WQE of statistics quantity reaches
During to default amount threshold, notify the interrupt control unit into the multiple Core with the Group binding first
Core sends the first interrupt requests, wherein, the default amount threshold is more than 1；
First Core, for after first interrupt requests are received, obtained from the SSO modules belong to it is described
The Group of first Core bindings WQE, reads message from internal memory based on the WQE of acquisition and is handled.
2. processor as claimed in claim 1, it is characterised in that the SSO modules include timer, wherein, each
The corresponding timer of Group；
The SSO modules, it is additionally operable to configure the time-out time of timer；When the timer expires, the interrupt control unit is notified
The second interrupt requests are sent to the 2nd Core of Group bindings corresponding with the timer of time-out；
2nd Core, for after second interrupt requests are received, obtained from the SSO modules belong to it is described
The Group of 2nd Core bindings WQE.
3. processor as claimed in claim 2, it is characterised in that the timer is hardware timer.
4. a kind of message processing method, the dispatching message SSO modules included applied to polycaryon processor, it is characterised in that described
Polycaryon processor also includes：Interrupt control unit and multiple core Core, methods described include：
Statistics belongs to same group of Group work item WQE quantity；
When the WQE of statistics quantity reaches default amount threshold, notify the interrupt control unit into the multiple Core
The first interrupt requests are sent with the first Core of Group bindings, so that the first Core is being received in described first
After disconnected request, the WQE, the WQE based on acquisition belonged to the Group of the first Core bindings is obtained from the SSO modules
Message is read from internal memory to be handled, wherein, the default amount threshold is more than 1.
5. method as claimed in claim 4, it is characterised in that the SSO modules include timer, wherein, each Group
A corresponding timer, methods described also include：
Configure the time-out time of timer；
When the timer expires, notify the interrupt control unit to the second of Group bindings corresponding with the timer of time-out
Core sends the second interrupt requests, so that the 2nd Core is after second interrupt requests are received, from the SSO modules
Middle acquisition belongs to the WQE with the Group of the 2nd Core bindings.
6. method as claimed in claim 5, it is characterised in that the timer is hardware timer.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108595370A (en) * | 2018-03-30 | 2018-09-28 | 新华三信息安全技术有限公司 | A kind of multi-core processor and message processing method |
| CN109327333A (en) * | 2018-09-30 | 2019-02-12 | 潍柴动力股份有限公司 | A kind of message stops paying out method and device |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6370606B1 (en) * | 1998-11-05 | 2002-04-09 | Compaq Computer Corporation | System and method for simulating hardware interrupts in a multiprocessor computer system |
| CN102006615A (en) * | 2010-11-25 | 2011-04-06 | 中兴通讯股份有限公司 | Method and device for processing massage |
| CN104539557A (en) * | 2015-01-04 | 2015-04-22 | 盛科网络（苏州）有限公司 | Method and device for message counting and reporting to CPU |
| CN105511954A (en) * | 2014-09-23 | 2016-04-20 | 华为技术有限公司 | Method and device for message processing |
| CN106034084A (en) * | 2015-03-16 | 2016-10-19 | 华为技术有限公司 | Data transmission method and apparatus thereof |
| CN106557358A (en) * | 2015-09-29 | 2017-04-05 | 北京东土军悦科技有限公司 | A kind of date storage method and device based on dual core processor |
| CN106708761A (en) * | 2015-11-12 | 2017-05-24 | 杭州华为数字技术有限公司 | Service message processing method and device |
| CN106921665A (en) * | 2017-03-06 | 2017-07-04 | 北京东土军悦科技有限公司 | A kind of message processing method and the network equipment |
-
2017
- 2017-09-12 CN CN201710818602.1A patent/CN107704421B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6370606B1 (en) * | 1998-11-05 | 2002-04-09 | Compaq Computer Corporation | System and method for simulating hardware interrupts in a multiprocessor computer system |
| CN102006615A (en) * | 2010-11-25 | 2011-04-06 | 中兴通讯股份有限公司 | Method and device for processing massage |
| CN105511954A (en) * | 2014-09-23 | 2016-04-20 | 华为技术有限公司 | Method and device for message processing |
| CN104539557A (en) * | 2015-01-04 | 2015-04-22 | 盛科网络（苏州）有限公司 | Method and device for message counting and reporting to CPU |
| CN106034084A (en) * | 2015-03-16 | 2016-10-19 | 华为技术有限公司 | Data transmission method and apparatus thereof |
| CN106557358A (en) * | 2015-09-29 | 2017-04-05 | 北京东土军悦科技有限公司 | A kind of date storage method and device based on dual core processor |
| CN106708761A (en) * | 2015-11-12 | 2017-05-24 | 杭州华为数字技术有限公司 | Service message processing method and device |
| CN106921665A (en) * | 2017-03-06 | 2017-07-04 | 北京东土军悦科技有限公司 | A kind of message processing method and the network equipment |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108595370A (en) * | 2018-03-30 | 2018-09-28 | 新华三信息安全技术有限公司 | A kind of multi-core processor and message processing method |
| CN109327333A (en) * | 2018-09-30 | 2019-02-12 | 潍柴动力股份有限公司 | A kind of message stops paying out method and device |
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| CN107704421B (en) | 2021-04-27 |
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