CN107680546B - Compensation delay circuit and display device - Google Patents
Compensation delay circuit and display device Download PDFInfo
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- CN107680546B CN107680546B CN201710913200.XA CN201710913200A CN107680546B CN 107680546 B CN107680546 B CN 107680546B CN 201710913200 A CN201710913200 A CN 201710913200A CN 107680546 B CN107680546 B CN 107680546B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
Abstract
The invention discloses a compensation delay circuit and a display device. The compensation delay circuit comprises a voltage regulating unit, a voltage regulating unit and a voltage regulating unit, wherein the voltage regulating unit receives an input voltage from a power supply end, converts the input voltage into a common voltage and outputs the common voltage; a voltage amplifying unit receiving the common voltage and outputting the amplified common voltage to the display panel; and the voltage feedback unit receives the feedback common voltage of the Nth frame from the display panel, converts the feedback common voltage into a digital signal and stores the digital signal, and converts the stored digital signal into the feedback common voltage and provides the feedback common voltage to the voltage amplification unit when the (N + 2) th frame is carried out, so that the phase difference between the amplified common voltage and the feedback common voltage is zero, the horizontal crosstalk of the display panel is eliminated, and the display quality is improved.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a compensation delay circuit and a display device.
Background
Liquid crystal displays, which display moving pictures using Thin Film Transistors (TFTs) as switching elements, are widely used due to their thin profile. In the liquid crystal display, a data voltage is applied to a pixel electrode, and a common voltage is applied to a common electrode opposite to the pixel electrode, the common electrode is connected in parallel to a common line, and a liquid crystal cell is driven by voltages applied to the pixel electrode and the common electrode.
However, depending on the structure of the common line, the common voltage is easily distorted due to the resistance of the common line or the deviation of the common voltage over the entire surface of the liquid crystal display panel. For example, in a liquid crystal display having the same number of common lines as the number of horizontal lines (i.e., vertical resolution) formed in parallel with gate lines, since a data voltage is simultaneously applied to 1 horizontal line of pixels by supplying a scan pulse, a load of the common line opposite to the pixel is increased. Since the load of the common line depends on the RC delay amount defined by the product of the resistance of the common line and the parasitic capacitance, the resistance of the common line must be reduced to reduce the RC delay amount. However, the conventional liquid crystal display has a structure in which the reduction of the resistance of the common line is limited and the common voltage Vcom is not maintained and is affected by the scan pulse SP or the data voltage Vdata, and thus, a ripple phenomenon occurs in the common voltage Vcom, which is a main cause of horizontal crosstalk that degrades the display quality of the panel when a specific data pattern is displayed on the screen.
Disclosure of Invention
The invention mainly solves the technical problem of providing a compensation delay circuit and a display device to eliminate the horizontal crosstalk problem of a panel and further improve the display quality.
In order to solve the technical problems, the invention adopts a technical scheme that: provided is a compensated delay circuit including:
the voltage regulating unit is used for receiving an input voltage from a power supply end, converting the input voltage into a common voltage and then outputting the common voltage;
the voltage amplifying unit is connected with the voltage regulating unit and an input common voltage end of the display panel and is used for receiving the common voltage, amplifying the common voltage and outputting the amplified common voltage to the input common voltage end of the display panel; and
and the voltage feedback unit is connected with the common voltage feedback end of the display panel and the voltage amplification unit and is used for receiving the feedback common voltage of the Nth frame from the common voltage feedback end of the display panel, converting the feedback common voltage into a digital signal and storing the digital signal, and converting the stored digital signal into the feedback common voltage and supplying the feedback common voltage to the voltage amplification unit when the N +2 th frame so as to enable the phase difference between the amplified common voltage and the feedback common voltage to be zero.
In order to solve the technical problem, the invention adopts another technical scheme that: there is provided a display device including a display panel and a compensation delay circuit, the compensation delay circuit including:
the voltage regulating unit is used for receiving an input voltage from a power supply end, converting the input voltage into a common voltage and then outputting the common voltage;
the voltage amplifying unit is connected with the voltage regulating unit and an input common voltage end of the display panel and is used for receiving the common voltage, amplifying the common voltage and outputting the amplified common voltage to the input common voltage end of the display panel; and
and the voltage feedback unit is connected with the common voltage feedback end of the display panel and the voltage amplification unit and is used for receiving the feedback common voltage of the Nth frame from the common voltage feedback end of the display panel, converting the feedback common voltage into a digital signal and storing the digital signal, and converting the stored digital signal into the feedback common voltage and supplying the feedback common voltage to the voltage amplification unit when the N +2 th frame so as to enable the phase difference between the amplified common voltage and the feedback common voltage to be zero.
The invention has the beneficial effects that: different from the prior art, the compensation delay circuit and the display device delay the feedback common voltage output from the common voltage feedback end of the display panel through the voltage feedback unit, so that the phase difference between the phase of the feedback common voltage and the amplified common voltage output by the voltage amplifying unit is zero, thereby eliminating the horizontal crosstalk of the display panel and further improving the display quality.
Drawings
FIG. 1 is a circuit schematic of a prior art compensation circuit;
FIG. 2 is a schematic diagram of the waveforms of FIG. 1;
FIG. 3 is a schematic diagram of a display effect of a conventional display panel;
FIG. 4 is a circuit schematic of a first embodiment of the compensated delay circuit of the present invention;
FIG. 5 is a schematic diagram of the waveforms of FIG. 4;
FIG. 6 is a schematic diagram of a display effect of the display panel according to the present invention;
FIG. 7 is a circuit schematic of a second embodiment of the compensated delay circuit of the present invention;
fig. 8 is a schematic structural diagram of a display device according to the present invention.
Detailed Description
Fig. 1 is a schematic circuit diagram of a conventional compensation circuit. As can be seen from fig. 1, the common voltage in the display panel 5 is directly provided to the input terminals of the amplifiers 3 and 4, so as to adjust and compensate the amplified common voltage output from the output terminals of the amplifiers 3 and 4 by the feedback common voltage, so that the common voltage is kept stable, however, as can be seen from the analysis of fig. 2, the phase of the amplified common voltage output from the output terminals of the amplifiers 3 and 4 is significantly delayed from the phase of the feedback common voltage, that is, the phase of the amplified common voltage output from the output terminals of the amplifiers 3 and 4 is delayed from the phase of the feedback common voltage, and when the delay time is greater than or equal to the charging time of one scan line, as shown in fig. 3, the feedback common voltage cannot eliminate the horizontal crosstalk of the display panel, and the display quality is not improved.
Fig. 4 is a schematic circuit diagram of a compensating delay circuit according to a first embodiment of the present invention. The compensated delay circuit includes:
a voltage adjusting unit 12 for receiving an input voltage from the power source terminal 11 and converting the input voltage into a common voltage to be output;
the voltage amplifying unit 13 is connected to the voltage adjusting unit 12 and the input common voltage end of the display panel 14, and is configured to receive the common voltage, amplify the common voltage, and output the amplified common voltage to the input common voltage end of the display panel 14; and
and the voltage feedback unit 15 is connected to the voltage amplification unit 13 and the common voltage feedback end of the display panel, and is configured to receive the feedback common voltage of the nth frame from the common voltage feedback end of the display panel 14, convert the feedback common voltage into a digital signal, store the digital signal, convert the stored digital signal into the feedback common voltage at the N +2 th frame, and provide the feedback common voltage to the voltage amplification unit 13, so that a phase difference between the amplified common voltage and the feedback common voltage is zero.
Specifically, the voltage regulating unit 12 includes a discharge voltage regulator 121, an input terminal of the discharge voltage regulator 121 receives the input voltage, and an output terminal of the discharge voltage regulator 121 is connected to the voltage amplifying unit 13 for outputting the common voltage.
Specifically, the voltage amplifying unit 13 includes a first amplifier 131, a first input terminal of the first amplifier 131 is connected to the output terminal of the discharging voltage regulator 121 for receiving the common voltage, a second input terminal of the first amplifier 131 is connected to the voltage feedback unit 15 for outputting the feedback common voltage, and an output terminal of the first amplifier 131 is connected to the input common voltage terminal of the display panel 14 for outputting the amplified common voltage to the display panel 14.
Specifically, the voltage feedback unit 15 includes an analog-to-digital converter 151, a timing controller 152 and a digital-to-analog converter 153, the input terminal of the analog-to-digital converter 151 is connected to the input common voltage terminal of the display panel 14, for receiving the feedback common voltage of the nth frame and converting the feedback common voltage into a digital signal, the output terminal of the analog-to-digital converter 151 is connected to the input terminal of the timing control chip 152, the output end of the timing control chip 152 is connected to the input end of the digital-to-analog converter 153, an output terminal of the digital-to-analog converter 153 is connected to a second input terminal of the first amplifier 131, the timing controller 152 stores the digital signal and outputs the digital signal to the digital-to-analog converter 153 at the N +2 th frame, so that the digital-to-analog converter 153 converts the digital signal into a feedback common voltage to be supplied to the voltage amplifying unit 13.
Wherein, the timing controller 152 comprises a memory 1521, and the memory 1521 is used for storing the digital signals.
In this embodiment, the common voltage feedback terminal of the display panel 14 is disposed in the middle of the display panel 14 to obtain a good feedback common voltage from the display panel 14, and in other embodiments, the common voltage feedback terminal of the display panel 14 may be disposed as needed.
The operating principle of the first embodiment of the compensated delay circuit is described as follows:
the discharging voltage regulator 121 receives an input voltage from a power source terminal 11 and converts the input voltage into a common voltage, and then provides the common voltage to a first input terminal of the first amplifier 131, the first amplifier 131 amplifies the common voltage and then outputs the amplified common voltage to an input common voltage terminal of the display panel 14, the analog-to-digital converter 151 receives a feedback common voltage from a common voltage feedback terminal of the display panel 14 and converts the feedback common voltage into a digital signal, and then provides the digital signal to the timing controller 152, the timing controller 152 stores the received digital signal in the memory 1521, and the controller 152 obtains the digital signal from the memory 1521 and outputs the digital signal to the digital-to-analog converter 153 at the N +2 th frame, and the digital-to-analog converter 153 converts the received digital signal into the feedback common voltage and provides the feedback common voltage to a second input terminal of the first amplifier 131, thus, the phase difference between the amplified common voltage output by the output terminal of the first amplifier 131 and the feedback common voltage is zero (as shown in fig. 5), so that the amplified common voltage output by the output terminal of the voltage amplifying unit 13 is adjusted and compensated by the feedback common voltage, the common voltage in the display panel 14 is kept stable, the horizontal crosstalk of the display panel is eliminated (as shown in fig. 6), and the display quality is improved.
Fig. 7 is a circuit diagram of a compensating delay circuit according to a second embodiment of the present invention. The second embodiment of the compensating delay circuit differs from the first embodiment described above in that: the voltage amplifying unit 13 further includes a second amplifier 132, a first input terminal of the second amplifier 132 is connected to an output terminal of the discharging voltage regulator 121 for receiving the common voltage, a second input terminal of the second amplifier 132 is connected to the voltage feedback unit 15 an output terminal of the digital-to-analog converter 153 for outputting the feedback common voltage, and an output terminal of the second amplifier 132 is connected to an input common voltage terminal of the display panel 14 for outputting the amplified common voltage to the display panel 14. In this embodiment, a plurality of input common voltage terminals of the display panel 14 may be provided, and the output terminals of the first amplifier 131 and the second amplifier 132 may be connected to the same input common voltage terminal of the display panel 14, or connected to different input common voltage terminals of the display panel 14.
The operating principle of the second embodiment of the compensated delay circuit is described as follows:
the discharging voltage regulator 121 receives an input voltage from a power source terminal 11 and converts the input voltage into a common voltage, and provides the common voltage to a first input terminal of the first amplifier 131 and the second amplifier 132, the first amplifier 131 and the second amplifier 132 amplifies the common voltage and outputs the amplified common voltage to an input common voltage terminal of the display panel 14, the analog-to-digital converter 151 receives a feedback common voltage from a common voltage feedback terminal of the display panel 14 and converts the feedback common voltage into a digital signal, and provides the digital signal to the timing controller 152, the timing controller 152 stores the received digital signal in the memory 1521, and obtains the digital signal from the memory 1521 and outputs the digital signal to the digital-to-analog converter 153 at an N +2 frame, the digital-to-analog converter 153 converts the received digital signal into the feedback common voltage and provides the feedback common voltage to a second input terminal of the first amplifier 131 and the second amplifier 132, accordingly, the phase difference between the amplified common voltage outputted from the output terminals of the first amplifier 131 and the second amplifier 132 and the feedback common voltage is zero (as shown in fig. 5), so that the amplified common voltage outputted from the output terminal of the voltage amplifying unit 13 is adjusted and compensated by the feedback common voltage, the common voltage is kept stable, the horizontal crosstalk of the display panel is eliminated (as shown in fig. 6), and the display quality is improved.
Please refer to fig. 8, which is a schematic structural diagram of a display device according to the present invention. The display device comprises a display panel and any one of the compensation delay circuits, and other devices and functions of the display device are the same as those of the conventional display device, and are not repeated herein.
The compensation delay circuit and the display device delay the feedback common voltage output from the display panel through the voltage feedback unit so that the phase difference between the phase of the feedback common voltage and the amplified common voltage output by the voltage amplifying unit is zero, thereby eliminating the horizontal crosstalk of the display panel and further improving the display quality.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A compensated delay circuit, comprising:
the voltage regulating unit is used for receiving an input voltage from a power supply end, converting the input voltage into a common voltage and then outputting the common voltage;
the voltage amplifying unit is connected with the voltage regulating unit and an input common voltage end of the display panel and is used for receiving the common voltage, amplifying the common voltage and outputting the amplified common voltage to the input common voltage end of the display panel; and
and the voltage feedback unit is connected with the common voltage feedback end of the display panel and the voltage amplification unit and is used for receiving the feedback common voltage of the Nth frame from the common voltage feedback end of the display panel, converting the feedback common voltage into a digital signal and storing the digital signal, and converting the stored digital signal into the feedback common voltage and supplying the feedback common voltage to the voltage amplification unit when the N +2 th frame so as to enable the phase difference between the amplified common voltage and the feedback common voltage to be zero.
2. The compensated delay circuit of claim 1, wherein the voltage regulating unit is a discharging voltage regulator, an input terminal of the discharging voltage regulator receives the input voltage, and an output terminal of the discharging voltage regulator is connected to the voltage amplifying unit for outputting a common voltage.
3. The compensated delay circuit of claim 2, wherein the voltage amplifying unit comprises a first amplifier, a first input terminal of the first amplifier is connected to the output terminal of the discharge voltage regulator for receiving the common voltage, a second input terminal of the first amplifier is connected to the voltage feedback unit for outputting the feedback common voltage, and an output terminal of the first amplifier is connected to the input common voltage terminal of the display panel for outputting the amplified common voltage.
4. The compensated delay circuit of claim 3, wherein the voltage amplifying unit further comprises a second amplifier, a first input terminal of the second amplifier is connected to the output terminal of the discharge voltage regulator for receiving the common voltage, a second input terminal of the second amplifier is connected to the voltage feedback unit for outputting the feedback common voltage, and an output terminal of the second amplifier is connected to the input common voltage terminal of the display panel for outputting the amplified common voltage.
5. The compensated delay circuit of claim 4, wherein the voltage feedback unit comprises an analog-to-digital converter, a timing controller and a digital-to-analog converter, an input terminal of the analog-to-digital converter is connected to the common voltage feedback terminal of the display panel and is configured to receive the feedback common voltage of the Nth frame and convert the feedback common voltage into a digital signal, an output terminal of the analog-to-digital converter is connected to an input terminal of the timing controller, an output terminal of the timing controller is connected to an input terminal of the digital-to-analog converter, an output terminal of the digital-to-analog converter is connected to the second input terminal of the first amplifier and the second input terminal of the second amplifier, the timing controller stores the digital signal and outputs the digital signal to the digital-to-analog converter at the N +2 th frame, so that the digital-to-analog converter converts the digital signal into the feedback common, the timing controller includes a memory for storing the digital signal.
6. A display device comprising a display panel and a compensated delay circuit, the compensated delay circuit comprising:
the voltage regulating unit is used for receiving an input voltage from a power supply end, converting the input voltage into a common voltage and then outputting the common voltage;
the voltage amplifying unit is connected with the voltage regulating unit and an input common voltage end of the display panel and is used for receiving the common voltage, amplifying the common voltage and outputting the amplified common voltage to the input common voltage end of the display panel; and
and the voltage feedback unit is connected with the common voltage feedback end of the display panel and the voltage amplification unit and is used for receiving the feedback common voltage of the Nth frame from the common voltage feedback end of the display panel, converting the feedback common voltage into a digital signal and storing the digital signal, and converting the stored digital signal into the feedback common voltage and supplying the feedback common voltage to the voltage amplification unit when the N +2 th frame so as to enable the phase difference between the amplified common voltage and the feedback common voltage to be zero.
7. The display device according to claim 6, wherein the voltage regulating unit is a discharging voltage regulator, an input terminal of the discharging voltage regulator receives the input voltage, and an output terminal of the discharging voltage regulator is connected to the voltage amplifying unit for outputting a common voltage.
8. The display device according to claim 7, wherein the voltage amplifying unit comprises a first amplifier, a first input terminal of the first amplifier is connected to the output terminal of the discharge voltage regulator for receiving the common voltage, a second input terminal of the first amplifier is connected to the voltage feedback unit for outputting the feedback common voltage, and an output terminal of the first amplifier is connected to the input common voltage terminal of the display panel for outputting the amplified common voltage.
9. The display device according to claim 8, wherein the voltage amplifying unit further comprises a second amplifier, a first input terminal of the second amplifier is connected to the output terminal of the discharge voltage regulator for receiving the common voltage, a second input terminal of the second amplifier is connected to the voltage feedback unit for outputting the feedback common voltage, and an output terminal of the second amplifier is connected to the input common voltage terminal of the display panel for outputting the amplified common voltage.
10. The display device according to claim 9, wherein the voltage feedback unit comprises an analog-to-digital converter, a timing controller and a digital-to-analog converter, an input terminal of the analog-to-digital converter is connected to a common voltage feedback terminal of the display panel, the output end of the analog-to-digital converter is connected with the input end of the time schedule controller, the output end of the time schedule controller is connected with the input end of the digital-to-analog converter, the output end of the digital-to-analog converter is connected with the second input end of the first amplifier and the second input end of the second amplifier, the time schedule controller stores the digital signal and outputs the digital signal to the digital-to-analog converter at the N +2 th frame, so that the digital-to-analog converter converts the digital signal into a feedback common voltage to be supplied to the voltage amplifying unit.
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CN108597466A (en) * | 2018-04-25 | 2018-09-28 | 深圳市华星光电技术有限公司 | Compensation gamma voltages improve the circuit and display device that crosstalk is coupled |
CN109410856A (en) * | 2018-11-09 | 2019-03-01 | 惠科股份有限公司 | A kind of driving circuit, driving method and display device |
CN109285518B (en) * | 2018-11-13 | 2021-05-25 | 惠科股份有限公司 | Compensation circuit of display panel and display panel |
CN109509447B (en) * | 2018-12-19 | 2020-08-04 | 惠科股份有限公司 | Common voltage integrated circuit and display device |
CN115223515B (en) | 2022-07-22 | 2023-11-28 | 深圳市华星光电半导体显示技术有限公司 | Display device and control method thereof |
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