CN107634049A - FC chip systems stack fan-out packaging structure and preparation method thereof - Google Patents
FC chip systems stack fan-out packaging structure and preparation method thereof Download PDFInfo
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- CN107634049A CN107634049A CN201710831123.3A CN201710831123A CN107634049A CN 107634049 A CN107634049 A CN 107634049A CN 201710831123 A CN201710831123 A CN 201710831123A CN 107634049 A CN107634049 A CN 107634049A
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- wiring layer
- stacked package
- package body
- chips
- layer again
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
Abstract
The present invention relates to a kind of FC chip systems to stack fan-out packaging structure and preparation method thereof, and it includes the stacked package body formed by two FC chips, and the back side of two FC chips is mutually abutted against in stacked package body；Wiring layer again is set in the top of stacked package body, wiring layer again under the lower section of stacked package body is set, in stacked package body two corresponding chip bumps of FC chips respectively with upper wiring layer again, under again wiring layer electrically connect；Symmetrical perpendicular interconnection pinboard is set in the outside of stacked package body, by the through hole connector in perpendicular interconnection pinboard respectively with upper wiring layer again, under again wiring layer carry out needed for electrical connection, with the transfer of signal interconnection and/or signal exit needed for realizing in stacked package body between two FC chips.The present invention is compact-sized, can effectively realize the stacked package of FC chips, energy process simplification, improve packaging efficiency, securely and reliably.
Description
Technical field
The present invention relates to a kind of encapsulating structure and preparation method thereof, especially a kind of FC chip systems, which stack, is fanned out to encapsulation knot
Structure and preparation method thereof, belong to the technical field of integrated antenna package.
Background technology
With the rapid development of semiconductor integrated circuit technology, integrated level more and more higher, the input and output on chip（I/O）
Number of terminals rapidly increases, wire bonding（WB）Technology and with carry automated bonding（TAB）Technology can not meet that high integration is partly led
Body growth requirement.Flip chip bonding（FC）Interconnection technique be in whole chip surface by grating array arrangements I/O terminals, chip directly with
Back-off mode is installed on wiring plate, is realized by above-mentioned grid array I/O terminals electrode pad corresponding with substrate and electrically connected
Connect, more I/O terminals can be arranged under equal area, pitch can accomplish more greatly, to be suitable for the highly integrated hair of semiconductor
Exhibition demand.Compared with traditional lead-bonding chip, FC chips considerably increase the number of pins of chip, reduce encapsulation chi
It is very little, shorten the distance between chip and substrate/shell, improve chip functions.
Development and maturation with face-down bonding technique, its application are more and more wider.Because electronic product is to higher system
The development of integration density, industry demand can not gradually be met using single chip encapsulation technology, and it is multiple in conventional package
FC chips can not stack, and limit the integrated level of system.
In order to meet the needs of current microelectronics system High Density Integration, need a kind of new FC chip systems of development badly and stack
Fan-out packaging structure.
The content of the invention
The purpose of the present invention is to overcome the deficiencies in the prior art, there is provided a kind of FC chip systems stack and are fanned out to encapsulation
Structure and preparation method thereof, its is compact-sized, can effectively realize the stacked package of FC chips, energy process simplification, improve envelope
Efficiency is filled, securely and reliably.
According to technical scheme provided by the invention, the FC chip systems stack fan-out packaging structure, including by two FC
The stacked package body that chip is formed, the back side of two FC chips is mutually abutted against in stacked package body；In the top of stacked package body
Wiring layer again in setting, wiring layer again under the lower section of stacked package body is set, two corresponding cores of FC chips in stacked package body
Piece salient point respectively with upper wiring layer again, under again wiring layer electrically connect；
Symmetrical perpendicular interconnection pinboard is set in the outside of stacked package body, passes through the through hole in perpendicular interconnection pinboard
Connector respectively with upper wiring layer again, under again wiring layer carry out needed for electrical connection, to realize two FC cores in stacked package body
The transfer of signal interconnection and/or signal exit needed between piece.
The back side of two FC chips is bonded by paster material layer and fixed in the stacked package body.
Upper wiring layer again and under also set up again between wiring layer for stacked package body and perpendicular interconnection pinboard is close
The obturator being integrally connected is sealed, the obturator is located at the outside of perpendicular interconnection pinboard.
Some soldered balls are set on wiring layer again under described, and wiring layer electrically connects the soldered ball again with.
The stacked package body is identical with the height of perpendicular interconnection pinboard.
A kind of FC chip system grades stack the preparation method of fan-out packaging structure, and the preparation method comprises the following steps：
Step 1, the perpendicular interconnection switching disc fixed using prefabricated through hole pitch prepare required perpendicular interconnection pinboard, institute
State to prepare in perpendicular interconnection pinboard and have through hole connector, required upper wiring layer again is prepared on slide glass；
Step 2, perpendicular interconnection pinboard and a FC chip for forming stacked package body be welded on wiring layer again
On, the FC chips are electrically connected with upper wiring layer again, and perpendicular interconnection pinboard is electrically connected by through hole connector and upper wiring layer again
Connect, perpendicular interconnection pinboard is symmetrically distributed in the outside of FC chips；
Step 3, offer form another FC chip of stacked package, and by the FC chips provided and above-mentioned FC chip backs
It is abutted against, the height that two FC chips form stacked package body is identical with the height of perpendicular interconnection pinboard；
Step 4, above-mentioned perpendicular interconnection pinboard and stacked package body are packaged, be prepared it is required under connect up again
Layer, it is described under again wiring layer and upper wiring layer again be located at the both ends of stacked package body respectively, under wiring layer and stacked package body again
Interior another FC chips electrical connection, perpendicular interconnection pinboard is by the way that by connector, wiring layer electrically connects again with；
Step 5, slide glass separated with upper wiring layer again.
Wiring layer is fixed on slide glass by interim bonding film again on described.
In step 3, the back side of two FC chips is bonded by paster material layer to be fixed.
Slide glass is being prepared into required soldered ball again before wiring layer separates again or after separating with upper under on wiring layer, it is described
Wiring layer electrically connects soldered ball again with.
Advantages of the present invention：The stacking of FC chips can be achieved, for the high density collection of the microelectronics system of FC chips be present
Into.The transfer of the signal interconnection and its signal exit between FC chips is realized using the method for side perpendicular interconnection pinboard,
Simplify interconnection mode.The perpendicular interconnection switching disc fixed using prefabricated through hole pitch, according to the electricity of FC chip chambers mutually
Even and signal exit design requirement, interception obtain corresponding perpendicular interconnection pinboard, simplify and secure technical process, improve
Packaging efficiency.
Brief description of the drawings
Fig. 1 ~ Fig. 7 is specific implementation process block diagram of the present invention, wherein
Fig. 1 is the schematic diagram of perpendicular interconnection of the present invention switching disc.
Fig. 2 obtains the sectional view after wiring layer again for the present invention.
Fig. 3 is the present invention by perpendicular interconnection pinboard and FC chips and upper schematic diagram after wiring layer electrically connects again.
Fig. 4 obtains the sectional view after stacked package body for the present invention.
Fig. 5 obtains down the sectional view after wiring layer again for the present invention.
Fig. 6 obtains the sectional view after soldered ball for the present invention.
Fig. 7 is the present invention by slide glass and upper sectional view after wiring layer separates again.
Description of reference numerals：Wiring layer, 4- chip bumps, 5- paster materials again under wiring layer, 3- again on 1-FC chips, 2-
Layer, 6- through holes connector, 7- perpendicular interconnections pinboard, 8- obturators, 9- soldered balls, 10, interim bonding film and 11- slide glasses.
Embodiment
With reference to specific drawings and examples, the invention will be further described.
As shown in Figure 7：In order to effectively realize the stacked package of FC chips, the present invention includes being formed by two FC chips 1
Stacked package body, the back side of two FC chips 1 is mutually abutted against in stacked package body；Set again in the top of stacked package body
Wiring layer 2, wiring layer 3 again under the lower section of stacked package body is set, two 1 corresponding chip bumps of FC chips in stacked package body
4 respectively with upper wiring layer again 2, under again wiring layer 3 electrically connect；
Symmetrical perpendicular interconnection pinboard 7 is set in the outside of stacked package body, by logical in perpendicular interconnection pinboard 7
Hole connector 6 respectively with upper wiring layer again 2, under again wiring layer 3 carry out required electrical connection, to realize in stacked package body two
The transfer of signal interconnection and/or signal exit needed between FC chips 1.
Specifically, stacked package body is formed by two FC chips 1, and two FC chips 1 can have different functional structures
But it is of the same size, the back side of two FC chips 1 is mutually abutted against, i.e., the chip bump 4 of each FC chips 1 is respectively positioned on outside
Side, in order to carry out required electrical connection.When it is implemented, the back side of two FC chips 1 passes through patch in the stacked package body
The bonding of the sheet material bed of material 5 is fixed.Paster material layer 5 can use the material that the art is commonly used, and FC chips 1 pass through paster material
Closed assembly packaging body is formed after the bonding of layer 5 is fixed.
On again wiring layer 2, under again wiring layer 3 be located at the both ends of stacked package body, on wiring layer 3 again with of wiring layer 2 again
Between one or more stacked package bodies can be set, multiple stacked package bodies upper wiring layer again 2 and under be between wiring layer 3 again
It is parallel to each other.Two FC chips 1 in stacked package body by corresponding chip bump 4 and upper wiring layer again 2, under wiring layer again
3 corresponding electrical connections.
In order to realize signal interconnection between FC chips 1 or the transfer of new drug exit, in upper wiring layer again 2 with cloth again
Perpendicular interconnection pinboard 7 is set between line layer 3, and perpendicular interconnection pinboard 7 is located at the outside of stacked package body, perpendicular interconnection switching
Plate 7 and upper wiring layer again 2, under again wiring layer 3 insulate, but the through hole connector 6 in perpendicular interconnection pinboard 7 and upper wiring layer again
2nd, wiring layer 3 is electrically connected again under, and through hole connector 6 can be prepared by TSV techniques.It is prepared according to the actual requirements logical
Hole connector 6, on again wiring layer 2 with again after wiring layer 3, by through hole connector 6 and upper wiring layer again 2, under wiring layer 3 again
Corresponding electrical connection, the transfer of signal interconnection with signal exit required between FC chips 1 in stacked package body can be realized.
Further, upper wiring layer again 2 also set up again between wiring layer 3 with for by stacked package body with it is vertical mutual
Even pinboard 7 is tightly connected integral obturator 8, and the obturator 8 is located at the outside of perpendicular interconnection pinboard 7.
In the embodiment of the present invention, the stacked package body is identical with the height of perpendicular interconnection pinboard 7, passes through obturator 8
Perpendicular interconnection pinboard 7, stacked package body can be sealed in again wiring layer 2 and under again between wiring layer 3, obturator 8 with it is upper
Wiring layer 2 is with after wiring layer 3 links into an integrated entity again again, it is ensured that perpendicular interconnection pinboard 7 connects up again with stacked package body upper
Layer 2 and under the reliability between wiring layer 3 again.In addition, set some soldered balls 9 under described on wiring layer 3 again, the soldered ball 9 with
Under again wiring layer 3 electrically connect, by soldered ball 9 can the convenient cooperation with external circuit or encapsulating structure, realize that required signal is defeated
Enter or export.
As shown in Fig. 1 ~ Fig. 7, above-mentioned FC chip system grades stack fan-out packaging structure, can pass through following processing steps
It is prepared, specifically, the preparation method comprises the following steps：
Step 1, the perpendicular interconnection switching disc fixed using prefabricated through hole pitch prepare required perpendicular interconnection pinboard 7,
Being prepared in the perpendicular interconnection pinboard 7 has through hole connector 6, and required upper wiring layer 2 again are prepared on slide glass 11；
As shown in figure 1, the perpendicular interconnection switching disc fixed for prefabricated through hole pitch, the specific prefabricated perpendicular interconnection that obtains is transferred
The process of disc is that here is omitted known to those skilled in the art.According to the electrical interconnection and signal between FC chips 1
Exit design requirement, the perpendicular interconnection pinboard 7 of corresponding size is intercepted by scribing, obtains the mistake of perpendicular interconnection pinboard 7
Journey is that here is omitted known to those skilled in the art.Through hole connector 6 in perpendicular interconnection pinboard 7 passes through TSV works
Skill is prepared.
According to the electrical interconnection between FC chips 1 and signal exit design requirement, it is prepared by modes such as photoetching
Wiring layer 2 again, on again wiring layer 2 be fixed on by interim bonding film 10 on slide glass 11, as shown in Figure 2.It is specific to prepare on required
The process of wiring layer 2 is that here is omitted known to those skilled in the art again.
Step 2, perpendicular interconnection pinboard 7 and a FC chip 1 for forming stacked package body be welded on again
On wiring layer 2, the FC chips 1 electrically connect with upper wiring layer again 2, perpendicular interconnection pinboard 7 by through hole connector 6 with it is upper again
Wiring layer 2 electrically connects, and perpendicular interconnection pinboard 7 is symmetrically distributed in the outside of FC chips 1；
As shown in figure 3, perpendicular interconnection pinboard 7 and FC chips 1 are welded on again on wiring layer 2, perpendicular interconnection pinboard 7
Positioned at the outside of FC chips 1.The chip bump of the FC chips 1 electrically connects with upper wiring layer again 2.
Step 3, offer form another FC chip 1 of stacked package, and by the FC chips 1 provided and above-mentioned FC cores
The back side of piece 1 is abutted against, and the height that two FC chips 1 form stacked package body is identical with the height of perpendicular interconnection pinboard 7；
As shown in figure 4, another FC chip 1 is passed through into paster material layer 5 and the above-mentioned FC chips 1 being connected with upper wiring layer again 2
Bonding is fixed, so as to form stacked package body.
Step 4, above-mentioned perpendicular interconnection pinboard 7 and stacked package body are packaged, be prepared it is required under
Wiring layer 3 again, it is described under again wiring layer 3 and upper wiring layer again 2 be located at the both ends of stacked package body respectively, under again wiring layer 3 with
Another FC chips 1 in stacked package body electrically connect, and perpendicular interconnection pinboard 7 is by the way that by connector 6, wiring layer 3 is electric again with
Connection；
When it is implemented, under making again before wiring layer 3, the outer of perpendicular interconnection pinboard 7 can be filled in first with obturator 8
Circle, after obturator 8 is set, by the techniques such as photoetching be prepared it is required under wiring layer 3 again, in perpendicular interconnection pinboard 7
Through hole connector 63 points of wiring layer is connected again with, also wiring layer 3 is electrically connected the chip bump 4 of another FC chip 1 again with
Connect, as shown in Figure 5.Due to the through hole connector 6 in perpendicular interconnection pinboard 7, on again wiring layer 2 and under again wiring layer 3 it is equal
According to the Demand Design of the signal interconnection between FC chips 1 and signal exit, accordingly, it is capable to realize required signal interconnection and
The transfer of signal exit.
Step 5, slide glass 11 separated with upper wiring layer again 2.
As shown in Figure 6 and Figure 7, before slide glass 11 is separated with upper wiring layer again 2 or after separating, under again on wiring layer 3
Soldered ball 9 needed for preparing, wiring layer 3 electrically connects the soldered ball 9 again with.Pass through fan-out package and perpendicular interconnection pinboard
7, the stacking of FC chips 1 can be realized, for the High Density Integration of the microelectronics system of multiple FC chips 1 be present.
Although preferred embodiments of the present invention have been described, but those skilled in the art once know basic creation
Property concept, then can make other change and modification to these embodiments.So appended claims be intended to be construed to include it is excellent
Select embodiment and fall into having altered and changing for the scope of the invention.
Obviously, those skilled in the art can carry out the essence of various changes and modification without departing from the present invention to the present invention
God and scope.So, if these modifications and variations of the present invention belong to the scope of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to comprising including these changes and modification.
Claims (9)
1. a kind of FC chip systems stack fan-out packaging structure, it is characterized in that：Including by two FC chips（1）The stacking envelope of formation
Body is filled, two FC chips in stacked package body（1）The back side be mutually abutted against；Wiring layer again is set in the top of stacked package body
（2）, wiring layer again under the lower section of stacked package body is set（3）, two FC chips in stacked package body（1）Corresponding chip bump
（4）Respectively with upper wiring layer again（2）, under wiring layer again（3）Electrical connection；
Symmetrical perpendicular interconnection pinboard is set in the outside of stacked package body（7）, pass through perpendicular interconnection pinboard（7）It is interior
Through hole connector（6）Respectively with upper wiring layer again（2）, under wiring layer again（3）Electrical connection needed for carrying out, envelope is stacked to realize
Fill internal two FC chips（1）Between needed for signal interconnection and/or signal exit transfer.
2. FC chip systems according to claim 1 stack fan-out packaging structure, it is characterized in that：In the stacked package body
Two FC chips（1）The back side pass through paster material layer（5）Bonding is fixed.
3. FC chip systems according to claim 1 stack fan-out packaging structure, it is characterized in that：In upper wiring layer again（2）
The wiring layer again with（3）Between also set up for by stacked package body and perpendicular interconnection pinboard（7）It is tightly connected filling out for one
Fill body（8）, the obturator（8）Positioned at perpendicular interconnection pinboard（7）Outside.
4. FC chip systems according to claim 1 stack fan-out packaging structure, it is characterized in that：Wiring layer again under described
（3）It is upper that some soldered balls are set（9）, the soldered ball（9）The wiring layer again with（3）Electrical connection.
5. FC chip systems according to claim 1 stack fan-out packaging structure, it is characterized in that：The stacked package body with
Perpendicular interconnection pinboard（7）Height it is identical.
6. a kind of FC chip system grades stack the preparation method of fan-out packaging structure, it is characterized in that, the preparation method is included such as
Lower step：
Step 1, the perpendicular interconnection switching disc fixed using prefabricated through hole pitch prepare required perpendicular interconnection pinboard
（7）, the perpendicular interconnection pinboard（7）Interior preparation has through hole connector（6）, in slide glass（11）Upper needed for upper preparation connects up again
Layer（2）；
Step 2, by perpendicular interconnection pinboard（7）And for forming a FC chip of stacked package body（1）It is welded on again
Wiring layer（2）On, the FC chips（1）With upper wiring layer again（2）Electrical connection, perpendicular interconnection pinboard（7）Connected by through hole
Body（6）With upper wiring layer again（2）Electrical connection, perpendicular interconnection pinboard（7）It is symmetrically distributed in FC chips（1）Outside；
Step 3, offer form another FC chip of stacked package（1）, and the FC chips that will be provided（1）With above-mentioned FC cores
Piece（1）The back side is abutted against, two FC chips（1）Form the height and perpendicular interconnection pinboard of stacked package body（7）Height it is identical；
Step 4, to above-mentioned perpendicular interconnection pinboard（7）And stacked package body is packaged, be prepared it is required under again
Wiring layer（3）, it is described under wiring layer again（3）With upper wiring layer again（2）Be located at the both ends of stacked package body respectively, under wiring layer again
（3）With another FC chips in stacked package body（1）Electrical connection, perpendicular interconnection pinboard（7）By passing through connector（6）With under
Wiring layer again（3）Electrical connection；
Step 5, by slide glass（11）With upper wiring layer again（2）Separation.
7. according to claim 6 FC chip system grades stack fan-out packaging structure preparation method, it is characterized in that, it is described on
Wiring layer again（2）Pass through interim bonding film（10）It is fixed on slide glass（11）On.
8. FC chip system grades stack the preparation method of fan-out packaging structure according to claim 6, it is characterized in that, step 3
In, two FC chips（1）The back side pass through paster material layer（5）Bonding is fixed.
9. FC chip system grades stack the preparation method of fan-out packaging structure according to claim 6, it is characterized in that, it will carry
Piece（11）With upper wiring layer again（2）Before separation or after separation, the wiring layer again under（3）Soldered ball needed for upper preparation（9）, the weldering
Ball（9）The wiring layer again with（3）Electrical connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710831123.3A CN107634049A (en) | 2017-09-15 | 2017-09-15 | FC chip systems stack fan-out packaging structure and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710831123.3A CN107634049A (en) | 2017-09-15 | 2017-09-15 | FC chip systems stack fan-out packaging structure and preparation method thereof |
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| Publication Number | Publication Date |
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| CN107634049A true CN107634049A (en) | 2018-01-26 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201710831123.3A Pending CN107634049A (en) | 2017-09-15 | 2017-09-15 | FC chip systems stack fan-out packaging structure and preparation method thereof |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111883521A (en) * | 2020-07-13 | 2020-11-03 | 矽磐微电子(重庆)有限公司 | Multi-chip 3D packaging structure and manufacturing method thereof |
| CN113270325A (en) * | 2021-04-26 | 2021-08-17 | 青岛歌尔智能传感器有限公司 | Manufacturing method of packaging structure |
| CN113571435A (en) * | 2021-07-02 | 2021-10-29 | 矽磐微电子(重庆)有限公司 | Method for forming chip packaging structure |
| WO2021253225A1 (en) * | 2020-06-16 | 2021-12-23 | 广东省科学院半导体研究所 | Chip packaging structure and method |
| WO2022012511A1 (en) * | 2020-07-13 | 2022-01-20 | 矽磐微电子(重庆)有限公司 | Semiconductor packaging method and semiconductor packaging structure |
| WO2024007440A1 (en) * | 2022-07-08 | 2024-01-11 | 华天科技（昆山）电子有限公司 | High-density 3d stacked fan-out packaging structure and manufacturing method therefor |
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| WO2024007440A1 (en) * | 2022-07-08 | 2024-01-11 | 华天科技（昆山）电子有限公司 | High-density 3d stacked fan-out packaging structure and manufacturing method therefor |
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