CN107622999A - ESD protection circuit - Google Patents
ESD protection circuit Download PDFInfo
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- CN107622999A CN107622999A CN201610561689.4A CN201610561689A CN107622999A CN 107622999 A CN107622999 A CN 107622999A CN 201610561689 A CN201610561689 A CN 201610561689A CN 107622999 A CN107622999 A CN 107622999A
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Abstract
The invention discloses a kind of ESD protection circuit, the ESD protection circuit is connected between one first wafer and one second wafer, and first wafer includes silicon hole, and second wafer includes internal die circuitry, including：Resistance-variable storing device, anti-static component and switch control unit.The ESD protection circuit that the present invention is made up of switch control unit, anti-static component and resistance-variable storing device can be good at realizing static discharge process, protect integrated circuit；Moreover, after the completion of static discharge, control resistance-variable storing device to be in high-impedance state by switch control unit, ESD protection circuit and integrated circuit can be disconnected completely, the ghost effect of ESD protection circuit thoroughly be eliminated, to improve electrostatic protection ability.
Description
Technical field
The present invention relates to Integrated circuit electrostatic protecting circuit designed field, more particularly to a kind of ESD protection circuit.
Background technology
Increasing with the scale of system integrated chip, three dimensional integrated circuits (3DIC) has turned into realizes necessary collect
Into the feasible alternative circuit of density.Widely used silicon hole (Through Silicon Via, TSV) is realized vertical mutual in 3DIC
Even.However, in 3DIC manufacturing processes, when the plain conductor of the wafer and another wafer in each stack layer with TSV mutually interconnects
When connecing, the wafer with TSV is often subjected to mechanical thinning process, with factors such as mechanical frictions, in the wafer with TSV
On will produce corresponding electrostatic charge, then, when each stack layer is combined, accumulating on the electrostatic charge of each stack layer will flow simultaneously
It is dynamic and produce high current in a flash, form high current peak value and release time short electric discharge behavior.Because the voltage of electrostatic is very high,
ESD (Electro-Static discharge, static discharge) can bring destructive consequence to 3DIC, cause integrated circuit
Failure.Therefore, in order to protect integrated circuit to exempt from ESD infringement, esd protection circuit should be designed in integrated circuit simultaneously, with
Prevent integrated circuit from being damaged because by ESD.
In the prior art, corresponding esd protection circuit is by a series of resistance, diode and a pnp bipolar junction transistor
Composition.But the esd protection circuit has delay in electric discharge, and can produce ghost effect, including parasitic capacitance and/or
Stray inductance, reduce the ability of electrostatic protection.
Therefore, for above-mentioned technical problem, it is necessary to propose a kind of improved ESD protection circuit.
The content of the invention
The problem to be solved in the present invention is to provide a kind of ESD protection circuit, can effectively improve static discharge guarantor
Shield ability, eliminate parasitic capacitance and/or stray inductance caused by ESD protection circuit.
In order to solve the above technical problems, ESD protection circuit provided by the invention, the ESD protection circuit
It is connected between one first wafer and one second wafer, first wafer includes silicon hole, and second wafer includes interior
Portion's chip circuit, including：
First module, the first module include one first resistance-variable storing device and one first anti-static component, and described first
The first end of resistance-variable storing device connects the first end of first anti-static component；
Second unit, the second unit include one second resistance-variable storing device and one second anti-static component, and described second
The first end of resistance-variable storing device connects the first end of second anti-static component, the second termination of second anti-static component
Ground；
Switch control unit, one end of the switch control unit connect the first anti-static component in the first module
Second end；
Second resistance-variable storing device in second end of the first resistance-variable storing device and the second unit in the first module
Second end is connected with the silicon hole and internal die circuitry.
Further, during the first wafer static discharge, switch control unit control first resistance
Transition storage and second resistance-variable storing device are in low resistance state, described quiet when the first wafer static electrification positive charge
Electric positive charge is discharged by the second unit；When the first wafer static electrification negative electrical charge, the electrostatic negative charge passes through
The first module release.
Further, after the completion of the first wafer static discharge, switch control unit control first resistance
Transition storage and second resistance-variable storing device are in high-impedance state, the ESD protection circuit and first wafer and the
Two wafers disconnect.
Optionally, first anti-static component is a diode, grounded-grid NMOS tube, bipolar junction transistor and can
Control any one in silicon.
Preferably, first anti-static component is one first diode, described in the negative pole connection of first diode
The first end of first resistance-variable storing device, the positive pole of first diode are connected with the switch control unit.
Optionally, second anti-static component is a diode, grounded-grid NMOS tube, bipolar junction transistor and can
Control any one in silicon.
Preferably, second anti-static component is one second diode, described in the positive pole connection of second diode
The first end of second resistance-variable storing device, the negative pole ground connection of second diode.
Further, the switch control unit includes a PMOS, a NMOS tube, a control voltage end, an external electricity
Pressure side, the grid of the PMOS are connected with the grid of the NMOS tube, connect the control voltage end；The source of the PMOS
Pole is connected with the source electrode of the NMOS tube, connects first anti-static component；The grounded drain of the PMOS, the NMOS
The drain electrode of pipe connects the external voltage end.
Further, when the first wafer static electrification positive charge, the control voltage end of the switch control unit
Voltage is low potential, and the electrostatic positive charge is discharged by second resistance-variable storing device, the second anti-static component.
Further, when the first wafer static electrification negative electrical charge, the control voltage end of the switch control unit
Voltage is low potential, and the electrostatic negative charge passes through first resistance-variable storing device, the first anti-static component and the PMOS
Release.
Further, after the completion of the first wafer static discharge, the control voltage end of the switch control unit
Voltage is high potential.
Compared with prior art, the invention has the advantages that：
In the ESD protection circuit of the present invention, the ESD protection circuit includes first module, the second list
Member and switch control unit, the first module include one first resistance-variable storing device and one first anti-static component, and described the
The first end of one resistance-variable storing device connects the first end of first anti-static component；The second unit includes one second resistive
Memory and one second anti-static component, the first end of second resistance-variable storing device connect the of second anti-static component
One end, the second end ground connection of second anti-static component；One end of the switch control unit is connected in the first module
Second end of the first anti-static component；In the first module in the second end of the first resistance-variable storing device and the second unit
Second end of two resistance-variable storing devices is connected with the silicon hole and internal die circuitry.Using the switch control unit, prevent
The ESD protection circuit of electrostatic element and resistance-variable storing device composition, has resistance low resistance state and height using resistance-variable storing device
The characteristic (i.e. resistance switch characteristic) of resistance state, with reference to static discharge voltage it is very high the characteristics of, during static discharge, pass through institute
State switch control unit control resistance-variable storing device and be in low resistance state, can be good at realizing static discharge process, protect integrated electricity
Road.Moreover, after the completion of static discharge, resistance-variable storing device is controlled to be in high-impedance state by the switch control unit, can be complete
The ESD protection circuit and integrated circuit are disconnected entirely, thoroughly eliminate the ghost effect of ESD protection circuit, with
Improve electrostatic protection ability.
Brief description of the drawings
Fig. 1 is the structural representation of ESD protection circuit in one embodiment of the invention；
Fig. 2 a- Fig. 2 b are current direction schematic diagram during the static discharge of the ESD protection circuit of the present invention；
Fig. 3 a- Fig. 3 b are the structural representation after the completion of the static discharge of the ESD protection circuit of the present invention.
Embodiment
ESD protection circuit of the present invention is described in more detail below in conjunction with schematic diagram, which show this
The preferred embodiment of invention, it should be appreciated that those skilled in the art can change invention described herein, and still realize this
The advantageous effects of invention.Therefore, description below is appreciated that for the widely known of those skilled in the art, and is not made
For limitation of the present invention.
More specifically description is of the invention by way of example referring to the drawings in the following passage.Will according to following explanation and right
Book is sought, advantages and features of the invention will become apparent from.It should be noted that accompanying drawing is using very simplified form and using non-
Accurately ratio, only for the purpose of facilitating and clarifying the purpose of the embodiments of the invention.
The core concept of the present invention is that the present invention provides a kind of ESD protection circuit, the electrostatic discharge (ESD) protection
It is electrically connected between one first wafer and one second wafer, first wafer includes silicon hole, the second wafer bag
Containing internal die circuitry, it is characterised in that including：First module, the first module include one first resistance-variable storing device and one
First anti-static component, the first end of first resistance-variable storing device connect the first end of first anti-static component；
Second unit, the second unit include one second resistance-variable storing device and one second anti-static component, and described second
The first end of resistance-variable storing device connects the first end of second anti-static component, the second termination of second anti-static component
Ground；
Switch control unit, one end of the switch control unit connect the first anti-static component in the first module
Second end；
Second resistance-variable storing device in second end of the first resistance-variable storing device and the second unit in the first module
Second end is connected with the silicon hole and internal die circuitry.
The present invention is using the switch control unit, anti-static component and resistance-variable storing device composition electrostatic discharge (ESD) protection electricity
Road, there is the characteristic of resistance low resistance state and high-impedance state (i.e. resistance switch characteristic) using resistance-variable storing device, with reference to static discharge electricity
The characteristics of pressure is very high, during static discharge, resistance-variable storing device is controlled to be in low resistance state, energy by the switch control unit
Enough static discharge processes for realizing first wafer well, protect integrated circuit.Moreover, put in the first wafer electrostatic
After the completion of electricity, resistance-variable storing device is controlled to be in high-impedance state by the switch control unit, can be completely by the static discharge
Protection circuit disconnects with integrated circuit, the ghost effect of ESD protection circuit is thoroughly eliminated, to improve electrostatic protection ability.
The embodiment of the ESD protection circuit is exemplified below, with clear explanation present disclosure, it should be clearly that
, present disclosure is not restricted to following examples, and other pass through the routine techniques hand of those of ordinary skill in the art
Section is improved also within the thought range of the present invention.
Referring to Fig. 1, the structural representation of the ESD protection circuit for the embodiment of the present invention, the static discharge is protected
Protection circuit is connected between one first wafer 0 and one second wafer 2, and first wafer 0 includes silicon hole, and described second is brilliant
Circle 2 includes internal die circuitry, specifically includes：
First module 11, the first module 11 include one first resistance-variable storing device 111 and one first anti-static component, institute
It can be any in a diode, grounded-grid NMOS tube, bipolar junction transistor and controllable silicon to state the first anti-static component
One kind, preferably, the first anti-static component described in the present embodiment is one first diode 112, first resistance-variable storing device
111 first end connects the negative pole of first diode 112；
Second unit 12, the second unit 12 include one second resistance-variable storing device 121 and one second anti-static component, institute
It can be any in a diode, grounded-grid NMOS tube, bipolar junction transistor and controllable silicon to state the second anti-static component
One kind, preferably, the second anti-static component described in the present embodiment is one second diode 122, second resistance-variable storing device
121 first end connects the positive pole of second diode 122, the negative pole ground connection of second diode 122；
Switch control unit 13, switch control unit 13 described in the present embodiment include a PMOS 131, a NMOS tube
132nd, an a control voltage end V and external voltage end Vset, the grid of the PMOS 131 and the grid of the NMOS tube 132
It is connected, connects the control voltage end V；The source electrode of the PMOS 131 is connected with the source electrode of the NMOS tube 132, connects institute
State the positive pole of the first diode 112；The grounded drain of the PMOS 131, the drain electrode connection of the NMOS tube 132 are described external
Voltage end Vset；Second resistive in second end of the first resistance-variable storing device 111 and the second unit 12 in the first module 11
Second end of memory 121 is connected with the wafer 2 of the first wafer 0 and second.
The operation principle of the ESD protection circuit of the present invention is described further below, so as to more clear explanation
Present disclosure.
When first wafer 0 is during static discharge：
Fig. 2 a are referred to, when the 0 static electrification positive charge of the first wafer, the discharge voltage of the electrostatic positive charge is very high
(up to upper kilovolt), is low potential V by the control voltage end V of the switch control unit 13 voltage controllow, i.e., it is described
PMOS 131 is turned on, and the NMOS tube 132 is not turned on, then second resistance-variable storing device 121 will be located under electrostatic high voltage
In resistance low resistance state (such as：Resistance about tens or hundreds of Europe), then, it will be formed such as in the ESD protection circuit
Current direction in figure shown in dotted arrow, i.e., described electrostatic positive charge pass through second resistance-variable storing device 121, the two or two pole
Pipe 122 discharges completely；
As shown in Figure 2 b, when the 0 static electrification negative electrical charge of the first wafer, equally, by the switch control unit 13
Control voltage end V voltage control is low potential Vlow, i.e., described PMOS 131 turned on, and the NMOS tube 132 is not turned on, then institute
State the first resistance-variable storing device 111 and resistance low resistance state is under electrostatic high voltage, so, the electrostatic negative charge can be by described
First resistance-variable storing device 111, the first diode 112 and PMOS 131 discharge completely, and the static discharge process is dashed lines
Shown in arrow.
Therefore, when first wafer 0 is during static discharge, the discharge voltage of the electrostatic charge is very high, by institute
The voltage control for stating the control voltage end V of switch control unit 13 is low potential Vlow, i.e., described PMOS 131 turns on, described
NMOS tube 132 is not turned on, then the resistance-variable storing device 121 of the first resistance-variable storing device 111 or second would be at resistance low-resistance
State, the electrostatic charge will be discharged completely by the ESD protection circuit.Therefore, the present invention is controlled by the switch
The ESD protection circuit of unit 13, anti-static component and resistance-variable storing device composition can be good at realizing static discharge mistake
Journey, protect integrated circuit.
After the completion of the static discharge of the first wafer 0：
First wafer 0 and second wafer 2 are combined, as shown in Figure 3 a, by the switch control unit 13
Control voltage end V voltage control is high potential Vhigh, i.e., described PMOS 131 is not turned on, and the NMOS tube 132 turns on, this
When, due to there is external voltage end VsetVoltage exist, have instantaneous electric current (current direction is as indicated by a dashed arrow in the figure) from
NMOS tube 132, which enters, flows through the first diode 112, the first resistance-variable storing device 111, the second resistance-variable storing device 121 and the two or two pole
Pipe 122.However, the external voltage end V by controlling the switch control unit 13setVoltage, described first can be made
The resistance-variable storing device 121 of resistance-variable storing device 111 and second is in resistance high-impedance state (such as：Resistance is more than tens megaohms), then it is described
ESD protection circuit is fully disconnected with the wafer 2 of the first wafer 0 and second, as shown in Figure 3 b.
Therefore, after the completion of the static discharge of the first wafer 0, controlled by the switch of the ESD protection circuit
Unit 13 can realize that the resistance-variable storing device 121 of the first resistance-variable storing device 111 and second is changed into high-impedance state from low resistance state
Process, finally, the ESD protection circuit is fully disconnected with the wafer 2 of the first wafer 0 and second, thoroughly eliminate quiet
The ghost effect of discharge of electricity protection circuit, to improve electrostatic protection ability.
In addition, when carrying out electrostatic discharge (ESD) protection to integrated circuit again if necessary to the ESD protection circuit,
The ESD protection circuit of the present invention is can be by the voltage at the external voltage end for controlling the switch control unit
To realize resistance-variable storing device from the process of high-impedance state recurrence low resistance state.The realization of the process is itself based on resistance-variable storing device
Characteristic, be one of ordinary skill in the art will appreciate that, therefore not to repeat here.
To sum up, in the ESD protection circuit of the present invention, the ESD protection circuit includes first module, the
Unit two and switch control unit, the first module include one first resistance-variable storing device and one first anti-static component, institute
The first end for stating the first resistance-variable storing device connects the first end of first anti-static component；The second unit includes one second
Resistance-variable storing device and one second anti-static component, the first end of second resistance-variable storing device connect second anti-static component
First end, second anti-static component the second end ground connection；One end connection described first of the switch control unit is single
Second end of the first anti-static component in member；Second end of the first resistance-variable storing device and the second unit in the first module
In the second end of the second resistance-variable storing device be connected with the silicon hole and internal die circuitry.It is single using the switch control
Member, anti-static component and resistance-variable storing device composition ESD protection circuit, have resistance low resistance state using resistance-variable storing device
With the characteristic (i.e. resistance switch characteristic) of high-impedance state, with reference to static discharge voltage it is very high the characteristics of, during static discharge, lead to
Cross the switch control unit control resistance-variable storing device and be in low resistance state, can be good at realizing that the electrostatic of first wafer is put
Electric process, protect integrated circuit.Moreover, after the completion of the first wafer static discharge, pass through the switch control unit control
Resistance-variable storing device processed is in high-impedance state, completely can disconnect the ESD protection circuit and integrated circuit, thoroughly eliminate
The ghost effect of ESD protection circuit, to improve electrostatic protection ability.
Although the present invention is disclosed as above with preferred embodiment, it is not for limiting the present invention, any this area
Technical staff without departing from the spirit and scope of the present invention, may be by the methods and technical content of the disclosure above to this hair
Bright technical scheme makes possible variation and modification, therefore, every content without departing from technical solution of the present invention, according to the present invention
Any simple modifications, equivalents, and modifications made to above example of technical spirit, belong to technical solution of the present invention
Protection domain.
Claims (11)
1. a kind of ESD protection circuit, the ESD protection circuit be connected to one first wafer and one second wafer it
Between, first wafer includes silicon hole, and second wafer includes internal die circuitry, it is characterised in that including：
First module, the first module include one first resistance-variable storing device and one first anti-static component, first resistive
The first end of memory connects the first end of first anti-static component；
Second unit, the second unit include one second resistance-variable storing device and one second anti-static component, second resistive
The first end of memory connects the first end of second anti-static component, the second end ground connection of second anti-static component；
Switch control unit, one end of the switch control unit connect second of the first anti-static component in the first module
End；
In the first module in the second end of the first resistance-variable storing device and the second unit the second resistance-variable storing device second
End is connected with the silicon hole and internal die circuitry.
2. ESD protection circuit as claimed in claim 1, it is characterised in that：In the first wafer static discharge process
In, the switch control unit controls first resistance-variable storing device and second resistance-variable storing device to be in low resistance state, when
During the first wafer static electrification positive charge, the electrostatic positive charge is discharged by the second unit；When first wafer
During static electrification negative electrical charge, the electrostatic negative charge is discharged by the first module.
3. ESD protection circuit as claimed in claim 1, it is characterised in that：Completed in the first wafer static discharge
Afterwards, the switch control unit controls first resistance-variable storing device and second resistance-variable storing device to be in high-impedance state, described
ESD protection circuit disconnects with first wafer and the second wafer.
4. the ESD protection circuit as described in any one in claim 1-3, it is characterised in that：First antistatic
Element is any one in a diode, grounded-grid NMOS tube, bipolar junction transistor and controllable silicon.
5. ESD protection circuit as claimed in claim 4, it is characterised in that：First anti-static component is one first
Diode, the negative pole of first diode connect the first end of first resistance-variable storing device, and first diode is just
Pole is connected with the switch control unit.
6. the ESD protection circuit as described in any one in claim 1-3, it is characterised in that：Second antistatic
Element is any one in a diode, grounded-grid NMOS tube, bipolar junction transistor and controllable silicon.
7. ESD protection circuit as claimed in claim 6, it is characterised in that：Second anti-static component is one second
Diode, the positive pole of second diode connect the first end of second resistance-variable storing device, and second diode is born
Pole is grounded.
8. the ESD protection circuit as described in any one in claim 1-3, it is characterised in that：The switch control is single
Member includes a PMOS, a NMOS tube, a control voltage end, an external voltage end, the grid of the PMOS and the NMOS
The grid of pipe is connected, and connects the control voltage end；The source electrode of the PMOS is connected with the source electrode of the NMOS tube, connects institute
State the first anti-static component；The grounded drain of the PMOS, the drain electrode of the NMOS tube connect the external voltage end.
9. ESD protection circuit as claimed in claim 8, it is characterised in that：When the first wafer static electrification positive charge
When, the voltage at the control voltage end of the switch control unit is low potential, and the electrostatic positive charge passes through second resistive
Memory, the release of the second anti-static component.
10. ESD protection circuit as claimed in claim 8, it is characterised in that：When the first wafer static electrification negative electricity
During lotus, the voltage at the control voltage end of the switch control unit is low potential, and the electrostatic negative charge hinders by described first
Transition storage, the first anti-static component and PMOS release.
11. ESD protection circuit as claimed in claim 8, it is characterised in that：It is complete in the first wafer static discharge
Cheng Hou, the voltage at the control voltage end of the switch control unit is high potential.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610561689.4A CN107622999B (en) | 2016-07-15 | 2016-07-15 | Electrostatic discharge protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610561689.4A CN107622999B (en) | 2016-07-15 | 2016-07-15 | Electrostatic discharge protection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107622999A true CN107622999A (en) | 2018-01-23 |
| CN107622999B CN107622999B (en) | 2020-06-02 |
Family
ID=61087584
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610561689.4A Active CN107622999B (en) | 2016-07-15 | 2016-07-15 | Electrostatic discharge protection circuit |
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| Country | Link |
|---|---|
| CN (1) | CN107622999B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050088794A1 (en) * | 2003-10-23 | 2005-04-28 | International Business Machines Corporation | Removeable ESD for improving I/O pin bandwidth |
| CN103187416A (en) * | 2011-12-30 | 2013-07-03 | 财团法人工业技术研究院 | Integrated circuit with element charging mode electrostatic discharge protection |
| CN104218552A (en) * | 2013-05-31 | 2014-12-17 | 中国科学院微电子研究所 | Overvoltage and overcurrent protection element and overvoltage and overcurrent protection circuit |
| CN104737288A (en) * | 2012-10-05 | 2015-06-24 | 高通股份有限公司 | Electrostatic protection for stacked multi-chip integrated circuits |
-
2016
- 2016-07-15 CN CN201610561689.4A patent/CN107622999B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050088794A1 (en) * | 2003-10-23 | 2005-04-28 | International Business Machines Corporation | Removeable ESD for improving I/O pin bandwidth |
| CN103187416A (en) * | 2011-12-30 | 2013-07-03 | 财团法人工业技术研究院 | Integrated circuit with element charging mode electrostatic discharge protection |
| CN104737288A (en) * | 2012-10-05 | 2015-06-24 | 高通股份有限公司 | Electrostatic protection for stacked multi-chip integrated circuits |
| CN104218552A (en) * | 2013-05-31 | 2014-12-17 | 中国科学院微电子研究所 | Overvoltage and overcurrent protection element and overvoltage and overcurrent protection circuit |
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|---|---|
| CN107622999B (en) | 2020-06-02 |
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