CN107608844B - Method, system and device for testing hardware and computer readable storage medium - Google Patents
Method, system and device for testing hardware and computer readable storage medium Download PDFInfo
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Abstract
本申请公开了一种硬件测试的方法，包括：获取在预设PVT场景下测试硬件得到的实际信号质量；根据该实际信号质量对仿真工具进行最优设置得到最优仿真工具；利用最优仿真工具模拟极限PVT场景对硬件进行仿真测试，得到极限仿真信号质量；将该极限仿真信号质量作为实际信号质量的极限值。该方法通过根据预设PVT场景下的实际信号质量来对仿真工具进行最优设置，利用最优仿真工具模拟极限PVT场景对硬件进行仿真测试，来代替构建极限PVT场景进行硬件信号质量测试，能够减少硬件测试过程中所需要的测试样本，而且不需要构建极限场景。本申请同时还提供了一种硬件测试的系统、装置及计算机可读存储介质具有上述有益效果。
The present application discloses a method for hardware testing, comprising: obtaining actual signal quality obtained by testing hardware under a preset PVT scenario; performing optimal settings on a simulation tool according to the actual signal quality to obtain an optimal simulation tool; using the optimal simulation The tool simulates the extreme PVT scenario to simulate and test the hardware, and obtains the extreme simulated signal quality; the extreme simulated signal quality is regarded as the limit value of the actual signal quality. In the method, the simulation tool is optimally set according to the actual signal quality in the preset PVT scene, and the optimal simulation tool is used to simulate the extreme PVT scene to simulate the hardware, instead of constructing the extreme PVT scene to test the hardware signal quality. Reduce the number of test samples required during hardware testing and eliminate the need to build extreme scenarios. The present application also provides a system, device and computer-readable storage medium for hardware testing, which have the above beneficial effects.
Description
Technical Field
The present disclosure relates to the field of hardware testing, and in particular, to a method, a system, an apparatus, and a computer readable storage medium for hardware testing.
Background
With the advent of the big data age, the requirements of customers on the performance of storage products and the stable operation of systems are higher and higher. The reliability of the hardware system design is the basis of the reliability of the whole system, and the improvement of the reliability of the hardware design can effectively reduce the operation difficulty of a software fault-tolerant mechanism and obviously improve the code operation efficiency. The main factor affecting the reliability of the hardware design is the variation of the Process Voltage Temperature (PVT) corner, and in order to ensure the reliability of the hardware design, a limit PVT scenario is constructed in the hardware test acceptance stage to perform the related hardware signal quality test, however, a lot of test samples are required. Meanwhile, the construction of the limit scene is limited by various material resources, and the full coverage of the limit scene is difficult to achieve.
Therefore, how to reduce the test samples required in the hardware testing process while ensuring the reliability of the hardware design is a technical problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The invention aims to provide a method, a system, a device and a computer readable storage medium for testing hardware, wherein the method can ensure the reliability of hardware design and reduce test samples required in the hardware testing process.
In order to solve the above technical problem, the present application provides a method for testing hardware, including:
acquiring actual signal quality obtained by testing hardware under a preset PVT scene;
carrying out optimal setting on the simulation tool according to the actual signal quality to obtain an optimal simulation tool;
simulating a limit PVT scene by using the optimal simulation tool to perform simulation test on the hardware to obtain the quality of a limit simulation signal; wherein the number of extreme PVT scenarios is at least two;
and taking the limit simulation signal quality as a limit value of the actual signal quality.
Optionally, optimally setting the simulation tool according to the actual signal quality to obtain an optimal simulation tool, including:
correspondingly setting each simulation tool according to each simulation parameter;
simulating the preset PVT scene by using each simulation tool to perform the simulation test on the hardware, and correspondingly obtaining the quality of each simulation signal;
and selecting the simulation tool corresponding to the simulation signal quality closest to the actual signal quality as the optimal simulation tool.
Optionally, the method further includes:
calculating the maximum difference value of the limit values of the actual signal quality, and taking the maximum difference value as a protection value;
testing each hardware to be detected to correspondingly obtain each actual signal quality;
sequentially detecting whether the difference value between the actual signal quality and the protection value is greater than a preset standard value or not;
and confirming that the hardware to be detected corresponding to the difference value larger than the preset standard value is qualified hardware.
The present application further provides a system for testing hardware, the system comprising:
the acquisition module is used for acquiring the actual signal quality obtained by testing hardware in a preset PVT scene;
the optimal setting module is used for carrying out optimal setting on the simulation tool according to the actual signal quality to obtain an optimal simulation tool;
the simulation test module is used for simulating a limit PVT scene by using the optimal simulation tool to perform simulation test on the hardware to obtain the quality of a limit simulation signal; wherein the number of extreme PVT scenarios is at least two;
and the determining module is used for taking the limit simulation signal quality as a limit value of the actual signal quality.
Optionally, the optimal setting module includes:
the setting submodule is used for correspondingly setting each simulation tool according to each simulation parameter;
the testing sub-module is used for simulating the preset PVT scene by using each simulation tool to perform the simulation test on the hardware, and correspondingly obtaining the quality of each simulation signal;
and the selection submodule is used for selecting the simulation tool corresponding to the simulation signal quality closest to the actual signal quality as the optimal simulation tool.
The present application further provides a device for testing hardware, the device comprising:
a memory for storing a computer program;
a processor for executing the computer program to achieve obtaining an actual signal quality obtained by testing hardware under a preset PVT scene; carrying out optimal setting on the simulation tool according to the actual signal quality to obtain an optimal simulation tool; simulating a limit PVT scene by using the optimal simulation tool to perform simulation test on the hardware, and correspondingly obtaining the quality of a limit simulation signal; wherein the number of extreme PVT scenarios is at least two; and taking the limit simulation signal quality as a limit value of the actual signal quality.
The present application also provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of the method of hardware testing as described above.
The method for testing the hardware comprises the steps of obtaining actual signal quality obtained by testing the hardware under a preset PVT scene; carrying out optimal setting on the simulation tool according to the actual signal quality to obtain an optimal simulation tool; simulating a limit PVT scene by using an optimal simulation tool to perform simulation test on hardware to obtain the quality of a limit simulation signal; wherein the number of extreme PVT scenarios is at least two; the limit simulated signal quality is taken as the limit value of the actual signal quality.
According to the technical scheme, the simulation tool is optimally set according to the actual signal quality under the preset PVT scene, the optimal simulation tool is used for simulating the limit PVT scene to perform simulation test on hardware, the limit simulation signal quality is obtained, the limit PVT scene is replaced to be constructed to perform hardware signal quality test, test samples required in the hardware test process can be reduced, the limit scene does not need to be constructed, and meanwhile, the full coverage of the limit scene can be achieved. The application also provides a system and a device for testing hardware and a computer readable storage medium, which have the beneficial effects, and are not repeated herein.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a flowchart of a method for testing hardware according to an embodiment of the present disclosure;
FIG. 2 is a flow chart of an actual representation of S102 in the method for testing hardware provided in FIG. 1;
FIG. 3 is a block diagram of a system for testing hardware according to an embodiment of the present disclosure;
FIG. 4 is a block diagram of another system for testing hardware provided in an embodiment of the present application;
fig. 5 is a structural diagram of a hardware testing apparatus according to an embodiment of the present application.
Detailed Description
The core of the application is to provide a method and a system for testing hardware, and the method can reduce test samples required in the hardware testing process while ensuring the reliability of hardware design.
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1, fig. 1 is a flowchart illustrating a method for testing hardware according to an embodiment of the present disclosure.
The method specifically comprises the following steps:
s101: acquiring actual signal quality obtained by testing hardware under a preset PVT scene;
when a processor receives a hardware test instruction, acquiring actual signal quality obtained by testing hardware in a preset PVT scene;
the preset PVT scenario mentioned here is a PVT scenario preset by a user, for example, the PVT conditions and ranges of the application scenario may be: p (manufacturing process) is mainly PCB impedance, the design center value is 50 omega, the allowable tolerance is +/-10%, the design value of V (voltage) is 5V +/-10%, and the range of T (temperature) is 0-50 ℃;
optionally, the number of the preset PVT scenes may be one or multiple, theoretically, the number of the preset PVT scenes is more, and the simulation test result is more accurate.
S102: carrying out optimal setting on the simulation tool according to the actual signal quality to obtain an optimal simulation tool;
when the actual signal quality of the hardware is obtained, optimally setting the simulation tool according to the actual signal quality to obtain an optimal simulation tool;
optionally, the simulation and test results may be subjected to iteration, which is to compare the simulation results and the actual measurement results in the same scene and under the set conditions, and iteratively optimize the simulation setting according to the comparison result, so as to improve the simulation precision, and perform optimal setting according to the optimal simulation parameters to obtain an optimal simulation tool;
for example, three scenes (P50 Ω, V5V, T25 ℃), (P50 Ω, V4.5V, T25 ℃), (P50 Ω, V5.5V, T25 ℃) and (120 mv, with actual signal quality of 100mv, 80mv and 120mv, are selected for testing. Then, three scene conditions of (P ═ 50 Ω, V ═ 5V, T ℃), (P ═ 50 Ω, V ═ 4.5V, T ℃), (P ═ 50 Ω, V ═ 5.5V, T ℃), (T ═ 25 ℃) are constructed in a simulation tool for comparative simulation, and two sets of different parameters of parameter 1 and parameter 2 are respectively used for simulation, so that two sets of simulated signal quality are obtained: (95mv, 75mv, 115mv) and (98mv, 78mv, 118mv), then parameter 2 is the optimal simulation parameter, and the optimal simulation tool is obtained by performing the optimal setting according to parameter 2.
S103: simulating a limit PVT scene by using the optimal simulation tool to perform simulation test on the hardware to obtain the quality of a limit simulation signal;
setting each condition of a limit PVT scene in the optimal simulation tool, so that the optimal simulation tool simulates the limit PVT scene according to each condition to perform simulation test on the hardware, and obtaining the quality of a limit simulation signal;
for example, traversal simulation is performed on 8 kinds of limit PVT scenes obtained by permutation and combination of three limit conditions, i.e., (45 Ω, 55 Ω), V (4.5V,5.5V), and T (0 ℃, 50 ℃), respectively, to obtain a limit simulation signal quality, where the maximum value of the limit simulation signal quality is 128mv, and the minimum value is 68 mv.
S104: the limit simulated signal quality is taken as the limit value of the actual signal quality.
The limit simulated signal quality is taken as a limit value of the actual signal quality, for example 128mv is taken as a maximum limit value of the actual signal quality and 68mv is taken as a minimum limit value of the actual signal quality;
optionally, after the limit value of the actual signal quality is determined, the maximum difference value of the limit values of the actual signal quality may be calculated first, the maximum difference value is used as a protection value, then each actual signal quality is obtained by testing each hardware to be detected correspondingly, then whether the difference value between each actual signal quality and the protection value is greater than a preset standard value is detected in sequence, and finally the hardware to be detected corresponding to the difference value greater than the preset standard value is determined as qualified hardware;
for example, the maximum difference 128-68 of the limit value of the actual signal quality is calculated to be 60mv, that is, the protection value is 60mv, then 3 pieces of hardware to be tested are tested to obtain the actual signal qualities of 96mv, 66mv and 36mv respectively, after the protection value is subtracted by 60mv, the results are 36mv, 6mv and 24mv respectively, then it can be determined that the system has at least 6mv of actual signal quality margin when the test sample with the actual signal quality of 96mv runs, the requirement of stable running can be completely met, and the test sample passes the test.
Based on the technical scheme, the method for testing the hardware provided by the application optimally sets the simulation tool according to the actual signal quality under the preset PVT scene, utilizes the optimal simulation tool to simulate the limit PVT scene to perform simulation test on the hardware to obtain the limit simulation signal quality, replaces the limit PVT scene to be constructed to perform hardware signal quality test, can reduce test samples required in the hardware testing process, does not need to construct the limit scene, and can simultaneously achieve full coverage of the limit scene.
Referring to fig. 2, fig. 2 is a flowchart illustrating an actual representation of S102 in the method for testing hardware provided in fig. 1.
The present embodiment is directed to S102 of the previous embodiment, and a description is made of a specific implementation manner of the content described in S102, where the following is a flowchart shown in fig. 2, and the flowchart specifically includes the following steps:
s201: correspondingly setting each simulation tool according to each simulation parameter;
for example, a first simulation tool may be set based on a first set of parameters, a second simulation tool may be set based on a second set of parameters, and so on.
S202: simulating a preset PVT scene by using each simulation tool to perform simulation test on hardware, and correspondingly obtaining the quality of each simulation signal;
s203: and selecting the simulation tool corresponding to the simulation signal quality closest to the actual signal quality as the optimal simulation tool.
Referring to fig. 3, fig. 3 is a block diagram of a hardware testing system according to an embodiment of the present disclosure.
The system may include:
an obtaining module 100, configured to obtain actual signal quality obtained by testing hardware in a preset PVT scenario;
the optimal setting module 200 is used for optimally setting the simulation tool according to the actual signal quality to obtain an optimal simulation tool;
the simulation test module 300 is configured to perform simulation test on hardware by using the optimal simulation tool to simulate a limit PVT scene, so as to obtain a limit simulation signal quality; wherein the number of the extreme PVT scenarios is at least two;
a determining module 400 for using the limit simulated signal quality as a limit value of the actual signal quality.
Referring to fig. 4, fig. 4 is a block diagram of another hardware testing system according to an embodiment of the present disclosure.
The optimal setting module may include:
the setting submodule is used for correspondingly setting each simulation tool according to each simulation parameter;
the test sub-module is used for simulating a preset PVT scene by using each simulation tool to perform simulation test on hardware, and correspondingly obtaining the quality of each simulation signal;
and the selection submodule is used for selecting the simulation tool corresponding to the simulation signal quality closest to the actual signal quality as the optimal simulation tool.
The various components of the above system may be applied to one practical process of:
the acquisition module acquires actual signal quality obtained by testing hardware in a preset PVT scene; the setting sub-module correspondingly sets each simulation tool according to each simulation parameter; the testing sub-module simulates a preset PVT scene by using each simulation tool to carry out simulation testing on the hardware, and correspondingly obtains the quality of each simulation signal; the selection submodule selects a simulation tool corresponding to the simulation signal quality closest to the actual signal quality as an optimal simulation tool; the simulation test module simulates a limit PVT scene by using the optimal simulation tool to carry out simulation test on hardware to obtain the quality of a limit simulation signal; the determination module takes the limit simulated signal quality as a limit value of the actual signal quality.
Referring to fig. 5, fig. 5 is a structural diagram of a hardware testing apparatus according to an embodiment of the present disclosure.
The hardware testing apparatus may have a relatively large difference due to different configurations or performances, and may include one or more processors (CPUs) 522 (e.g., one or more processors) and a memory 532, one or more storage media 530 (e.g., one or more mass storage devices) storing an application 542 or data 544. Memory 532 and storage media 530 may be, among other things, transient storage or persistent storage. The program stored on the storage medium 530 may include one or more modules (not shown), each of which may include a series of instruction operations for a hardware testing apparatus. Still further, the central processor 522 may be configured to communicate with the storage medium 530, and execute a series of instruction operations in the storage medium 530 on the hardware testing apparatus 500.
The hardware testing device 500 may also include one or more power supplies 526, one or more wired or wireless network interfaces 550, one or more input-output interfaces 558, and/or one or more operating systems 541, such as Windows ServerTM, Mac OS XTM, UnixTM, LinuxTM, FreeBSDTM, etc.
The steps in the method for testing hardware described in fig. 1 to 2 are implemented by a hardware testing apparatus based on the structure shown in fig. 5.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the system and the apparatus described above may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, a division of modules is merely a division of logical functions, and an actual implementation may have another division, for example, a plurality of modules or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or modules, and may be in an electrical, mechanical or other form.
In addition, functional modules in the embodiments of the present application may be integrated into one processing module, or each of the modules may exist alone physically, or two or more modules are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode.
The integrated module, if implemented in the form of a software functional module and sold or used as a separate product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be substantially implemented or contributed to by the prior art, or all or part of the technical solution may be embodied in a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a function calling device, or a network device) to execute all or part of the steps of the method of the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
A method, a system, an apparatus, and a computer readable storage medium for hardware testing provided by the present application are described in detail above. The principles and embodiments of the present application are explained herein using specific examples, which are provided only to help understand the method and the core idea of the present application. It should be noted that, for those skilled in the art, it is possible to make several improvements and modifications to the present application without departing from the principle of the present application, and such improvements and modifications also fall within the scope of the claims of the present application.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
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| CN112464594B (en) * | 2020-12-11 | 2022-10-28 | 苏州浪潮智能科技有限公司 | A circuit function simulation test method, device, device and readable storage medium |
| CN112631849B (en) * | 2020-12-17 | 2023-05-12 | 海光信息技术股份有限公司 | Power consumption detection model construction method, power consumption detection device and electronic equipment |
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| CN106710346A (en) * | 2016-11-15 | 2017-05-24 | 青岛科技大学 | Simulation training system |
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| CN106710346A (en) * | 2016-11-15 | 2017-05-24 | 青岛科技大学 | Simulation training system |
| CN106959685A (en) * | 2017-03-31 | 2017-07-18 | 中国东方电气集团有限公司 | A kind of system and method for the steam turbine DEH control system leak test based on RT LAB technologies |
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