CN107608844A - A kind of method of hardware testing, system, device and computer-readable recording medium - Google Patents
A kind of method of hardware testing, system, device and computer-readable recording medium Download PDFInfo
- Publication number
- CN107608844A CN107608844A CN201710875630.7A CN201710875630A CN107608844A CN 107608844 A CN107608844 A CN 107608844A CN 201710875630 A CN201710875630 A CN 201710875630A CN 107608844 A CN107608844 A CN 107608844A
- Authority
- CN
- China
- Prior art keywords
- emulation
- signal quality
- hardware
- limit
- pvt
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 95
- 238000000034 method Methods 0.000 title claims abstract description 40
- 238000004088 simulation Methods 0.000 claims description 22
- 238000004590 computer program Methods 0.000 claims description 6
- 230000009286 beneficial effect Effects 0.000 abstract description 2
- 238000003860 storage Methods 0.000 description 13
- 238000013461 design Methods 0.000 description 8
- 230000008569 process Effects 0.000 description 7
- 238000012545 processing Methods 0.000 description 5
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 230000009467 reduction Effects 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 241000208340 Araliaceae Species 0.000 description 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
- 235000003140 Panax quinquefolius Nutrition 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 235000008434 ginseng Nutrition 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000012372 quality testing Methods 0.000 description 1
Landscapes
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
This application discloses a kind of method of hardware testing, including：Obtain the actual signal quality that test hardware obtains under default PVT scenes；Optimal setting is carried out to emulation tool according to the actual signal quality and obtains optimal emulation tool；Limit PVT scenes are simulated using optimal emulation tool emulation testing is carried out to hardware, obtain limit emulation signal quality；Limiting value using limit emulation signal quality as actual signal quality.This method to emulation tool according to the actual signal quality under default PVT scenes by carrying out optimal setting, limit PVT scenes are simulated using optimal emulation tool, and emulation testing is carried out to hardware, hardware signal quality test is carried out to replace building limit PVT scenes, test sample required for can reducing during hardware testing, and limit scene need not be built.The application additionally provides a kind of system of hardware testing, device and computer-readable recording medium simultaneously has above-mentioned beneficial effect.
Description
Technical field
The application is related to field of hardware, and the more particularly to a kind of method of hardware testing, system, device and computer can
Read storage medium.
Background technology
With the arriving in big data epoch, client to store product performance and system stable operation requirement increasingly
It is high.And the reliability of Hardware Design is the basis of whole system reliability, the lifting of hardware design reliability can be effective
Reduce the operation difficulty of software fault-tolerant mechanism and be obviously improved code operational efficiency.And influence hardware design reliability it is main because
Element is processing procedure voltage temperature angle (Process Voltage Temperature corner, PVT corner) change, in order to
Ensure the reliability of hardware design, common practices is to build limit PVT scenes in hardware testing acceptance phase to carry out the hard of correlation
Part signal quality testing, however, so may require that very more test samples.Meanwhile the structure of limit scene is by various things
The limitation of resource is expected, it is difficult to accomplish limit scene all standing.
Therefore, how while hardware design reliability is ensured, the test specimens required for during reduction hardware testing
Originally it is the current technical issues that need to address of those skilled in the art.
The content of the invention
The purpose of the application is to provide method, system, device and the computer-readable recording medium of hardware testing, this method
Can be while hardware design reliability be ensured, the test sample required for during reduction hardware testing.
In order to solve the above technical problems, the application provides a kind of method of hardware testing, this method includes：
Obtain the actual signal quality that test hardware obtains under default PVT scenes；
Optimal setting is carried out to emulation tool according to the actual signal quality and obtains optimal emulation tool；
Emulation testing is carried out to the hardware using the optimal emulation tool simulation limit PVT scenes, the limit is obtained and imitates
True signal quality；Wherein, the quantity at least two of the limit PVT scenes；
Limiting value using limit emulation signal quality as the actual signal quality.
Optionally, optimal setting is carried out to emulation tool according to the actual signal quality and obtains optimal emulation tool, wrapped
Include：
Each emulation tool is correspondingly arranged according to each simulation parameter；
The default PVT scenes are simulated using each emulation tool, and the emulation testing is carried out to the hardware, it is right
Each emulation signal quality should be obtained；
Selection emulation tool corresponding with the immediate emulation signal quality of the actual signal quality is as described optimal
Emulation tool.
Optionally, this method also includes：
The maximum difference of the limiting value of the actual signal quality is calculated, using the maximum difference as protection value；
Test each hardware to be detected and correspondingly obtain each actual signal quality；
Whether the difference for detecting each actual signal quality and the protection value successively is more than preset standard value；
Confirm that hardware to be detected corresponding to the difference more than preset standard value is qualified hardware.
The application also provides a kind of system of hardware testing, and the system includes：
Acquisition module, for obtaining the actual signal quality that test hardware obtains under default PVT scenes；
Optimal setting module, optimal imitate is obtained for carrying out optimal setting to emulation tool according to the actual signal quality
True instrument；
Emulation testing module, for being imitated using the optimal emulation tool simulation limit PVT scenes the hardware
True test, obtain limit emulation signal quality；Wherein, the quantity at least two of the limit PVT scenes；
Determining module, for the limit to be emulated into limiting value of the signal quality as the actual signal quality.
Optionally, the optimal setting module, including：
Submodule is set, for being correspondingly arranged each emulation tool according to each simulation parameter；
Submodule is tested, the hardware is carried out for simulating the default PVT scenes using each emulation tool
The emulation testing, it is corresponding to obtain each emulation signal quality；
Submodule is selected, for selecting and the actual signal quality is immediate emulates that signal quality is corresponding emulates work
Tool is used as the optimal emulation tool.
The application also provides a kind of device of hardware testing, and the device includes：
Memory, for storing computer program；
Processor, obtain what the test hardware under default PVT scenes obtained for performing the computer program to realize
Actual signal quality；Optimal setting is carried out to emulation tool according to the actual signal quality and obtains optimal emulation tool；Utilize
The optimal emulation tool simulation limit PVT scenes carry out emulation testing to the hardware, corresponding to obtain limit emulation signal matter
Amount；Wherein, the quantity at least two of the limit PVT scenes；Using limit emulation signal quality as the actual letter
The limiting value of number quality.
The application also provides a kind of computer-readable recording medium, and calculating is stored with the computer-readable recording medium
Machine program, when the computer program is executed by processor the step of the realization such as method of above-mentioned hardware testing.
A kind of method of hardware testing provided herein, test what hardware obtained under default PVT scenes by obtaining
Actual signal quality；Optimal setting is carried out to emulation tool according to the actual signal quality and obtains optimal emulation tool；Using most
Excellent emulation tool simulation limit PVT scenes carry out emulation testing to hardware, obtain limit emulation signal quality；Wherein, limit PVT
The quantity at least two of scene；Limiting value using limit emulation signal quality as actual signal quality.
Technical scheme provided herein, by according to the actual signal quality under default PVT scenes come to emulating work
Tool carries out optimal setting, and simulate limit PVT scenes using optimal emulation tool carries out emulation testing to hardware, obtains limit emulation
Signal quality, hardware signal quality test is carried out to replace building limit PVT scenes, can be reduced needed for during hardware testing
The test sample wanted, and limit scene need not be built, while limit scene all standing can be accomplished.The application also carries simultaneously
Supply a kind of system of hardware testing, device and computer-readable recording medium that there is above-mentioned beneficial effect, will not be repeated here.
Brief description of the drawings
, below will be to embodiment or existing in order to illustrate more clearly of the embodiment of the present application or technical scheme of the prior art
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
The embodiment of application, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis
The accompanying drawing of offer obtains other accompanying drawings.
A kind of flow chart of the method for hardware testing that Fig. 1 is provided by the embodiment of the present application；
Flow charts of the Fig. 2 by S102 a kind of practical manifestation mode in a kind of method of Fig. 1 hardware testings provided；
A kind of structure chart of the system for hardware testing that Fig. 3 is provided by the embodiment of the present application；
The structure chart of the system for another hardware testing that Fig. 4 is provided by the embodiment of the present application；
A kind of structure chart for hardware testing device that Fig. 5 is provided by the embodiment of the present application.
Embodiment
The core of the application is to provide a kind of method and system of hardware testing, and this method can ensure that hardware design can
While by property, the test sample required for during reduction hardware testing.
To make the purpose, technical scheme and advantage of the embodiment of the present application clearer, below in conjunction with the embodiment of the present application
In accompanying drawing, the technical scheme in the embodiment of the present application is clearly and completely described, it is clear that described embodiment is
Some embodiments of the present application, rather than whole embodiments.Based on the embodiment in the application, those of ordinary skill in the art
The every other embodiment obtained under the premise of creative work is not made, belong to the scope of the application protection.
It refer to Fig. 1, a kind of flow chart of the method for hardware testing that Fig. 1 is provided by the embodiment of the present application.
It specifically comprises the following steps：
S101：Obtain the actual signal quality that test hardware obtains under default PVT scenes；
When processor receives the instruction of hardware testing, first get what the test hardware under default PVT scenes obtained
Actual signal quality；
Referred to herein as default PVT scenes be the PVT scenes that pre-set of user, for example, the PVT conditions of application scenarios and
It may range from：P (processing procedure) is mainly PCB impedances, and design centre value is 50 Ω, it is allowed to which tolerance is that +/- 10%, V (voltage) is set
Evaluation is that 5v+/- 10%, T (temperature) scope is 0-50 DEG C；
Optionally, the quantity of the default PVT scenes can be one, or it is multiple, PVT scenes are preset in theory
Quantity is more, and the simulation results are more accurate, and certain the application only needs to presetting the quantity of PVT scenes and being not specifically limited
Actual signal quality, setting that can be according to application program in terminal in actual conditions and production and operation factory can be obtained
The selection of family is specifically formulated.
S102：Optimal setting is carried out to emulation tool according to actual signal quality and obtains optimal emulation tool；
When getting the actual signal quality of hardware, optimal setting is carried out to emulation tool according to the actual signal quality
Obtain optimal emulation tool；
Optionally, can will emulation and test result carry out correlation, correlation be same scene and
Simulation result and the measured result contrast to impose a condition, and emulated and set according to comparing result iteration optimization, lifting emulation essence DEG C,
And optimal setting is carried out according to optimal simulation parameter and obtains optimal emulation tool；
For example, choose (P=50 Ω, V=5v, T=25 DEG C), (P=50 Ω, V=4.5v, T=25 DEG C), (P=50 Ω, V
=5.5v, T=25 DEG C) three kinds of scenes are tested, and it is 100mv, 80mv, 120mv to measure actual signal quality.Then emulating
Structure (P=50 Ω, V=5v, T=25 DEG C) in instrument, (P=50 Ω, V=4.5v, T=25 DEG C), (P=50 Ω, V=5.5v,
T=25 DEG C) these three scene conditions progress contrast simulation, emulated respectively using 2 two groups of parameter 1, parameter different parameters,
Obtain two groups of emulation signal qualitys：(95mv, 75mv, 115mv) and (98mv, 78mv, 118mv), then parameter 2 is optimal emulation ginseng
Number, optimal setting is carried out according to parameter 2 and obtains optimal emulation tool.
S103：Emulation testing is carried out to the hardware using the optimal emulation tool simulation limit PVT scenes, the limit is obtained and imitates
True signal quality；
Each condition of setting limit PVT scenes in the optimal emulation tool so that the optimal emulation tool is according to each
The individual condition simulation limit PVT scenes carry out emulation testing to the hardware, obtain limit emulation signal quality；
For example, P=(45 Ω, 55 Ω), three maximum conditions of V=(4.5v, 5.5v), T=(0 DEG C, 50 DEG C) are directed to respectively
8 kinds of limit PVT scenes that permutation and combination obtains carry out traversal emulation, obtain limit emulation signal quality, wherein, limit emulation
Signal quality maximum is 128mv, minimum value 68mv.
S104：Limiting value using limit emulation signal quality as actual signal quality.
Limiting value using limit emulation signal quality as actual signal quality, for example, using 128mv as actual signal
The maximum limit of quality, the minimum limit value using 68mv as actual signal quality；
Optionally, after the limiting value of actual signal quality is determined, the pole of actual signal quality can also first be calculated
The maximum difference of limit value, using maximum difference as protection value, then test each hardware to be detected and correspondingly obtain each actual letter
Number quality, then detect the difference of each actual signal quality and the protection value successively and whether be more than preset standard value, finally confirm
It is qualified hardware more than hardware to be detected corresponding to the difference of preset standard value；
For example, first calculating the maximum difference 128-68=60mv of the limiting value of actual signal quality, i.e. protection value is 60mv,
Then it is respectively 96mv, 66mv, 36mv to test 3 hardware to be detected and correspondingly obtain actual signal quality, subtracts protection value 60mv
After, as a result respectively 36mv, 6mv, -24mv, then it can determine test sample that actual signal quality is 96mv operationally
System at least possesses 6mv actual signal quality allowance, can meet the requirement of stable operation completely, then the test sample passes through
Test.
Based on above-mentioned technical proposal, the method for a kind of hardware testing provided herein, by according to default PVT scenes
Under actual signal quality come to emulation tool carry out optimal setting, using optimal emulation tool simulate limit PVT scenes to hard
Part carries out emulation testing, obtains limit emulation signal quality, and hardware signal quality survey is carried out to replace building limit PVT scenes
Examination, the test sample required for can reducing during hardware testing, and limit scene need not be built, while can accomplish
Limit scene all standing.
It refer to Fig. 2, a kind of practical manifestation modes of the Fig. 2 by S102 in a kind of method of Fig. 1 hardware testings provided
Flow chart.
The present embodiment is the S102 for a upper embodiment, is to be made that specific implementation to the content of S102 descriptions
Description, it is below the flow chart shown in Fig. 2, it specifically includes following steps：
S201：Each emulation tool is correspondingly arranged according to each simulation parameter；
For example, being configured to obtain the first emulation tool according to first group of parameter, it is configured according to second group of parameter
To the second emulation tool etc..
S202：Default PVT scenes are simulated using each emulation tool, and emulation testing is carried out to hardware, it is corresponding to obtain each imitate
True signal quality；
S203：Selection emulation tool corresponding with the immediate emulation signal quality of actual signal quality is as optimal emulation
Instrument.
It refer to Fig. 3, a kind of structure chart of the system for hardware testing that Fig. 3 is provided by the embodiment of the present application.
The system can include：
Acquisition module 100, for obtaining the actual signal quality that test hardware obtains under default PVT scenes；
Optimal setting module 200, optimal imitate is obtained for carrying out optimal setting to emulation tool according to actual signal quality
True instrument；
Emulation testing module 300, for carrying out emulation survey to hardware using the optimal emulation tool simulation limit PVT scenes
Examination, obtain limit emulation signal quality；Wherein, the quantity at least two of limit PVT scenes；
Determining module 400, for the limit to be emulated into limiting value of the signal quality as actual signal quality.
It refer to Fig. 4, the structure chart of the system for another hardware testing that Fig. 4 is provided by the embodiment of the present application.
The optimal setting module can include：
Submodule is set, for being correspondingly arranged each emulation tool according to each simulation parameter；
Submodule is tested, emulation testing is carried out to hardware for simulating default PVT scenes using each emulation tool, it is corresponding
Obtain each emulation signal quality；
Submodule is selected, for selecting emulation tool corresponding with the immediate emulation signal quality of actual signal quality to make
For optimal emulation tool.
Each part in system above can be applied to a following actual flow：
Acquisition module obtains the actual signal quality that test hardware obtains under default PVT scenes；Set submodule according to
Each simulation parameter is correspondingly arranged each emulation tool；Submodule is tested using the default PVT scenes pair of each emulation tool simulation
Hardware carries out emulation testing, corresponding to obtain each emulation signal quality；Select submodule selection closest with actual signal quality
Emulation signal quality corresponding to emulation tool as optimal emulation tool；Emulation testing module utilizes the optimal emulation tool mould
Lopar limits PVT scenes and carries out emulation testing to hardware, obtains limit emulation signal quality；The limit is emulated signal by determining module
Limiting value of the quality as actual signal quality.
It refer to Fig. 5, a kind of structure chart for hardware testing device that Fig. 5 is provided by the embodiment of the present application.
The hardware testing device can produce bigger difference because configuration or performance are different, can include one or one
Above processor (central processing units, CPU) 522 (for example, one or more processors) and storage
Device 532, one or more storage application programs 542 or data 544 storage medium 530 (such as one or more
Mass memory unit).Wherein, memory 532 and storage medium 530 can be of short duration storage or persistently storage.It is stored in storage
The program of medium 530 can include one or more modules (diagram does not mark), and each module can include surveying hardware
Series of instructions during trial assembly is put operates.Further, central processing unit 522 could be arranged to communicate with storage medium 530,
The series of instructions operation in storage medium 530 is performed on hardware testing device 500.
Hardware testing device 500 can also include one or more power supplys 526, one or more wired or nothings
Wired network interface 550, one or more input/output interfaces 558, and/or, one or more operating systems 541,
Such as Windows ServerTM, Mac OS XTM, UnixTM, LinuxTM, FreeBSDTM etc..
Step in above-mentioned Fig. 1 to the method for the hardware testing described by Fig. 2 is based on shown in the Fig. 5 as hardware testing device
Structure realize.
It is apparent to those skilled in the art that for convenience and simplicity of description, the system of foregoing description
With the specific work process of device, the corresponding process in preceding method embodiment is may be referred to, will not be repeated here.
In several embodiments provided herein, it should be understood that disclosed system, apparatus and method can be with
Realize by another way.For example, device embodiment described above is only schematical, for example, the division of module,
Only a kind of division of logic function, can there is an other dividing mode when actually realizing, such as multiple module or components can be with
With reference to or be desirably integrated into another system, or some features can be ignored, or not perform.It is another, it is shown or discussed
Mutual coupling or direct-coupling or communication connection can be by some interfaces, the INDIRECT COUPLING of device or module or
Communication connection, can be electrical, mechanical or other forms.
In addition, each functional module in each embodiment of the application can be integrated in a processing module, can also
That modules are individually physically present, can also two or more modules be integrated in a module.Above-mentioned integrated mould
Block can both be realized in the form of hardware, can also be realized in the form of software function module.
If integrated module is realized in the form of software function module and is used as independent production marketing or in use, can
To be stored in a computer read/write memory medium.Based on such understanding, the technical scheme of the application substantially or
Saying all or part of the part to be contributed to prior art or the technical scheme can be embodied in the form of software product
Out, the computer software product is stored in a storage medium, including some instructions are causing a computer equipment
(can be personal computer, funcall device, or network equipment etc.) performs the whole of each embodiment method of the application
Or part steps.And foregoing storage medium includes：USB flash disk, mobile hard disk, read-only storage (Read-Only Memory,
ROM), random access memory (Random Access Memory, RAM), magnetic disc or CD etc. are various can be with storage program
The medium of code.
Above to method, system, device and the computer-readable recording medium of a kind of hardware testing provided herein
It is described in detail.Specific case used herein is set forth to the principle and embodiment of the application, and the above is real
The explanation for applying example is only intended to help and understands the present processes and its core concept.It should be pointed out that for the art
For those of ordinary skill, on the premise of the application principle is not departed from, some improvement and modification can also be carried out to the application,
These are improved and modification is also fallen into the application scope of the claims.
It should also be noted that, in this manual, such as first and second or the like relational terms be used merely to by
One entity or operation make a distinction with another entity or operation, and not necessarily require or imply these entities or operation
Between any this actual relation or order be present.Moreover, term " comprising ", "comprising" or its any other variant meaning
Covering including for nonexcludability, so that process, method, article or equipment including a series of elements not only include that
A little key elements, but also the other element including being not expressly set out, or also include for this process, method, article or
The intrinsic key element of equipment.In the absence of more restrictions, the key element limited by sentence "including a ...", is not arranged
Except other identical element in the process including the key element, method, article or equipment being also present.
Claims (7)
- A kind of 1. method of hardware testing, it is characterised in that including：Obtain the actual signal quality that test hardware obtains under default PVT scenes；Optimal setting is carried out to emulation tool according to the actual signal quality and obtains optimal emulation tool；Emulation testing is carried out to the hardware using the optimal emulation tool simulation limit PVT scenes, obtains limit emulation letter Number quality；Wherein, the quantity at least two of the limit PVT scenes；Limiting value using limit emulation signal quality as the actual signal quality.
- 2. according to the method for claim 1, it is characterised in that emulation tool is carried out most according to the actual signal quality Excellent setting obtains optimal emulation tool, including：Each emulation tool is correspondingly arranged according to each simulation parameter；The default PVT scenes are simulated using each emulation tool the emulation testing is carried out to the hardware, to deserved To each emulation signal quality；Selection emulation tool corresponding with the immediate emulation signal quality of the actual signal quality is as the optimal emulation Instrument.
- 3. according to the method for claim 1, it is characterised in that also include：The maximum difference between the limiting value of the actual signal quality is calculated, using the maximum difference as protection value；Test each hardware to be detected and correspondingly obtain each actual signal quality；Whether the difference for detecting each actual signal quality and the protection value successively is more than preset standard value；Confirm that hardware to be detected corresponding to the difference more than preset standard value is qualified hardware.
- A kind of 4. system of hardware testing, it is characterised in that including：Acquisition module, for obtaining the actual signal quality that test hardware obtains under default PVT scenes；Optimal setting module, optimal emulation work is obtained for carrying out optimal setting to emulation tool according to the actual signal quality Tool；Emulation testing module, for carrying out emulation survey to the hardware using the optimal emulation tool simulation limit PVT scenes Examination, obtain limit emulation signal quality；Wherein, the quantity at least two of the limit PVT scenes；Determining module, for the limit to be emulated into limiting value of the signal quality as the actual signal quality.
- 5. system according to claim 4, it is characterised in that the optimal setting module, including：Submodule is set, for being correspondingly arranged each emulation tool according to each simulation parameter；Submodule is tested, for simulating the default PVT scenes to described in hardware progress using each emulation tool Emulation testing, it is corresponding to obtain each emulation signal quality；Submodule is selected, for selecting emulation tool corresponding with the immediate emulation signal quality of the actual signal quality to make For the optimal emulation tool.
- A kind of 6. device of hardware testing, it is characterised in that including：Memory, for storing computer program；Processor, the reality that test hardware obtains under default PVT scenes is obtained to realize for performing the computer program Signal quality；Optimal setting is carried out to emulation tool according to the actual signal quality and obtains optimal emulation tool；Using described Optimal emulation tool simulation limit PVT scenes carry out emulation testing to the hardware, corresponding to obtain limit emulation signal quality；Its In, the quantity at least two of the limit PVT scenes；The limit is emulated into signal quality as the actual signal quality Limiting value.
- 7. a kind of computer-readable recording medium, it is characterised in that be stored with computer on the computer-readable recording medium Program, the computer program realizes the method for hardware testing as claimed in claim 1 or 2 when being executed by processor the step of.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710875630.7A CN107608844B (en) | 2017-09-25 | 2017-09-25 | Method, system and device for testing hardware and computer readable storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710875630.7A CN107608844B (en) | 2017-09-25 | 2017-09-25 | Method, system and device for testing hardware and computer readable storage medium |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107608844A true CN107608844A (en) | 2018-01-19 |
| CN107608844B CN107608844B (en) | 2021-02-12 |
Family
ID=61058389
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710875630.7A Active CN107608844B (en) | 2017-09-25 | 2017-09-25 | Method, system and device for testing hardware and computer readable storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107608844B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109711039A (en) * | 2018-12-24 | 2019-05-03 | 浪潮电子信息产业股份有限公司 | Signal simulation method, apparatus, electronic equipment and computer readable storage medium |
| CN112464594A (en) * | 2020-12-11 | 2021-03-09 | 苏州浪潮智能科技有限公司 | Circuit function simulation test method, device, equipment and readable storage medium |
| CN112631849A (en) * | 2020-12-17 | 2021-04-09 | 海光信息技术股份有限公司 | Power consumption detection model construction method, power consumption detection method and device and electronic equipment |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030212972A1 (en) * | 2002-05-13 | 2003-11-13 | Translogic Technology, Inc. | Unconventional clocked circuit components having multiple timing models |
| US20130117721A1 (en) * | 2011-11-08 | 2013-05-09 | Solido Design Automation Inc. | Method and system for verification of electrical circuit designs at process, voltage, and temperature corners |
| CN103699035A (en) * | 2013-12-16 | 2014-04-02 | 武汉理工大学 | Signal matching method and signal matching device for vehicle engine hardware-in-loop simulation process |
| CN106710346A (en) * | 2016-11-15 | 2017-05-24 | 青岛科技大学 | Simulation training system |
| CN106959685A (en) * | 2017-03-31 | 2017-07-18 | 中国东方电气集团有限公司 | A kind of system and method for the steam turbine DEH control system leak test based on RT LAB technologies |
-
2017
- 2017-09-25 CN CN201710875630.7A patent/CN107608844B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030212972A1 (en) * | 2002-05-13 | 2003-11-13 | Translogic Technology, Inc. | Unconventional clocked circuit components having multiple timing models |
| US20130117721A1 (en) * | 2011-11-08 | 2013-05-09 | Solido Design Automation Inc. | Method and system for verification of electrical circuit designs at process, voltage, and temperature corners |
| CN103699035A (en) * | 2013-12-16 | 2014-04-02 | 武汉理工大学 | Signal matching method and signal matching device for vehicle engine hardware-in-loop simulation process |
| CN106710346A (en) * | 2016-11-15 | 2017-05-24 | 青岛科技大学 | Simulation training system |
| CN106959685A (en) * | 2017-03-31 | 2017-07-18 | 中国东方电气集团有限公司 | A kind of system and method for the steam turbine DEH control system leak test based on RT LAB technologies |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109711039A (en) * | 2018-12-24 | 2019-05-03 | 浪潮电子信息产业股份有限公司 | Signal simulation method, apparatus, electronic equipment and computer readable storage medium |
| CN112464594A (en) * | 2020-12-11 | 2021-03-09 | 苏州浪潮智能科技有限公司 | Circuit function simulation test method, device, equipment and readable storage medium |
| CN112464594B (en) * | 2020-12-11 | 2022-10-28 | 苏州浪潮智能科技有限公司 | Circuit function simulation test method, device, equipment and readable storage medium |
| CN112631849A (en) * | 2020-12-17 | 2021-04-09 | 海光信息技术股份有限公司 | Power consumption detection model construction method, power consumption detection method and device and electronic equipment |
| CN112631849B (en) * | 2020-12-17 | 2023-05-12 | 海光信息技术股份有限公司 | Power consumption detection model construction method, power consumption detection device and electronic equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107608844B (en) | 2021-02-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6823276B2 (en) | System and method for determining measurement errors of a testing device | |
| CN105224132B (en) | The calibration method and device of a kind of pressure sensor | |
| CN107608844A (en) | A kind of method of hardware testing, system, device and computer-readable recording medium | |
| CN113343630B (en) | Modeling method and modeling device, electronic equipment and storage medium | |
| CN112819169A (en) | Quantum control pulse generation method, device, equipment and storage medium | |
| CN102314532B (en) | IBIS (Input/Output Buffer Information Specification) model verification method and system | |
| CN107533473B (en) | Efficient waveform generation for simulation | |
| CN106093897A (en) | The test system of a kind of radar system and method for testing | |
| CN112649719A (en) | Method, device and equipment for testing linear voltage stabilizer in chip | |
| CN113568821A (en) | Method, device, equipment and medium for testing computation performance of AI chip | |
| US20100332211A1 (en) | Programmable and reconfigurable hardware for real power system emulation | |
| CN105424074A (en) | Sensor calibration system and control method and device thereof | |
| CN105259795B (en) | Internal driving parameter spread method for electrokinetic cell simulator | |
| US20100223035A1 (en) | Test Time Calculator | |
| CN117330935A (en) | Integrated circuit testing method, device and medium | |
| CN111157906B (en) | SOC precision testing method, device and system | |
| CN116430826A (en) | Electronic controller working condition coupling test method based on offshore atmospheric environment laboratory | |
| Harťanský et al. | Modifying and accelerating the method of moments calculation | |
| CN109084867A (en) | A kind of automobile combination meter fuel oil emulation test system and method | |
| US11875095B2 (en) | Method for latency detection on a hardware simulation accelerator | |
| CN109426503A (en) | The method and device of simulation excitation is provided | |
| CN102521466A (en) | Method and system for simulation of diffusion resistor | |
| CN113030821A (en) | Electric quantity calibration method and device | |
| CN111444638B (en) | Method for verifying series compensation MOV non-electric quantity protection constant value | |
| Bashkirov et al. | Comparative analysis of software products for virtual simulation of electrical circuits |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20210106 Address after: Building 9, No.1, guanpu Road, Guoxiang street, Wuzhong Economic Development Zone, Wuzhong District, Suzhou City, Jiangsu Province Applicant after: SUZHOU LANGCHAO INTELLIGENT TECHNOLOGY Co.,Ltd. Address before: Room 1601, floor 16, 278 Xinyi Road, Zhengdong New District, Zhengzhou City, Henan Province Applicant before: ZHENGZHOU YUNHAI INFORMATION TECHNOLOGY Co.,Ltd. |
|
| TA01 | Transfer of patent application right | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |