CN107599656B - Chip, mounting detection method thereof, replaceable unit and image forming apparatus - Google Patents
Chip, mounting detection method thereof, replaceable unit and image forming apparatus Download PDFInfo
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Abstract
The invention belongs to the technical field of image formation, and provides a chip, a mounting detection method thereof, a replaceable unit and an image forming device, wherein the chip comprises the following components: a storage unit storing the replaceable unit performance parameters; a substrate provided with a clock signal terminal, a data signal terminal, and a connection circuit capable of transmitting an electric signal; wherein the connection circuit includes an impedance branch between the clock signal terminal and the data signal terminal.
Description
[ Field of technology ]
The present invention relates to the field of image forming technology, and more particularly, to a chip for a replaceable unit in an image forming apparatus, a method of detecting the mounting of the chip, a replaceable unit for an image forming apparatus, and an image forming apparatus.
[ Background Art ]
As a computer peripheral device, an image forming apparatus (english name, image forming apparatus) has been increasingly used in offices and households with the development of imaging technology, which has been accompanied by advantages of high speed, low cost of single-page imaging, and the like. Image forming apparatuses include printers, copiers, multifunctional integrated machines, and the like according to differences in functions, and include laser printers, inkjet printers, needle printers, and the like according to differences in image forming principles.
The image forming apparatus is generally provided with a replaceable unit that needs replacement, for example, a laser printer, including a process cartridge or a developing cartridge for accommodating developer, a fixing assembly, a paper accommodating unit, and the like, for example, an inkjet printer, including an ink cartridge or an ink cartridge, and the like, for example, a needle printer, and includes a ribbon cartridge, and the like. When the replaceable unit is not mounted to a predetermined position as required, it may cause the replaceable unit to not fit well with other components in the image forming apparatus, or when an improper type of replaceable unit is mounted to the image forming apparatus, it may cause the replaceable unit to not fit well with other components in the image forming apparatus, or even if an improper type of replaceable unit is mounted to be able to fit structurally with other components in the image forming apparatus, the improper type of replaceable unit may not meet the condition required for image formation by the image forming apparatus, resulting in a reduction in image quality. In order to prevent the replaceable unit from being mounted in the image forming apparatus without being mounted to a predetermined position in the image forming apparatus or without being mounted to the image forming apparatus of an incorrect model, the related art generally provides a chip provided on the replaceable unit with a function of detecting the characteristics of the replaceable unit in cooperation with the body of the image forming apparatus.
For example, in an inkjet printer disclosed in chinese patent application No. CN01803941.3, an identification device is provided on a printer body, and a chip with a storage unit is provided on an ink cartridge; the identification means determines whether or not an erroneous ink cartridge is mounted in the printer body by comparing whether or not the identification information stored in the memory unit in the chip matches a predetermined requirement. Another chinese patent application No. CN201410804409.9 discloses an electrophotographic laser printer in which a fuse F1 for new and old unit identification and a resistor R1 indicating the type (sales destination) of a replaceable unit (consumable part) are provided on a chip substrate in the replaceable unit.
The inventor found in the process of implementing the present invention that, although the chip is added to the replaceable unit in the technical solution in the prior art, after the replaceable unit is mounted to the image forming apparatus, whether the chip in the replaceable unit meets the predetermined requirement is detected; however, the chip in the prior art lacks a technical solution for matching with the detection module/unit in the image forming apparatus body, for detecting whether the chip contacts are reliably contacted with the contact terminals in the image forming apparatus body during the mounting process of the chip contacts. Specifically, the chip side contact and the contact terminal in the body are usually required to transmit communication information between the chip in the replaceable unit and the detection module/unit in the body of the image forming apparatus, and the chip side contact and the contact terminal in the body are usually in elastic contact, so that in the normal communication process, an elastic force with a preset magnitude is required between the chip side contact and the contact terminal in the body to ensure reliable contact of the chip side contact and the contact terminal in the body and effectively transmit signals; however, due to factors such as deformation of the elastic member caused by long use time of the image forming apparatus, loosening of the elastic member during handling, contact of only a small portion of the chip contact with the contact terminal in the body, or dirt on the surface of the chip contact (hereinafter also referred to as improper mounting), the chip-side contact may be brought into physical contact with the contact terminal in the body, but it is not ensured that the signal is transmitted as desired. While the chip and the image forming apparatus body are in communication, if the contact between the chip-side electrical contacts and the electrical contact terminals in the body is unreliable, the following problems may occur:
1. Since the contact between the chip-side electrical contact and the electrical contact terminal in the body is unreliable, the reliability of communication between the two is likely to be affected, and thus the effectiveness of data transmission cannot be ensured.
2. When the validity of data transmission between the chip-side electrical contact and the electrical contact terminal in the body is problematic, the existing technology cannot detect errors caused by errors of the chip itself or improper installation of the replaceable unit, so that the image forming apparatus cannot accurately correspond to the type of errors.
3. Since the prior art cannot distinguish the error types, there may be a problem that the chip itself is not problematic, but since the replaceable unit is improperly installed, the prior art can only suggest that the replaceable unit is not satisfactory; therefore, errors may occur in the chip itself, which the user considers as a replaceable unit; and the error caused by improper installation of the replaceable unit cannot be known in time, and the replaceable unit can be installed again according to the correct installation mode, so that the replaceable unit can be used.
[ Invention ]
In order to solve the technical problem that whether the contact between the image forming device body and the chip is reliable is lack in the prior art, the invention provides a chip for a replaceable unit in the image forming device, a chip mounting detection method, the replaceable unit for the image forming device and the image forming device, and the chip mounting detection method and the image forming device can accurately detect whether the conductive contact of the chip is reliably contacted with the contact terminal in the image forming device body.
In order to achieve the above object, the present invention provides a technical solution comprising:
in one aspect, the present invention provides a chip for a replaceable unit in an image forming apparatus, the chip comprising:
A storage unit storing the replaceable unit performance parameters;
a substrate provided with a clock signal terminal, a data signal terminal, and a connection circuit capable of transmitting an electric signal;
Wherein the connection circuit includes an impedance branch between the clock signal terminal and the data signal terminal.
In an embodiment of the present invention, the impedance branch preferably includes a resistive element having a predetermined impedance value, and one end of the resistive element is connected to the clock signal terminal, and the other end is connected to the data signal terminal.
Another aspect of the present invention provides a chip for a replaceable unit in an image forming apparatus, the chip comprising:
A storage unit storing the replaceable unit performance parameters;
a substrate provided with a clock signal terminal, a data signal terminal, and a connection circuit capable of transmitting an electric signal;
Wherein, the connection circuit includes: a first impedance branch with one end connected with the clock signal terminal and the other end grounded; and a second impedance branch having one end connected to the data signal terminal and the other end grounded.
By adopting the technical scheme provided by the invention, the impedance branch circuit is arranged in the chip and used as a detected circuit for detecting the contact reliability state of the chip electric contact point and the image forming device body electric contact terminal in a matching way; when the replaceable unit is mounted in the image forming apparatus, if the contact reliability of the chip-side electrical contact point and the image forming apparatus body-side electrical contact terminal is not satisfactory due to improper mounting of the replaceable unit, the state can be detected in time.
A third aspect of the present invention provides a chip for a replaceable unit of an image forming apparatus on which an electric contact terminal is provided, the chip comprising:
a storage unit storing relevant parameters of the replaceable unit;
a plurality of electrical contacts electrically connectable with the electrical contact terminals;
The image forming device is characterized by further comprising an impedance branch, wherein one end of the impedance branch is connected with at least one of the electric contacts and is used for detecting contact reliability between the electric contact connected with the impedance branch and an electric contact terminal of the image forming device.
In the embodiment of the present invention, preferably, the other end of the impedance branch is connected to another electrical contact, so that the chip can form a loop for detecting the reliability of the electrical connection after being mounted to the image forming apparatus.
In the embodiment of the present invention, one end of the impedance branch is preferably connected to a clock signal terminal of the image forming apparatus, and the other end is preferably connected to a data signal terminal of the image forming apparatus.
In the embodiment of the present invention, preferably, the other end of the impedance branch is grounded, so that the chip can form a loop for detecting the reliability of the electrical connection after being mounted to the image forming apparatus.
Further preferably, the circuit for detecting the electrical contact availability is a circuit formed between the image forming device and the chip after the replaceable unit is mounted on the image forming device, and by sampling the voltage and/or the current of the circuit, the electrical characteristics formed by contact between at least one of the plurality of electrical contacts in the chip and the corresponding electrical contact of the image forming device in the circuit can be obtained; and the electrical connection between at least one of the plurality of electrical contacts in the chip and the corresponding contact terminal of the image forming apparatus can be judged based on the electrical characteristics of the contact formation.
By adopting the technical scheme provided by the invention, the known serial buses (including IIC, USART and the like) are combined, and the electrical characteristic parameters corresponding to the reliability of the contact point between the image forming device and the chip in the replaceable unit are detected through the electrical performance of the serial bus communication, so that the connection physical characteristics between the image forming device and the chip in the replaceable unit are accurately obtained, and the reason that consumable materials are not identified is accurately indicated to a user, which is caused by the contact reason or caused by the problem of the chip.
A fourth aspect of the present invention provides a method for detecting the mounting of a chip, wherein the chip includes an impedance branch, one end of which is connected to at least one of the electrical contacts; the method comprises the following steps:
acquiring electrical signal parameters of at least one contact terminal of the image forming device body, wherein the contact terminal corresponds to an electrical contact connected with an impedance branch in a chip;
and judging the contact stable state between the chip electric contact and the image forming device body electric contact terminal based on the electric signal parameter and the impedance parameter of the impedance branch.
In the embodiment of the present invention, preferably, the determining, based on the electrical signal parameter and the impedance parameter of the impedance branch, a contact stable state between the chip and the image forming apparatus body includes:
Calculating an impedance value between an electrical contact connected to the impedance branch and an electrical contact terminal of the image forming apparatus based on the electrical signal parameter;
And judging the contact stable state between the chip and the image forming device body based on the impedance value.
Preferably, the method according to the embodiment of the present invention further includes: and after judging that the contact stability between the chip and the image forming device body meets the requirement, judging whether the chip is good or not, and outputting state information of whether the chip is good or not.
By adopting the technical scheme provided by the invention, the contact stable state between the chip electric contact and the image forming device body electric contact terminal can be accurately judged; thus, the contact between the chip electrical contact and the image forming apparatus body electrical contact terminal is unreliable due to an error caused by improper installation of the replaceable unit, and the user can be accurately notified.
The fifth aspect of the present invention also provides a replaceable unit for an image forming apparatus, comprising:
a developing cartridge provided with a housing, a developer accommodating unit accommodating a developer inside the housing, a developer-carrying member carrying the developer, and a chip located on an outer surface of the housing; the chip comprises:
A storage unit storing the replaceable unit performance parameters;
a plurality of electrical contacts electrically connectable with the electrical contact terminals;
The chip is characterized by further comprising an impedance branch, wherein one end of the impedance branch is connected with at least one of the electrical contacts and is used for detecting contact reliability between the electrical contact connected with the impedance branch and an electrical contact terminal of the image forming device.
The sixth aspect of the present invention also provides a replaceable unit for an image forming apparatus, comprising:
The device comprises a drum assembly, a photosensitive drum, a charging roller and a chip, wherein the drum assembly is provided with a developing box accommodating part for accommodating a developing box, the photosensitive drum, the charging roller for charging the photosensitive drum and the chip positioned on the outer surface of a shell of the drum assembly; the chip comprises:
A storage unit storing the replaceable unit performance parameters;
a plurality of electrical contacts electrically connectable with the electrical contact terminals;
The chip is characterized by further comprising an impedance branch, wherein one end of the impedance branch is connected with at least one of the electrical contacts and is used for detecting contact reliability between the electrical contact connected with the impedance branch and an electrical contact terminal of the image forming device.
The seventh aspect of the present invention also provides an image forming apparatus, comprising:
A body accommodating a replaceable unit, a communication unit connected with the chip being provided in the body, the communication unit being provided with a plurality of electrical contact terminals;
A replaceable unit provided with a developing cartridge and/or a drum assembly, the developing cartridge being provided with a housing, a developer accommodating unit accommodating a developer inside the housing, a developer conveying member conveying the developer, and a chip located on an outer surface of the housing; the drum assembly is provided with a developing box accommodating part for accommodating a developing box, a photosensitive drum, a charging roller for charging the photosensitive drum and a chip positioned on the outer surface of the shell of the drum assembly; the chip comprises:
a plurality of electrical contacts electrically connectable with the electrical contact terminals;
The chip is characterized by further comprising an impedance branch, wherein one end of the impedance branch is connected with at least one of the electrical contacts and is used for detecting the contact reliability between the electrical contact connected with the impedance branch and an electrical contact terminal of the image forming device;
And a detection unit for detecting electric signal parameters of at least one contact terminal of the image forming device body corresponding to the electric contact connected with the impedance branch in the chip is also arranged in the body.
By adopting the technical scheme provided by the invention, at least one of the following beneficial effects can be obtained:
1. Because the impedance branch circuit is arranged in the chip of the replaceable unit and is used as a detected circuit for detecting the contact reliability state of the chip electric contact point and the image forming device body electric contact terminal in a matching way; thus, when the replaceable unit is mounted in the image forming apparatus, if the contact reliability of the chip-side electrical contact point and the image forming apparatus body-side electrical contact terminal is not satisfactory, it can be detected in time.
2. According to the technical scheme provided by the invention, whether the conductive contacts of the chip are in stable contact with the contacts in the image forming device body can be accurately detected; and further judging the contact reliability; therefore, if the chip is in unstable contact with the side of the body of the image forming device, the error can be timely identified by the detection unit in the image forming device, and further, the user is informed of installing the replaceable unit in a correct mode through a reminding mode, so that the possible data transmission error caused in the working process due to unreliable contact of the chip and the body of the image forming device is avoided.
3. If the contact of the chip is reliably contacted with the contact terminal of the body of the image forming device, the chip is detected, and the detection result of the chip is fed back; thus, if the chip itself is good, only the contact of the chip with the image forming apparatus body side is unstable, the user can reinstall the replaceable unit, or reinstall the replaceable unit after cleaning the chip on the surface of the replaceable unit, and the replaceable unit can be used.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure and/or process particularly pointed out in the written description and claims hereof as well as the appended drawings.
[ Description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic view of a frame and a process cartridge of an image forming apparatus according to a first embodiment of the present invention.
Fig. 2 is a schematic structural view of a drum assembly in a process cartridge according to an embodiment of the present invention.
Fig. 3 is a schematic structural diagram of a chip in a drum assembly according to a first embodiment of the present invention.
Fig. 4 is a schematic structural view of a developing cartridge according to a first embodiment of the present invention.
Fig. 5 is a schematic structural diagram of a chip in a developing cartridge according to an embodiment of the invention.
Fig. 6 is a schematic structural diagram of a chip in a drum assembly and a terminal in an image forming apparatus body according to an embodiment of the present invention.
Fig. 7 is a schematic structural diagram of a chip in a developing cartridge assembly and a terminal in an image forming apparatus body according to an embodiment of the present invention.
Fig. 8 is a schematic diagram of a connection circuit between a chip and a main body of an image forming apparatus according to an embodiment of the present invention.
Fig. 9 is a simplified diagram of a chip and an image forming apparatus body-side connection circuit in a first state according to a first embodiment of the present invention.
Fig. 10 is a simplified diagram of a chip and an image forming apparatus body-side connection circuit in a second state according to a first embodiment of the present invention.
Fig. 11 is a flowchart of a chip mounting inspection according to an embodiment of the present invention.
Fig. 12 is a schematic diagram of a connection circuit between a chip and an image forming apparatus according to a second embodiment of the present invention.
Fig. 13 is a simplified diagram of a chip and an image forming apparatus body-side connection circuit according to a second embodiment of the present invention in a first state.
Fig. 14 is a simplified diagram of a chip and an image forming apparatus body-side connection circuit in a second state according to a second embodiment of the present invention.
Fig. 15 is a flowchart of a chip mounting inspection according to a second embodiment of the present invention.
Fig. 16 is a power-on timing chart of a power supply in a chip according to a third embodiment of the present invention.
Fig. 17 is a flowchart of a method for detecting a chip status during a chip power-up process according to a third embodiment of the present invention.
Fig. 18 is a power-down timing chart of a power supply in a chip according to a third embodiment of the present invention.
Fig. 19 is a flowchart of a method for detecting a chip status in a chip power-down process according to a third embodiment of the present invention.
Fig. 20 is a circuit diagram of a chip and an image forming apparatus body side connection according to a fourth embodiment of the present invention.
Fig. 21 is a simplified diagram of a chip and an image forming apparatus body-side connection circuit in a first state according to a fourth embodiment of the present invention.
Fig. 22 is a simplified diagram of a chip and an image forming apparatus body-side connection circuit in a second state according to a fourth embodiment of the present invention.
Fig. 23 is a simplified diagram of a chip and an image forming apparatus body-side connection circuit in a third state according to a fourth embodiment of the present invention.
[ Detailed description ] of the invention
The following will describe embodiments of the present invention in detail with reference to the drawings and examples, thereby solving the technical problems by applying technical means to the present invention, and realizing the technical effects can be fully understood and implemented accordingly. It should be noted that these specific descriptions are only for easy and clear understanding of the present invention by those skilled in the art, and are not meant to be limiting; and the various embodiments of the invention and the various features of the various embodiments may be combined with one another so long as no conflict arises; the technical scheme formed by combining the features in the different embodiments is within the protection scope of the invention.
Example 1
As shown in fig. 1, for convenience of description, A1 in the following abbreviated as fig. 1 is a left side surface of the image forming apparatus, B1 is a front surface of the image forming apparatus, C1 is an upper surface of the image forming apparatus, a right side surface opposite to A1, a rear surface opposite to B1, and a lower surface opposite to C1; a2 is a left side surface of the process cartridge, B1 is a front surface of the process cartridge, C1 is an upper surface of the process cartridge, a right side surface opposite to A2, a rear surface opposite to B2, and a lower surface opposite to C2. The present embodiment provides an image forming apparatus 1000 including: a frame, also called a body or a main body of the image forming apparatus; a process cartridge mounting portion 1100 located within the frame, a paper cassette 1200 located below the process cartridge mounting portion 1100; a paper conveying mechanism (not shown) is also provided between the process cartridge mounting portion 1100 and the paper cassette 1200; and a door 1300 which is provided on the front surface of the frame and is pivotally connected with respect to the frame, the process cartridge 2000 being mountable to the process cartridge mounting portion 1100 or removable from the process cartridge mounting portion 1100 when the door 1300 is in the open state of fig. 1, the process cartridge 2000 being stably mounted to the process cartridge mounting portion 1100 when the door 1300 is pivoted to the rear surface to the closed state with respect to the pivot; a first communication section 1110 that communicates with a first chip in the process cartridge 2000 in contact with each other, and a second communication section 1120 that communicates with a second chip in the process cartridge 2000 in contact with each other are also provided in the process cartridge mounting section 1100; the process cartridge 2000 provided in the present embodiment is preferably of a split type, i.e., includes a developing cartridge 2100 containing developer and a drum assembly 2200 to which a photosensitive drum is mounted; the image forming apparatus 1000 provided in this embodiment further includes a power switch 1400 located at the front surface of the frame near the right side surface and the upper surface, and an operation panel 1500, a display panel 1600, and a sheet discharge portion 1700 located at the upper surface of the frame.
One of the points of the invention of the present embodiment is to detect the reliability state between the chip and the communication portion of the image forming apparatus body side communicating with the chip in the replaceable unit, wherein the replaceable unit mentioned in the present embodiment may be the drum assembly 2200 in the process cartridge 2000 mentioned below, the developing cartridge 2100 in the process cartridge 2000 mentioned below, the process cartridge 2000 including the developing cartridge 2100 and the developing cartridge 2200, and the process cartridge 2000 may be the corresponding split type process cartridge of fig. 1, or an integral type process cartridge; the replaceable unit mentioned in this embodiment may be other components, parts, and units that need to be damaged and replaced, such as the paper cassette 1200 and the fixing component, in the image forming apparatus, and when the paper cassette 1200 or the fixing component is provided with a chip that communicates with the body of the image forming apparatus, the replaceable unit also belongs to the technical scheme corresponding to the replaceable unit protected by the present invention.
As shown in fig. 2 and 4, a developing cartridge mounting portion 2300 for accommodating the developing cartridge 2100 is provided on a housing (i.e., a portion constituted by an outer injection-molded member) of the drum assembly 2200, and a locking mechanism 2270 for locking the developing cartridge is provided on an upper surface of the drum assembly 2200 at a position near the left and front surfaces, although only one locking mechanism is shown in fig. 2, one of ordinary skill in the art may alternatively provide a locking mechanism identical or similar to 2270 at a position near the right and front surfaces on the upper surface; the left and right sides of the developing cartridge 2100 are provided with locked portions 2120, 2110, respectively; a hand-holding portion 2260 is provided at the junction of the front surface and the upper surface of the housing of the drum assembly 2200 to facilitate the user's loading and unloading of the cartridge 2000; also disposed within the drum assembly 2200 are a photosensitive drum 2220 and a charging roller 2250 that charges the photosensitive drum 2220, the right end of the photosensitive drum 2220 being provided with a drive head 2224 that receives a driving force from the image forming apparatus and a transmission gear 2222 that transmits the power received by the drive head 2224 to a rotating member in the developing cartridge 2100; drum assembly 2220 is also provided with a waste bin 2240 for containing waste powder; a first chip 2210 is provided on the upper surface of the waste bin 2240 near the rear surface and the left side surface. As shown in fig. 2 and 3, a square hole 2211 and a round hole 2212 are respectively arranged on the first chip 2210 substrate, and square columns and columns matched with the square hole and the round hole are respectively arranged on the waste powder bin 2240; through the cooperation between the square holes and the square columns and between the round holes and the columns, the chip 2210 is stably mounted on the upper surface of the waste powder bin 2240 without moving in the front-back and left-right directions; the first chip 2210 can be prevented from moving in the up-down direction by thermally welding the cylinder and the square column or arranging a limiting cantilever at the end of the square column.
As shown in fig. 2, 3 and 6, the upper surface of the first chip 2210 substrate is respectively provided with four side-by-side conductive terminals (or electrical contacts), and the nearest to the left side of the drum assembly 2200 is a power terminal 2213, a data signal terminal 2214 next to the power terminal 2213, a ground terminal 2215 next to the data signal terminal, and a clock signal terminal 2216 on the rightmost side; it should be noted that all the conductive terminals in this embodiment are also called conductive contacts or contacts, and the conductive terminals on the chip side are also called "gold fingers"; the conductive terminal, the electrical contact, the conductive contact and the contact mentioned in the embodiment may be a conductive plane, or may be a point of contact conduction or a line of contact conduction, and all the technical solutions provided in the embodiment do not limit the structural features of the conductive contact. The power terminal is also called VCC for short, and the ground terminal is called GND for short. A microcontroller is provided on the lower surface of the first chip 2210, the microcontroller is integrated in one package member 2217, the package member 2217 may be in a soft package manner or in a hard package manner, and the package member 2217 is located at a position projected midway between the data signal terminal 2214 and the ground terminal 2215 in the left-right direction of the drum assembly (hereinafter referred to as the first chip length direction), i.e., at a position midway in the length direction of the lower surface of the substrate. As shown in fig. 1 and 6, the first communication section 1110 in the image forming apparatus (frame) body is disposed on an image forming apparatus LSU assembly (LSU is LASER SCANNING Unit, laser scanning Unit for performing exposure processing to the photosensitive drum, not shown in the drawings), and the first communication section 1110 is also provided with a body-side first power supply terminal 1114, a body-side first data signal terminal 1113, a body-side first ground terminal 1112, and a body-side first clock signal terminal 1111, which communicate with the first in-chip power supply terminal 2213, the data signal terminal 2214, the ground terminal 2215, and the clock signal terminal 2216, respectively; these terminals (or electrical contact terminals) are secured to an injection molded part 1115 in the LSU assembly and are also connected by wires to a main controller in the image forming apparatus.
As shown in fig. 4 and 5, the front surface of the developing cartridge 2100 is also provided with a hand-held portion 2130 for facilitating easy loading and unloading of the developing cartridge 2100 by a user. And a second chip 2140 is further provided at a position of the lower surface of the developing cartridge 2100 near the front surface, right side surface. One surface of the second chip 2140 substrate is also provided with four contacts: a row near the front surface is a data signal terminal 2141, a clock signal terminal 2142; a power terminal 2143 and a ground terminal 2144 located in the second row; the other surface of the second chip 2140 opposite to the contact is provided with a package element 2145, the package element 2145 is located at the center of the substrate, and as shown in fig. 5, projected in a direction perpendicular to the contact surface, the package element 2145 overlaps with four contacts 2141, 2142, 2143, 2144, respectively.
The first and second embodiments are merely for facilitating a person skilled in the art to understand the technical solution in the present embodiment more clearly, and are not limited thereto; the person skilled in the art may also exchange all "first", "second" related to the first chip and the second chip, the first communication part and the second communication part, and may also use more numbers to define, for example, "third", "fourth", etc.; in addition, the skilled person can arrange only the first chip or only the second chip in the process cartridge according to actual product requirements.
As shown in fig. 1 and 7, the second communication section 1120 in the image forming apparatus (frame) body is located on the sheet conveying unit of the image forming apparatus, and the second communication section 1120 is also provided with a body-side second power supply terminal 1123, a body-side second ground terminal 1124, and a body-side second clock signal terminal 1122 which communicate with the power supply terminal 2143, the data signal terminal 2141, the ground terminal 2144, and the clock signal terminal 2142, respectively, in the second chip 2140; and these signal terminals on the body side are part of circular ring springs, these circular ring springs are connected with the cylinders 1127, 1125, 1128, 1126, respectively, the cylinders 1127, 1125, 1128, 1126 are also made up of conductive springs, respectively, which are connected to a main controller inside the image forming apparatus via wires, thereby completing communication between the conductive terminals in the second communication section 1120 and the conductive terminals in the second chip 2140.
As shown in fig. 1, 6 and 7, when the contacts in the first communication section 1110 are connected to the contacts in the second communication section 1120 and the contacts in the second chip 2140 in the process of connecting the contacts in the first communication section 1110 to the contacts in the first chip 2210, since the process cartridge 2000 may not be mounted to a designated position in the process cartridge mounting section 1100, the contact of each chip in contact with the communication section may cause a difference in the state of contact in the body side and the process cartridge side due to the position in which the process cartridge is mounted; for example, the first chip 2210 in fig. 6 is inclined along the Y1 and Y2 directions in the drawing, which results in a very stable contact between the body side contact 1111 and the chip side contact 2216, and a relatively stable signal transmission; the contact between the body side contact 1114 and the chip side contact 2213 is very unreliable, which may result in unreliable signal transmission, and may cause the main controller in the image forming apparatus body to not receive the signal of the process cartridge side chip; on the other hand, in the preferred technical solution of this embodiment, the various contacts on the process cartridge side are square contact surfaces, and the arc-shaped springs of the contact portion on the main body side of the image forming apparatus may also cause the contact areas of the different main body side contact portions and the process cartridge side contact portions to be different when the process cartridge 2000 is not mounted to the designated position in the process cartridge mounting portion 1100, which may also cause the impedance values to be different between the different main body side contact portions and the process cartridge side contact portions; on the other hand, the main controller of the image forming apparatus is not able to recognize the chip correctly because of poor contact between the body side terminal and the chip side contact due to the surface processing process of the chip side contact, the image forming apparatus side contact (e.g., the contact probe/spring member), and the contamination of the surface adhesion during use, surface oxidation, and the like. Likewise, the contact process of the body-side contact 1113 and the chip-side contact 2214, and the body-side contact 1112 and the chip-side contact 2215 also have the above-described problems; the contact of the second communication section 1120 and the second chip 2140 also suffers from the above-described problems.
Based on the above reasons, in the technical solution in the prior art, if the above situation occurs, it is very likely to directly determine that the chip in the process cartridge is abnormal, and prompt the user to replace the process cartridge; the true reason is that the chip in the process cartridge itself is good, only because the body side contacts and the chip side contacts are not reliably contacted; the technical scheme provided by the embodiment of the invention can accurately detect whether the detection area is the unreliable contact between the body side contact and the chip side contact or the damage of the chip itself/the service life of the chip is reached; the specific detection procedure is explained in detail below.
As shown in fig. 8, the image forming apparatus side is provided with a first control circuit 310, the chip on the process cartridge side is provided with a second control circuit 320, a contact circuit 330 is formed between the contact of the first control circuit 310 surface and the contact of the chip substrate surface, the contact circuit 330 includes a plurality of parallel contact resistances (reference numeral Rt 1) 321, contact resistances (reference numeral Rt 2) 332, and for convenience of description and calculation, the present embodiment actually further includes the resistance of the contact itself of the first control circuit 310 surface, the resistance of the contact itself of the chip substrate surface, but the resistance of itself is relatively small when the resistance of Rt1 and the resistance of Rt2 are described later; therefore, in this embodiment, the contact resistance Rt1 is directly referred to as the sum of the resistance between the data signal contact 311 on the image forming apparatus side and the data signal contact 321 on the chip side, the self resistance of the signal contact 311, and the self resistance of the data signal contact 321, and the contact resistance Rt2 is the sum of the resistance between the data signal contact 312 on the image forming apparatus side and the data signal contact 322 on the chip side, the self resistance of the signal contact 312, and the self resistance of the data signal contact 322. It should be noted that fig. 8 is merely a simplified schematic diagram, and the number of contact resistances in the contact circuit may be determined according to the corresponding number of chip-side contacts and image forming apparatus body-side contacts.
Specifically, the first control circuit 310 in the image forming apparatus 1000 includes an SoC (System on Chip, i.e., a main controller in the image forming apparatus 1000) and an MCU (micro controller in a processing box Chip, i.e., a control unit in the processing box Microcontroller Unit) in the processing box, and the communication between the SoC and the MCU adopts an I2C bus communication mode. The chip corresponding to the right-hand dashed box in fig. 8 may be the above-mentioned internal second control circuit 320 of the first chip 2210 and/or the second chip 2140, and the MCU of the second control circuit 320 is provided with a storage unit storing performance-related parameters (e.g., lifetime information, number of use, date of production, remaining amount of consumables in the replaceable unit, etc.) of the replaceable unit and a communication unit communicating with the image forming apparatus, where the communication unit performs data exchange with the image forming apparatus through SCL and SDA connection. For simplifying the description of the technical solution, only SCL (data signal line of I2C bus) and SDA (clock signal line of I2C bus) are simply illustrated in fig. 8, and for convenience of description, the data signal terminal in SCL in fig. 8 that contacts the image forming apparatus body side is abbreviated as D1, and the clock signal terminal in SDA in fig. 8 that contacts the image forming apparatus body side is abbreviated as D2.
The chip provided in this embodiment has an impedance characteristic detected unit added between D1 and D2, and when the process cartridge is mounted in the image forming apparatus, contacts D1, D2 on the chip form contact resistances Rt1, rt2 in fig. 8 with corresponding clock signal terminals, data signal terminals, respectively, in the image forming apparatus, wherein, for convenience of description and calculation, the resistance values of Rt1 and Rt2 described later actually include the resistance value of the contact itself of the first control portion surface, the resistance value of the contact itself of the chip substrate surface, but the resistance value itself is relatively small; as in the above analysis, the resistance values of the contact resistances Rt1, rt2 differ depending on the contact reliability states of the body-side contact and the chip-side contact, and the resistance values also differ; in the embodiment, the special impedance characteristic detected unit is arranged in the chip, so that the resistance values of the contact resistances Rt1 and Rt2 can be accurately detected by matching with the detection unit in the image forming equipment, and then the contact reliability state of the body side contact and the chip side contact is judged according to the resistance values of the contact resistances Rt1 and Rt 2; the detection result is independent of the judgment of the SoC on the MCU, so that when the processing box chip is in a bad condition after being installed, the technical scheme provided by the embodiment can identify whether the chip is bad or bad caused by unreliable contact state of the chip contact and the contact of the image forming device body side; further, if the latter is the case, the main controller of the image forming apparatus may send a prompt to the display panel to the user to pull out the process cartridge, reinstalling the process cartridge according to a correct method; further, the user may be prompted by the display panel to try to clean the contacts on the surface of the chip and the contact portion (e.g., contact probe or spring plate) in the image forming apparatus by himself, thereby performing trouble shooting.
Specifically, the impedance characteristic detected unit provided in the present embodiment includes an impedance branch disposed between the SCL line and the SDA line, and one end of the impedance branch is on the SCL line, between the D1 and the SCL port in the MCU; the other end is on the SDA line, between D2 and the SDA port in the MCU. Preferably, the impedance branch is a resistor R1, although those skilled in the art may split the resistor R1 into a plurality of different series resistors, or use other circuit elements that produce similar impedance parameters (hereinafter also referred to as resistance parameters for a circuit having only a resistor calculation). It should be noted that, as a preferred solution of this embodiment, an impedance element is disposed between the SCL line and the SDA line, and two impedance branches may be arbitrarily selected from other terminals in the chip, such as power supply, ground, SCL, and SDA; in addition, the impedance branch is preferably arranged between the SCL line and the SDA line in this embodiment, which can further help reduce interference with data signals and other signals in the clock signal transmission.
By adopting the technical scheme provided by the embodiment, the impedance branch circuit is arranged in the chip and used as a detected circuit for detecting the contact reliability state of the chip electric contact point and the image forming device body electric contact terminal in a matching way; when the replaceable unit is mounted in the image forming apparatus, if the contact reliability of the chip-side electrical contact point and the image forming apparatus body-side electrical contact terminal is not satisfactory due to improper mounting of the replaceable unit, the state can be detected in time.
The image forming apparatus provided in this embodiment is provided with a detection unit including a first power supply branch and a second power supply branch connected to an impedance branch, the first power supply branch including VCC and a resistor R2 branch in fig. 8; the second power supply branch comprises the VCC and resistor R3 branch of fig. 8; the detection unit also comprises control ports GPIOA and GPIOB for logic signals in the SoC; the AD_In1 end and the AD_In2 end are used for detecting current and voltage parameters; the logic signal control ports GPIOA and GPIOB can be divided into a high-resistance state and a low-resistance state, and can also have an input state and an output state when the logic signal control ports GPIOA and GPIOB are in the high-resistance state, and the resistance value of the logic control ports is infinite when the logic signal control ports GPIOB are in the high-resistance state; in the low-resistance state, there may be input and output states, when the low-resistance state outputs a high level "1", the output power of the logic port is VCC, and when the low-resistance state outputs a low level "0", the voltage of the logic port is a ground voltage.
The embodiment also provides a method for detecting the installation of the chip, which comprises the following steps: acquiring electrical signal parameters of at least one contact terminal of the image forming device body corresponding to an electrical contact connected with an impedance branch in the chip; and judging a contact stable state between the chip electric contact and the image forming device body electric contact terminal based on the electric signal parameter and the impedance parameter of the impedance branch. More specifically, the method comprises:
s1, acquiring first voltage and/or current parameters of a clock signal terminal in an image forming device body;
S2, acquiring second voltage and/or current parameters of a data signal terminal in the image forming device body;
S3, based on impedance parameters, power supply voltage, first voltage and/or current parameters, second voltage and/or current parameters of an impedance branch in a detected unit between a second clock signal terminal and a second data signal terminal in the chip; outputting a first impedance parameter between the first clock signal terminal and the second clock signal terminal and a second impedance parameter between the first data signal terminal and the second data signal terminal;
And S4, outputting contact reliability state information of the second clock signal terminal and the second data signal terminal in the chip and the first clock signal terminal and the first data signal terminal in the image forming device body respectively based on the first impedance parameter and the impedance parameter value.
It should be noted that there is no sequence between the steps S1 and S2, and the steps S1 and S2 may be set to be executed sequentially or simultaneously according to different requirements.
Preferably, the method further comprises: after judging that the contact stability between the chip and the image forming device body meets the requirement, judging whether the chip is good or not, and outputting state information of whether the chip is good or not. The specific judgment on whether the chip is good can refer to the prior art, for example, whether the chip stores predetermined parameters and/or whether the chip has components corresponding to the predetermined model.
Specifically, as shown in fig. 8 and 11, the detection method includes:
The first round of hardware checking for detecting the clock signal terminal in the above step S1:
S1101, GPIOA is set as high-resistance input;
S1102, GPIO is set to a low resistance state to output a low level;
S1103, supplying power to the VCC power supply, wherein the voltage is recorded as Vcc;
S1104, collecting the voltage value of AD_In1 through an ADC IN a main controller of the image forming device, wherein the voltage value is recorded as V AD_IN1;
S1105, closing the VCC power supply.
Since gpio is set to a high-impedance state input and gpio is set to a low-impedance state output low level, the circuit IN fig. 8 is simplified to be a loop (shown IN fig. 9) formed between VCC, R2, rt1, R1, rt2 and gpio, and the voltage value V AD_IN1 of ad_in1 satisfies formula 1:
s1201, calculating a contact resistance value of rt1+rt2:
The image forming apparatus main controller performs: according to the formula 1, calculating to obtain a contact resistance value Rt1+Rt2 obtained by the first round of hardware investigation;
The second round of hardware checking for detecting the data signal terminal in the above step S2:
S1301, GPIOA is set to be in a low resistance state to output low level;
S1302, GPIO is set as high-resistance input;
S1303, supplying power to a VCC power supply, wherein the voltage is recorded as Vcc;
S1304, the voltage value of AD_In2 is acquired by an ADC IN a main controller of the image forming device, and the voltage value is recorded as V AD_IN2.
Since GPIOB is set to low-impedance output low level and GPIOA is set to high-impedance input, a loop is formed between VCC, R3, rt2, R1, rt1 and GPIOA, and the voltage value V AD_IN2 of ad_in2 satisfies formula 3:
s1401, calculating a contact resistance value of rt1+rt2:
the image forming apparatus main controller performs: according to the formula 3, calculating to obtain a contact resistance value Rt1+Rt2 obtained by the second round of hardware investigation;
then, based on the values of the contact resistances rt1+rt2 calculated twice in S1201 and S1401, the following steps are performed:
S1501, is the value of comparison twice rt1+rt2 similar? That is, it is determined whether the resistance value of rt1+rt2 calculated in step S1201 and the resistance value obtained by rt1+rt2 calculated in step S1401 are similar, and in this embodiment, preferably, the allowable error range is similar to 10%, that is, it is determined whether the resistance value of rt1+rt2 of formula 2 minus the resistance value of rt1+rt2 of formula 4, and then the difference is divided by the resistance value of rt1+rt2 of formula 2 or the resistance value of rt1+rt2 of formula 4, and the resulting error is greater than 10%. If yes, go to step S1601, otherwise go to step S1502;
s1502, judging that the hardware circuit of the SoC or the chip is abnormal, and then reporting a hardware abnormal error (S1503);
It should be noted that, in the technical solution provided in this embodiment, after the image forming apparatus is started, the SoC will self-check, so in the chip detection process provided in this embodiment, it is assumed that the SoC hardware is normal, and the "reporting hardware exception error" mentioned in all descriptions generally refers to hardware exception at the chip side, and considering that the time difference between two times of the chip is not too long, and the replaceable unit will not have a large displacement change in the time interval between two times almost after the installation in the image forming apparatus is completed, so the resistance value of the contact resistor rt1+rt2 will not change theoretically; therefore, it can be presumed that the maximum possibility is that there is an abnormality in the resistance R1 in the detected unit; therefore, the "report hardware exception error" mentioned in this embodiment corresponds to the normal case that R1 has an exception. In addition, the reference to 10% in the above steps is only an exemplary illustration, and those skilled in the art may also use other parameters to design, for example, 1%, 2%, 5%, 8%, 12%, 15%, 20%, etc., according to the accuracy requirements in the specific application scenario.
S1601, judging whether the resistance value of Rt1+Rt2 is within the upper and lower ranges of the ideal contact resistance value; if yes, go to step S1701, otherwise go to step S1602;
S1602, judging that the contact between the body side contact and the chip side contact is abnormal, and then reporting a contact abnormality error (S1603);
S1701, judging that physical connection of the body side contact and the chip side contact is not abnormal;
s1702, ending.
By adopting the technical scheme provided by the embodiment, the contact stable state between the chip electric contact and the image forming device body electric contact terminal can be accurately judged; thus, the contact between the chip electrical contact and the image forming apparatus body electrical contact terminal is unreliable due to an error caused by improper installation of the replaceable unit, and the user can be accurately notified.
Although fig. 11 is based on the detection of the impedance branch being arranged between D1 and D2 in fig. 8, a similar detection method is equally applicable for the case where the impedance branch is arranged between other contacts in the power supply, ground, SCL, SDA. Although the above-described sampling is performed using a voltage value, the sampling may be performed by detecting a current value or detecting both the voltage value and the current value, if the conditions allow.
Example two
The present embodiment is also provided with the same image forming apparatus, replaceable unit as in the first embodiment; the difference is that the internal circuits of the chip are different, and the corresponding chip mounting detection methods are also different. Specifically:
As shown in fig. 12, the impedance characteristic detected unit in the chip in the present embodiment is different from the specific circuit in the first embodiment, but the impedance parameter between the chip side contact and the image forming apparatus body side contact is detected based on a loop formed between the impedance characteristic detected unit and the reliability state between the chip side contact and the image forming apparatus body side contact, and further the detection of the contact reliability between the chip side contact and the image forming apparatus body side contact is completed. Since the impedance characteristic detected unit in the chip is different from the specific circuit in the first embodiment, the detecting unit in the image forming apparatus provided in the present embodiment is also changed accordingly. Specifically:
The detected unit in the chip provided in this embodiment is also provided with an impedance branch, but the impedance branch provided in this embodiment includes a first resistance element and a second resistance element of a predetermined size; one end of the first resistor element is connected with the clock signal terminal, and the other terminal is grounded; one end of the second resistor element is connected with the data signal terminal, and the other end of the second resistor element is grounded. More specifically, as shown in fig. 12, the chip and image forming apparatus body side connection circuit provided in the present embodiment includes: a first control circuit 410 located on the image forming apparatus side and a second control circuit 420 located on the chip side; and a contact circuit 430 formed between the image forming apparatus side contact and the chip side contact; the impedance branch circuit in the embodiment comprises a resistor R8 and a resistor R11, wherein one end of the resistor R8 is connected with the clock data contact, and the other end of the resistor R8 is grounded; one end of the resistor R11 is connected with the data signal contact, and the other end is grounded. And the detection unit in the image forming apparatus includes: a resistor R7 is also arranged between the clock signal terminal on the body side and the SoC, and a resistor R10 is arranged between the data signal terminal on the body side and the SoC; and the main body side is also provided with a first power supply branch (VCC and a resistor R6), a second power supply branch (VCC and a resistor R9), and a sampling point ADC2 between R7 and Rt1, and a sampling point ADC3 between R10 and Rt 2; in this embodiment, the ports scl_ctl and sda_ctl on the image forming apparatus side are respectively used as a clock signal port and a data signal port in the chip during operation, and are connected with the clock signal port and the data signal port in the chip; but is used as the same logical control port as in the first embodiment in the chip mounting inspection process provided in the present embodiment.
By adopting the technical scheme provided by the embodiment, the impedance branch circuit is arranged in the chip and used as a detected circuit for detecting the contact reliability state of the chip electric contact point and the image forming device body electric contact terminal in a matching way; when the replaceable unit is mounted in the image forming apparatus, if the contact reliability of the chip-side electrical contact point and the image forming apparatus body-side electrical contact terminal is not satisfactory due to improper mounting of the replaceable unit, the state can be detected in time.
The chip detection method corresponding to fig. 12 also includes:
s1, acquiring first voltage and/or current parameters of a clock signal terminal in an image forming device body;
S2, acquiring second voltage and/or current parameters of a data signal terminal in the image forming device body;
S3, based on impedance parameters, power supply voltage, first voltage and/or current parameters, second voltage and/or current parameters of an impedance branch in a detected unit between a second clock signal terminal and a second data signal terminal in the chip; outputting a first impedance parameter between the first clock signal terminal and the second clock signal terminal and a second impedance parameter between the first data signal terminal and the second data signal terminal;
and S4, outputting contact reliability state information of the second clock signal terminal and the second data signal terminal in the chip and the first clock signal terminal and the first data signal terminal in the image forming device body respectively based on the first impedance parameter and the second impedance parameter value.
As shown in fig. 15, the detection method provided in this embodiment specifically includes:
The first round of hardware checking for detecting the clock signal terminal in the above step S1:
S2101, outputting high level by SCL port and low level by SDA port; thus scl_ctl, R7, rt1, R8, GND form a loop (as shown in fig. 13);
s2102, sampling the voltage value of the ADC 2;
s2103, calculating a resistance value Rt1 of Rt1 on the SCL line:
The second round of hardware checking for detecting the data signal terminal in the above step S2:
s2201, SCL port outputs low level and SDA port outputs high level; thus SDA_CTL, R10, rt2, R11 and GND form a loop; (as shown in FIG. 14)
S2202, sampling the voltage value of the ADC 3;
S2203, calculating a resistance value Rt2 of Rt2 on the SCL line:
different from the first embodiment, each round of hardware investigation in the present embodiment can separately complete the detection of the impedance value between the corresponding contacts, so that the determination of the contact reliability of the corresponding contacts can be directly determined, that is, part of the determination information in step S3 can be completed before step S2; specifically:
After step S2103, step S2104 may be directly entered: judging whether Rt1 meets the electrical requirement, namely judging whether the resistance value of Rt1 in the result calculated by the formula 5 is in a specified range; if yes, go to step S2201, otherwise go to step S2106;
S2106, reporting contact abnormality and ending;
After step S2203, step S2204 may be directly performed: judging whether Rt2 meets the preset requirement, namely whether the resistance value of Rt2 in the result calculated by the formula 6 is in a specified range or not; if yes, go to step S2205, otherwise go to step S2206;
s2205, judging that the hardware is normal, and entering the next step; for example, further attempts may be made to detect whether parameters within the MCU in the chip meet the requirements;
s2206, reporting contact abnormality and ending.
Preferably, after step S2204, it is also possible to increase the determination as to whether Rt1 is close to the contact resistance value of Rt2, for example, whether the error between them is within the range of 10%; if yes, step S2205 is performed, otherwise step S2206 is performed. Since the physical characteristic difference of each contact point on the chip side is small, each contact point on the image forming apparatus side is also substantially the same; the contact resistance values of Rt1 and Rt2 should be the same in theory; within the allowable manufacturing error range (e.g., 10%), the values of Rt1 and Rt2, if different, indicate that the hardware manufacturing may be out of order or the replaceable unit may be in incorrect contact during installation; therefore, by adding this preferable judgment step, the detection result of whether the chip contact reliability is good can be further improved.
By adopting the technical scheme provided by the embodiment, the contact stable state between the chip electric contact and the image forming device body electric contact terminal can be accurately judged; thus, the contact between the chip electrical contact and the image forming apparatus body electrical contact terminal is unreliable due to an error caused by improper installation of the replaceable unit, and the user can be accurately notified.
In addition, in the above technical solution provided in this embodiment, before the SoC communicates with the chip, the hardware condition is first detected, and if the hardware condition is good, normal communication is performed, so as to ensure data security and completeness in the communication process.
Example III
The second embodiment is further optimized based on the second embodiment, mainly comprising the steps of firstly detecting the power-on and power-off time sequence of the chip, then detecting the contact impedance of the communication line, and then communicating based on the normal power-on and power-off time sequences and the normal contact impedance of the communication line, thereby effectively preventing the error data communication caused by abnormal hardware.
Specifically, the hardware circuit provided in this embodiment includes, in addition to the description of embodiment two to fig. 12, a power supply line VCC on the chip side, a resistor R5 located between the power supply terminal and the MCU, a capacitor C2 with one end connected to R5 and the other end connected to ground; a power supply terminal VCC on the body side, Q1 and QI connected with the VCC are respectively connected with a power supply VCC_controller and one end of R4, the other end of R4 is connected with the power supply terminal on the body side, and a capacitor C1 is arranged between the other end of R4 and the ground; and performing ADC (analog to digital converter) on the other end of the R4 to obtain a voltage value of the ADC 1.
In the above circuit provided by the embodiment, an ideal ADC1 power-up sampling curve obtained by testing or calculating should be shown in fig. 16, and an ideal ADC1 power-down sampling curve should be shown in fig. 18; therefore, the present embodiment can detect whether there is an abnormality between the power supply connections on the body side and the chip side by comparison. The method comprises the following steps:
As shown in fig. 17, the power-on detection method is as follows:
s3101, initializing an ADC;
S3102, the VCC_controller outputs high, powers on the chip, and marks the current time t0;
S3103, 4= > n, i.e. n is assigned with 4;
S3104, judging that the voltage value acquired by the ADC1 is lower than n/4VCC; if yes, executing step S3105, otherwise, returning to continue the judgment;
S3105, recording the current time tn, n-1= > n; i.e. n is assigned a value equal to n-1;
S3106, determining whether "n= 0" is true, if yes, executing step S3107, otherwise returning to step S3104;
S3107, judging the adjacent difference value range of t0 to t4, and then executing step S3108;
the timing of the arrangement in step S3108, step S3107 satisfies the power-on timing in fig. 16; if not, step S3109 is performed, otherwise step S3110 is performed;
S3109, reporting a hardware error, and ending;
S3110, go to the next step, for example, to detect contact reliability as mentioned earlier.
As shown in fig. 19, the power failure detection method is as follows:
s4101, initializing an ADC;
S4102, the VCC_controller outputs high, powers on the chip, and marks the current time t0;
S4103, 1= > n, i.e. n is assigned with 1;
S4104, judging that the voltage value acquired by the ADC1 reaches n/4VCC; if yes, go to step S4105, otherwise return to the resampling decision of this step;
s4105, recording a current time tn, n+1= > n; i.e. n is assigned a value equal to n+1;
S4106, n+=4? ; judging whether "n= 4" is true, if yes, executing step S4107, otherwise returning to step S4104;
S4107, judging the adjacent difference value range of t0 to t4, and then executing step S3108;
S4108, the timing sequence consolidated in step S4107 satisfies the power-on timing sequence in fig. 18; if not, executing step S4109, otherwise executing step S4110;
S4109, reporting a hardware error, and ending;
s4110, proceed to the next step, such as the aforementioned detection of contact reliability. The technical scheme provided by the embodiment ensures that the power supply response of the chip on the power supply and the power supply inside the chip is normal by detecting the power-on and power-off performance of the power supply of the chip; communication is ensured under the condition of good hardware foundation by detecting the contact resistance between the body side contact and the chip side contact.
Example IV
The present embodiment is also provided with the same image forming apparatus, replaceable unit; the difference is that the internal circuits of the chips are different, and the corresponding chip installation detection methods are also different; and in the circuit provided in relation to the first or second embodiment, the impedance characteristic detected unit mentioned in the present embodiment also includes a plurality of contact resistances, each contact resistance value also includes a sum of a self resistance of the contact resistance corresponding to the chip side contact (not shown) and a self resistance of the contact resistance corresponding to the image forming apparatus body side contact (not shown), respectively, for convenience of description and calculation; the signs of the resistors and capacitors used in the present embodiment in the circuit are somewhat different from those of the previous embodiment, but the corresponding meanings of these components are clear to those skilled in the art, and the meanings of the signs of the different signs are somewhat the same, so that the explanation will not be repeated.
The impedance characteristic detected unit in the chip in the present embodiment is different from the specific circuits in the first and second embodiments, but the impedance parameter (resistance parameter in the present embodiment) between the chip side contact and the image forming apparatus body side contact is detected based on a loop formed between the impedance characteristic detected unit and the reliability state between the chip side contact and the image forming apparatus body side contact, and the detection of the contact reliability between the chip side contact and the image forming apparatus body side contact is further completed. Since the impedance characteristic detected unit in the chip is different from the specific circuits in the first and second embodiments, the detecting unit in the image forming apparatus provided in the present embodiment is also changed accordingly. Specifically:
As shown in fig. 20, in the present embodiment, the ports scl_ctl and sda_ctl on the image forming apparatus side are respectively connected as a clock signal port and a data signal port in the chip during operation; but is used as the same logic control port as the first and second embodiments in the chip mounting detection process provided in the present embodiment. And the branch corresponding to the VCC side of the image forming apparatus side includes a control terminal connected to the SoC, the control terminal being connected to the power VCC through a transistor Q41, and the other terminal of the transistor Q41 being directly connected to a fixed resistor R41, the other end of the fixed resistor R41 being connected to a capacitor C41, the other end of the capacitor C41 being connected to a power terminal as a power supply to the chip, and an ADC1 signal sampling terminal being further provided between the SoC and the power terminal. The chip side (circuit corresponding to the right side of the dotted line frame in fig. 20) is provided with contact terminals corresponding to the image forming apparatus side detection circuits (circuit corresponding to the left side of the dotted line frame in fig. 20), respectively; note that VCC, SCL, SDA, GND corresponding to the chip side in fig. 20 indicates a branch or a contact corresponding to the image forming apparatus side detection circuit, respectively. And the core provided by the embodiment is internally provided with a plurality of diodes D1, D2, D3 and D4 which are in unidirectional conduction and an internal resistance R connected with the diodes in parallel.
The operation of the detection circuit of fig. 20 includes:
1. SDA_CTL on the image forming apparatus side is supplied with power at a high level, while SCL_CTL on the image forming apparatus side is left open, VCC on the image forming apparatus side is not supplied with voltage; and only diode D3 is conducted, the corresponding circuit simplified diagram is shown in FIG. 21, and only Rt2, rt3 and Rt4 are unknown variables in the whole loop;
2. Scl_ctl on the image forming apparatus side is supplied with power at a high level, while sda_ctl on the image forming apparatus side is open, VCC on the image forming apparatus side does not supply voltage; and only diode D1 is conducted, the corresponding circuit simplified diagram is shown in FIG. 22, and only Rt1, rt3 and Rt4 are unknown variables in the whole loop;
3. VCC on the image forming apparatus side supplies voltage, SCL_CTL, SDA_CTL on the image forming apparatus side are in open circuit; the diodes are not conductive, and the corresponding circuit simplified diagram is shown in fig. 23, where only Rt3 and Rt4 are unknown variables in the whole loop.
In the detection process provided by the embodiment, the resistance value of each contact resistor is not directly compared and calculated; the curves of the capacitor C41 on or off in the process of charging and discharging the capacitor C41 are collected through the 3 conditions respectively; specific procedures can refer to the detection method in the third embodiment, and whether the parameter ranges of Rt1, rt2, rt3 and Rt4 meet the preset requirements is estimated by comparing whether the charge and discharge of the capacitor C41 meet the preset requirements; it is further estimated whether or not the contact between the image forming apparatus and the chip in the replaceable unit satisfies a predetermined requirement.
By adopting the technical scheme provided by the embodiments of the invention, the electrical characteristic parameters corresponding to the reliability of the contact points between the image forming device and the chips in the replaceable unit are detected through the electrical performance of serial bus (including IIC, USART and the like) communication, so that the connection physical characteristics between the image forming device and the chips in the replaceable unit are accurately obtained, and the reason that consumable materials are not identified is accurately indicated to a user to be caused by the contact reason or the problem of the chips.
Those of ordinary skill in the art will appreciate that all or a portion of the steps of implementing the various method embodiments described above may be implemented by hardware associated with program instructions. The foregoing program may be stored in a computer readable storage medium. The program, when executed, performs steps including the method embodiments described above; and the aforementioned storage medium includes: ROM, RAM, magnetic or optical disks, etc. that can store the program code.
Finally, it should be noted that the above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention in any way. Any person skilled in the art will make many possible variations and simple alternatives to the technical solution of the invention without departing from the scope of the invention and the technical content, which are all within the scope of the technical solution of the invention.
Claims (14)
1. A chip for a replaceable unit in an image forming apparatus, the chip comprising:
A storage unit storing the replaceable unit performance parameters;
a substrate provided with a clock signal terminal, a data signal terminal, and a connection circuit capable of transmitting an electric signal;
The connecting circuit comprises an impedance branch circuit positioned between the clock signal terminal and the data signal terminal, the impedance branch circuit is used as a detected circuit and used for detecting contact reliability states between the clock signal terminal and the data signal terminal and the clock signal terminal and the data signal terminal respectively arranged on the image forming device body, and the contact reliability states are used for indicating whether data transmission is effective or not when data transmission between the chip and the image forming device is enabled.
2. The chip of claim 1, wherein the impedance branch includes a resistive element of a predetermined impedance value, the resistive element having one end connected to the clock signal terminal and the other end connected to the data signal terminal.
3. A chip for a replaceable unit in an image forming apparatus, the chip comprising:
A storage unit storing the replaceable unit performance parameters;
a substrate provided with a clock signal terminal, a data signal terminal, and a connection circuit capable of transmitting an electric signal;
Wherein, the connection circuit includes: a first impedance branch with one end connected with the clock signal terminal and the other end grounded; and one end of the second impedance branch is connected with the data signal terminal, the other end of the second impedance branch is grounded, the impedance branch is used as a detected circuit and used for cooperatively detecting the contact reliability state between the clock signal terminal and the data signal terminal and the clock signal terminal and the data signal terminal which are respectively arranged on the image forming device body, and the contact reliability state is used for indicating whether the data transmission is effective or not when the data transmission between the chip and the image forming device is enabled.
4. A chip for a replaceable unit of an image forming apparatus on which electrical contact terminals are provided, the chip comprising:
a storage unit storing relevant parameters of the replaceable unit;
A plurality of electrical contacts electrically connected with the electrical contact terminals;
The image forming device is characterized by further comprising an impedance branch, wherein one end of the impedance branch is connected with at least one of the electric contacts and is used for detecting contact reliability between the electric contact connected with the impedance branch and an electric contact terminal of the image forming device, and the contact reliability detection result is used for indicating whether data transmission is effective or not when the data transmission between the chip and the image forming device is enabled; wherein the electrical contact includes at least one of a clock signal terminal, a data signal terminal.
5. The chip of claim 4, wherein the other end of the impedance branch is connected to another electrical contact so that the chip, after being mounted to the image forming apparatus, can form a circuit for detecting reliability of electrical connection.
6. The chip of claim 5, wherein the impedance branch has one end connected to a clock signal terminal of the image forming apparatus and the other end connected to a data signal terminal of the image forming apparatus.
7. The chip of claim 4, wherein the other end of the impedance branch is grounded so that the chip, after being mounted to the image forming apparatus, can form a loop for detecting reliability of electrical connection.
8. The chip according to claim 5 or 7, wherein the circuit for detecting the reliability of the electrical connection is a circuit formed between the image forming apparatus and the chip after the replaceable unit is mounted to the image forming apparatus, and an electrical characteristic formed by contact between at least one of the plurality of electrical contacts in the chip and a corresponding electrical contact terminal of the image forming apparatus in the circuit is obtained by sampling a voltage and/or a current of the circuit; and determining a reliability of electrical connection between at least one of the plurality of electrical contacts in the chip and a corresponding electrical contact terminal of the image forming apparatus based on the electrical characteristics of the contact formation.
9. A method of mounting and testing a chip, the chip comprising an impedance branch, one end of the impedance branch being connected to at least one of the electrical contacts; the method comprises the following steps:
acquiring electrical signal parameters of at least one electrical contact terminal of the image forming device body, wherein the electrical contact terminal corresponds to an electrical contact connected with an impedance branch in the chip;
and judging a contact stable state between the chip electric contact and the image forming device body electric contact terminal based on the electric signal parameter and the impedance parameter of the impedance branch, wherein the contact stable state is used for indicating whether data transmission is effective or not when the data transmission between the chip and the image forming device is enabled.
10. The method of claim 9, wherein determining a contact steady state between the chip and the image forming apparatus body based on the electrical signal parameter and the impedance parameter of the impedance branch comprises:
calculating an impedance value between an electrical contact point to which the impedance branch is connected and an electrical contact terminal of the image forming apparatus based on the electrical signal parameter;
And judging the contact stable state between the chip and the image forming device body based on the impedance value.
11. The method as recited in claim 10, further comprising: and after judging that the contact stability between the chip and the image forming device body meets the requirement, judging whether the chip is good or not, and outputting state information of whether the chip is good or not.
12. A replaceable unit for an image forming apparatus provided with an electric contact terminal, comprising:
A developing cartridge provided with a housing, a developer accommodating unit accommodating a developer in the housing, a developer conveying member conveying the developer, and a chip on an outer surface of the housing; the chip comprises:
A storage unit storing the replaceable unit performance parameters;
A plurality of electrical contacts electrically connected with the electrical contact terminals;
The chip is characterized by further comprising an impedance branch, wherein one end of the impedance branch is connected with at least one of the electric contacts, the impedance branch is used for detecting contact reliability between the electric contacts connected with the impedance branch and the electric contact terminals of the image forming device, and the contact reliability detection result is used for indicating whether data transmission is effective or not when the data transmission between the chip and the image forming device is enabled, and the electric contacts comprise at least one of clock signal terminals and data signal terminals.
13. A replaceable unit for an image forming apparatus provided with an electric contact terminal, comprising:
The device comprises a drum assembly, a photosensitive drum, a charging roller and a chip, wherein the drum assembly is provided with a developing box accommodating part for accommodating a developing box, the photosensitive drum, the charging roller for charging the photosensitive drum and the chip positioned on the outer surface of a shell of the drum assembly; the chip comprises:
A storage unit storing the replaceable unit performance parameters;
A plurality of electrical contacts electrically connected with the electrical contact terminals;
The chip is characterized by further comprising an impedance branch, wherein one end of the impedance branch is connected with at least one of the electric contacts, the impedance branch is used for detecting contact reliability between the electric contacts connected with the impedance branch and the electric contact terminals of the image forming device, and the contact reliability detection result is used for indicating whether data transmission is effective or not when the data transmission between the chip and the image forming device is enabled, and the electric contacts comprise at least one of clock signal terminals and data signal terminals.
14. An image forming apparatus, comprising:
A body accommodating the replaceable unit, the body being provided therein with a communication unit connected to the chip, the communication unit being provided with a plurality of electrical contact terminals;
A replaceable unit provided with a developing cartridge and/or a drum assembly, the developing cartridge being provided with a housing, a developer accommodating unit accommodating a developer, a developer conveying member conveying the developer, and a chip located on an outer surface of the housing, which are located in the housing; the drum assembly is provided with a developing box accommodating part for accommodating a developing box, a photosensitive drum, a charging roller for charging the photosensitive drum and a chip positioned on the outer surface of the shell of the drum assembly; the chip comprises:
A plurality of electrical contacts electrically connected with the electrical contact terminals, wherein the electrical contacts include at least one of clock signal terminals, data signal terminals;
The chip further comprises an impedance branch, wherein one end of the impedance branch is connected with at least one of the electric contacts, and is used for detecting the contact reliability between the electric contact connected with the impedance branch and the electric contact terminal of the image forming device, and the contact reliability detection result is used for indicating whether the data transmission is effective when the data transmission between the chip and the image forming device is enabled;
And a detection unit for detecting electric signal parameters of at least one electric contact terminal of the image forming device body corresponding to the electric contact connected with the impedance branch in the chip is also arranged in the body.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710942835.2A CN107599656B (en) | 2017-10-11 | 2017-10-11 | Chip, mounting detection method thereof, replaceable unit and image forming apparatus |
| RU2020113730A RU2736558C1 (en) | 2017-10-11 | 2018-09-28 | Chip and a method of recording its installation, a replaceable unit and an image forming device |
| PCT/CN2018/108352 WO2019072108A1 (en) | 2017-10-11 | 2018-09-28 | Chip and installation detection method therefor, replaceable unit and image formation device |
| US16/846,316 US10996611B2 (en) | 2017-10-11 | 2020-04-11 | Chip and replaceable unit of image forming apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201710942835.2A CN107599656B (en) | 2017-10-11 | 2017-10-11 | Chip, mounting detection method thereof, replaceable unit and image forming apparatus |
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| CN107599656A CN107599656A (en) | 2018-01-19 |
| CN107599656B true CN107599656B (en) | 2024-06-21 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| RU2736558C1 (en) * | 2017-10-11 | 2020-11-18 | Чжухай Пантум Электроникс Ко., Лтд. | Chip and a method of recording its installation, a replaceable unit and an image forming device |
| CN109298615B (en) * | 2018-11-09 | 2021-08-24 | 珠海奔图电子有限公司 | Consumable chip, image forming apparatus, image forming method, and consumable |
| CN112269120A (en) * | 2020-11-05 | 2021-01-26 | 深圳市广和通无线股份有限公司 | Interface signal loop test method and device, computer equipment and storage medium |
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| CN207416329U (en) * | 2017-10-11 | 2018-05-29 | 珠海奔图电子有限公司 | Chip, replaceable unit and image forming apparatus |
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| JP3542402B2 (en) * | 1995-04-14 | 2004-07-14 | キヤノン株式会社 | Process cartridge |
| CN102173206B (en) * | 2011-01-06 | 2013-04-10 | 珠海天威技术开发有限公司 | Consumable chip and consumable container |
| WO2014104511A1 (en) * | 2012-12-24 | 2014-07-03 | Samsung Electronics Co., Ltd. | Crum chip and image forming device for authentication and communication, and methods thereof |
| CN103753962B (en) * | 2013-12-26 | 2016-06-22 | 珠海艾派克微电子有限公司 | A kind of imaging cartridge, imaging box chip and short circuit bypassing method thereof |
| CN104354473B (en) * | 2014-09-29 | 2016-03-30 | 珠海艾派克微电子有限公司 | A kind of imaging box chip and imaging cartridge |
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| CN205818712U (en) * | 2016-04-29 | 2016-12-21 | 珠海赛纳打印科技股份有限公司 | Installation detecting device, image processing system and disassembly treating box |
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