JP2013218199A - Consumable unit and image forming apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide consumable units capable of reducing the number of electrodes used for electric connection between a main body of an image forming apparatus and the consumable units including nonvolatile memories.SOLUTION: Tag boards 70 and 80 attached to consumable units 23 and 23a include: nonvolatile serial EEPROMs 71 and 81; external electrodes 75 and 85 that include clock electrodes 75a and 85a, data electrodes 75b and 85b, and ground electrodes 75c and 85c and are electrically connected to connection electrodes 66 and 67 of an image forming apparatus 1 (a print controller 60) when the consumable units are installed in the image forming apparatus 1; and capacitors 74 and 84 of which one sides are connected to the clock electrodes 75a and 85a via resistors 72 and 82 mutually connected in parallel and diodes 73 and 83, and the other sides are connected to the ground electrodes 75c and 85c. Power supply terminals (Vcc) of the serial EEPROMs 71 and 81 are connected to the one sides of the capacitors 74 and 84 respectively.

Description

  The present invention relates to a consumable unit and an image forming apparatus to which the consumable unit is detachably mounted.

  2. Description of the Related Art Conventionally, electrophotographic image forming apparatuses in which consumable units such as toner cartridges or developing unit units are detachable (replaceable) have been put into practical use. Also, a tag board on which a non-volatile memory such as EEPROM is mounted is attached to such a consumable unit, and for example, the lot number of the consumable unit, the remaining amount of toner, the number of prints, the installation date, old / new detection, etc. It is known to manage the usage status of the consumable unit by storing the information (for example, see Patent Document 1).

JP 2007-52275 A

  By the way, the image forming apparatus main body and the tag substrate attached to the consumable unit are configured to be electrically connected by mounting the consumable unit on the image forming apparatus main body. More specifically, for example, an external electrode formed in a pad shape is formed on a tag substrate, and a connection electrode such as a coil spring or a battery connector provided on the image forming apparatus main body side is provided on the external electrode. By abutting, both are electrically connected.

  On the other hand, in order to reduce the contact failure between the electrodes and improve the connection reliability, and to further reduce the area of the tag substrate on which the memory is mounted, for example, the connection is made via a coil spring as described above. It has been desired to reduce the number of electrodes that are made.

  The present invention has been made to solve the above-described problems, and reduces the number of electrodes used for electrical connection between the image forming apparatus main body and a consumable unit having a nonvolatile memory. It is an object of the present invention to provide a consumable unit and an image forming apparatus capable of performing the above.

  A consumable unit according to the present invention is a consumable unit that can be attached to and detached from an image forming apparatus. Three external electrodes including a memory, a clock electrode, a data electrode, and a ground electrode, which are electrically connected to the connection electrode on the image forming apparatus side when mounted on the image forming apparatus, and one end of the clock electrode And a capacitor having a second end connected to a ground electrode, a clock terminal of the memory connected to the clock electrode, a data terminal connected to the data electrode, a ground terminal connected to the ground electrode, and a power supply terminal The capacitor is connected to one end of the capacitor.

  According to the consumable unit according to the present invention, the power supply terminal of the memory is connected to one end of the capacitor connected to the clock electrode. Therefore, when the clock signal is High, power is supplied to the power supply terminal of the memory and the capacitor is charged. Further, when the clock signal is low, the charge charged in the capacitor is supplied to the power supply terminal of the memory. Therefore, it is not necessary to connect the power line on the image forming apparatus side and the power line of the consumable unit. That is, the external electrode for connecting both power supply lines can be eliminated. As a result, the number of electrodes used for electrical connection between the image forming apparatus main body and the consumable unit having a nonvolatile memory can be reduced.

  In the consumable unit according to the present invention, it is preferable that one end of the capacitor is connected to the clock electrode via a resistor and a diode connected in parallel with each other.

  In this way, the same voltage is applied to both the resistor and the diode. Therefore, the current value supplied to the capacitor is a value obtained by adding the current values flowing through the resistor and the diode. Therefore, it is possible to improve the charging speed of the capacitor.

  In the consumable unit according to the present invention, the memory is preferably a serial EEPROM. As described above, when the serial EEPROM is used, the number of electrodes used for wiring and connection can be reduced as compared with the case where a parallel bus type memory is used.

  In the consumable unit according to the present invention, it is preferable that the low level time in one clock of the clock signal input to the clock terminal is on the order of microseconds, and the capacitor is a chip type multilayer ceramic capacitor.

  In this way, by setting the capacitance of the capacitor in consideration of the low level time of the clock signal, the chip-type multilayer ceramic capacitor, that is, a very small capacitor, allows the memory of the memory while the clock signal is low. It is possible to supply power to the power supply terminal.

  The consumable unit according to the present invention is preferably a toner cartridge containing toner and / or an electrophotographic developer unit.

  In the image forming apparatus according to the present invention, in the image forming apparatus in which any of the above consumable units is detachably mounted, when the consumable unit is mounted, the three external electrodes included in the consumable unit and the electric It is preferable to provide three connection electrodes that are connected to each other.

  According to the image forming apparatus of the present invention, since any one of the consumable units is detachably mounted, the power line on the image forming apparatus side and the power line of the consumable unit are connected as described above. There is no need. That is, the electrode for connecting both power supply lines can be deleted. As a result, the number of electrodes used for electrical connection between the image forming apparatus and the consumable unit having a nonvolatile memory can be reduced.

  In the image forming apparatus according to the present invention, it is preferable that the three connection electrodes include a connection electrode that outputs a clock signal, and the connection electrode that outputs the clock signal is connected to an output of the backflow prevention circuit.

  In this way, when the clock signal is low, it is possible to prevent the charge charged in the capacitor of the consumable unit from flowing (discharged) to the image forming apparatus that outputs the clock signal. Become.

  According to the present invention, it is possible to reduce the number of electrodes used for electrical connection between the image forming apparatus main body and a consumable unit having a nonvolatile memory.

1 is a cross-sectional view illustrating a configuration of an image forming apparatus to which a consumable unit according to an embodiment is mounted. FIG. 3 is a circuit diagram showing electrical connection when the consumable unit according to the embodiment is mounted on the image forming apparatus. It is a figure for demonstrating the charging current (charging speed) of a capacitor | condenser.

  DESCRIPTION OF EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. In addition, in each figure, the same code | symbol is attached | subjected to the same element and the overlapping description is abbreviate | omitted.

  First, the configuration of the image forming apparatus 1 equipped with the developing unit 23 and the toner cartridge 23a as the consumable unit according to the embodiment will be described with reference to FIGS. FIG. 1 is a cross-sectional view schematically showing the configuration of the image forming apparatus 1 to which the developing unit 23 and the toner cartridge 23a are mounted. FIG. 2 is a circuit diagram showing electrical connections when the developing unit 23 and the toner cartridge 23a are mounted on the image forming apparatus 1.

  The image forming apparatus 1 is an electrophotographic image forming apparatus. A document reading unit 2 is disposed in the upper part of the image forming apparatus 1, and a paper feeding unit 3 and a recording unit 4 are disposed in the lower part thereof.

  In the document reading unit 2, when a document is set on the document tray 11 provided on the document cover 10, the document is transported and read by the document transport mechanism 12 to a position facing the reading device 9, and then the document is discharged. It is discharged to the paper tray 13. When reading a book or the like, the document cover 10 is rotated upward to place a portion to be read such as a book on the platen 14 and the reading device 9 performs a reading operation.

  The paper feed unit 3 is provided with a paper feed cassette 15, and a plurality of recording sheets of a predetermined size are stacked on a flapper 16 arranged at the lower part of the paper feed cassette 15. A pickup roller 17 is disposed at the end of the paper feed cassette 15, and the flapper 16 is urged upward by a spring member so that the upper surface of the stacked recording paper is pressed against the pickup roller 17. For this reason, when the pickup roller 17 is rotationally driven, the recording paper is fed one by one to the recording paper conveyance path by the frictional action of the friction pad attached to the surface of the pickup roller 17 and the recording paper. In FIG. 1, the recording paper conveyance path is indicated by a one-dot chain line.

  The paper fed from the paper feed cassette 15 is first conveyed to the recording unit 4 by the pair of registration rollers 18 and 19. The recording unit 4 mainly records the photosensitive drum 20, the charger 21, the exposure head 22, the developing unit 23, the transfer roller 24, the cleaning blade 25, and the fixing roller 26 in order to record image information on the conveyed paper. Etc. are provided.

  The photosensitive drum 20 has a cylindrical shape, and a photoconductive film having a predetermined thickness is provided on the outer peripheral surface as a photosensitive member. The photosensitive drum 20 is rotationally driven by an electric motor. Around the photosensitive drum 20, a charger 21, an exposure head 22, a developing unit 23, a transfer roller 24, and a cleaning blade 25 are arranged in this order along the rotation direction. Then, the image is formed on the surface by the developing unit 23.

  The charger 21 is a so-called scorotron charger (corona charger) in which a corona wire made of a thin wire such as tungsten is surrounded by a casing, and uniformly charges the surface of the photosensitive drum 20.

  The exposure head (exposure device) 22 irradiates the surface of the photosensitive drum 20 with laser light to expose it, thereby forming an electrostatic latent image. More specifically, the exposure head 22 irradiates the surface of the photosensitive drum 20 that is uniformly charged with laser light based on image information input from the printer controller 60 to expose the surface of the photosensitive drum 20. Thus, an electrostatic latent image corresponding to the image information is formed.

  The developing unit 23 is provided on the downstream side of the exposure head 22 along the rotation direction of the photosensitive drum 20. A detachable toner cartridge 23 a is provided above the developing unit 23, and a predetermined amount of nonmagnetic one-component toner in the toner cartridge 23 a is appropriately supplied into the developing unit 23. The developing unit 23 transfers toner onto the electrostatic latent image on the photosensitive drum 20 by the supply roller 27 and the developing roller 28 to form a toner image.

  The developing device unit 23 and the toner cartridge 23a are consumable units configured to be detachable from the image forming apparatus 1. The developing unit 23 may be configured to be attached to and detached from the image forming apparatus 1 alone, or may be configured to be attached and detached together with the above-described photosensitive drum 20 and the like. . Hereinafter, the developing unit 23 and / or the toner cartridge 23a are also referred to as consumable units 23 and 23a. The developing unit 23 and the toner cartridge 23a can be attached and detached by opening a cover (front cover) provided on the front surface of the image forming apparatus 1.

  A tag substrate 70 on which a nonvolatile memory 71 is mounted is attached to the developing unit 23 (details will be described later). The nonvolatile memory 71 stores various information including identification information of the developing unit 23 (for example, life counter information, history information, etc.). Similarly, a tag substrate 80 on which a nonvolatile memory 81 is mounted is attached to the toner cartridge 23a (details will be described later). The nonvolatile memory 81 stores various information including identification information of the toner cartridge 23a (for example, toner filling amount information, toner remaining amount information, history information, etc.).

  Here, the tag substrates 70 and 80 are made of, for example, small double-sided substrates, and non-volatile memories 71 and 81 are mounted on one surface, and are electrically connected to a printer controller 60 described later on the other surface. External electrodes 75 and 85 formed in a pad shape are formed. Further, the tag substrates 70 and 80 are attached to the side surfaces of the developing unit 23 and the toner cartridge 23a by, for example, screwing or being inserted into a formed holder.

  The transfer roller 24 is provided in contact with the photosensitive drum 20 on the downstream side of the developing unit 23 along the rotation direction of the photosensitive drum 20, forms a transfer nip, and a toner image formed by the developing unit 23. Is transferred to the paper. The sheet on which the toner image has been transferred is freed of electric charge by a neutralizing brush.

  The transferred toner image is sandwiched between the fixing roller 26 and the press roller 29 and heated and pressed to be fixed on the paper. The fixed sheet is sandwiched between the pair of sheet discharge rollers 30 and 31 and is carried out to the sheet sheet discharge tray 32.

  A cleaning blade 25 that collects toner on the photosensitive drum 20 is provided on the downstream side of the transfer roller 24 with respect to the rotation direction of the photosensitive drum 20. The cleaning blade 25 is, for example, a rubber blade, contacts the photosensitive drum 20, and scrapes and collects residual toner on the photosensitive drum 20.

  The printer controller 60 executes the image forming process by controlling the hardware configuring the image forming apparatus 1 described above. The printer controller 60 includes a microprocessor 61 that performs calculations, a ROM that stores programs for causing the microprocessor 61 to execute each process, a RAM that temporarily stores various data such as calculation results, and the data being backed up. The backup RAM is configured. The printer controller 60 executes a program stored in the ROM, thereby integrally controlling the hardware configuring the image forming apparatus 1 described above. Note that the microprocessor 61, the ROM, the RAM, and the like may be constituted by independent chips, or may be constituted by a microcomputer (microcomputer) housed in one chip.

  When the developing unit 23 is mounted on the image forming apparatus 1, the connection electrode 66 (clock electrode 66a, data electrode 66b, ground electrode 66c) on the image forming apparatus 1 (printer controller 60) side, and the developing unit 23 (tag) The external electrode 75 (clock electrode 75a, data electrode 75b, ground electrode 75c) on the substrate 70 side is electrically connected. More specifically, the connection electrode 66 made of, for example, a coil spring or the like provided on the image forming apparatus 1 (printer controller 60) side is brought into contact with the external electrode 75 formed in a pad shape. Electrically connected. As a result, as shown in FIG. 2, the microprocessor 61 constituting the printer controller 60 and the non-volatile memory 71 mounted on the tag substrate 70 attached to the developing unit 23 are connected to the connection electrode 66 (clock signal). Electrode 66a, data electrode 66b, ground electrode 66c) and external electrode 75 (clock electrode 75a, data electrode 75b, ground electrode 75c). As a result, the microprocessor 61 can read and write data from and to the nonvolatile memory 71.

  Similarly, when the toner cartridge 23a is attached to the image forming apparatus 1, the connection electrode 67 (clock electrode 67a, data electrode 67b, ground electrode 67c) on the image forming apparatus 1 (printer controller 60) side, and the toner cartridge 23a ( The external electrodes 85 (clock electrode 85a, data electrode 85b, ground electrode 85c) on the tag substrate 80 side are electrically connected. More specifically, the connection electrode 67 formed of, for example, a coil spring or the like provided on the image forming apparatus 1 (printer controller 60) side is brought into contact with the external electrode 85 formed in a pad shape. Electrically connected. Thereby, as shown in FIG. 2, the microprocessor 61 constituting the printer controller 60 and the non-volatile memory 81 mounted on the tag substrate 80 attached to the toner cartridge 23a are connected to the connection electrode 67 (clock electrode). 67a, data electrode 67b, ground electrode 67c) and external electrode 85 (clock electrode 85a, data electrode 85b, ground electrode 85c). As a result, the microprocessor 61 can read and write data from and to the nonvolatile memory 81.

  In the present embodiment, I2C (Inter Integrated Circuit) communication type serial EEPROM is used as the non-volatile memories 71 and 81 (hereinafter, the non-volatile memories 71 and 81 are also referred to as “EEPROMs 71 and 81”).

  A clock line 68 for I2C communication is connected to the clock output port (I2C_SCL) of the microprocessor 61. The clock line 68 is pulled up by a pull-up resistor 62. The clock line 68 is branched to the clock line 68a and the clock line 68b downstream of the pull-up resistor 62. Note that the resistance value of the pull-up resistor 62 is preferably 1 K to 10 KΩ, and in the present embodiment, it is set to 4.7 KΩ.

  The clock line 68a is connected to the clock electrode 66a through the CMOS buffer 64. Here, the CMOS buffer 64 is for preventing a current from flowing in (reverse flow) from the tag substrate 70 side when the clock signal is low, and functions as a backflow prevention circuit according to the claims. To do. Similarly, the clock line 68b is connected to the clock electrode 67a via the CMOS buffer 65. Here, the CMOS buffer 65 is for preventing current from flowing in (reverse flow) from the tag substrate 80 side when the clock signal is Low, and functions as a backflow prevention circuit according to the claims. To do.

  A data line 69 for I2C communication is connected to the data input / output port (I2C_SDA) of the microprocessor 61. The data line 69 is pulled up by a pull-up resistor 63. The data line 69 is branched to a data line 69a and a data line 69b downstream of the pull-up resistor 63. Note that the resistance value of the pull-up resistor 63 is preferably 1 K to 10 KΩ, and in this embodiment, it is set to 4.7 KΩ. The data line 69a is connected to the data electrode 66b, and the data line 69b is connected to the data electrode 67b.

  The ground line of the printer controller 60 is connected to the ground electrode 66c and the ground electrode 67c.

  As described above, the connection electrode 66 (clock electrode 66a, data electrode 66b, ground electrode 66c) on the printer controller 60 side is connected to the external electrode 75 (clock electrode 75a, data electrode 75b, ground electrode 75c) on the tag substrate 70 side. Connected. Similarly, the connection electrode 67 (clock electrode 67a, data electrode 67b, ground electrode 67c) on the printer controller 60 side is connected to the external electrode 85 (clock electrode 85a, data electrode 85b, ground electrode 85c) on the tag substrate 80 side. The Here, the tag substrate 70 and the tag substrate 80 are different only in the wiring (setting) of the device addresses (A0, A1, A2) of the EEPROMs 71 and 81, and the other wirings are the same. The wiring will be described mainly.

  The clock electrode 75a (85a) constituting the external electrode 75 (85) is connected to the clock terminal (SCL: Serial Clock) of the EEPROM 71 (81) through the clock line 76 (86). The data electrode 75b (85b) is connected to the data terminal (SDA: Serial Data) of the EEPROM 71 (81) through the data line 77 (87). Further, the ground electrode 75c (85c) is connected to the ground line of the tag substrate 70 (80).

  One end of each of the resistor 72 (82) and the diode 73 (83) connected in parallel to each other is connected to the clock line 76 (86). The other ends of the resistor 72 (82) and the diode 73 (83) are connected to one end of a capacitor 74 (84). That is, one end of the capacitor 74 (84) is connected to the clock line 76 (86) (clock electrode 75a (85a)) via the resistor 72 (82) and the diode 73 (83) connected in parallel to each other. Yes. One end of the capacitor 74 (84) is connected to the power supply terminal (Vcc) of the EEPROM 71 (81). The other end of the capacitor 74 (84) is connected to the ground (ground terminal 75c (85c)).

  For example, a low-loss Schottky barrier diode is preferably used as the diode 73 (83). As the capacitor 74 (84), a chip-type multilayer ceramic capacitor having a capacitance of about 1 μ to 10 μF is preferably used.

  Here, when the diode 73 (83) is connected in parallel to the resistor 72 (82), the same voltage is applied to both the resistor 72 (82) and the diode 73 (83), so the current value supplied to the capacitor 74 (84). As shown by the solid line in FIG. 3, the current value flowing through the resistor 72 (82) (see the broken line in FIG. 3) and the current value flowing through the diode 73 (83) (see the dashed line in FIG. 3) are added. It becomes the value. Therefore, the charging speed of the capacitor 74 (84) is improved as compared with the case of only the resistor 72 (82). FIG. 3 is a diagram for explaining the charging current (charging speed) of the capacitor 74 (84).

  Returning to FIG. 2, in the present embodiment, the EEPROM 71 (81) having a clock frequency of 400 kHz at the maximum is used. Therefore, the low level time of one clock in the clock signal is 1.25 μsec. That is, that is, several μsec. Therefore, the power supply to the EEPROM 71 (81) during that period (during the low level) can be supplemented by the multilayer ceramic capacitor 74 (84) having a capacitance of 1 μ to 10 μF. The capacity of the capacitor 74 (84) is arbitrarily set based on the low level time of the clock signal, the power consumption of the EEPROM 71 (81), and the like.

  The EEPROM 71 (81) is provided with three (3-bit) device address terminals (A2, A1, A0) for designating a device. In this embodiment, the device address terminals A2 and A1 are connected to the ground (GND: Low), and the device address terminal A0 is connected to the power supply (Vcc: High). That is, the device address terminals (A2, A1, A0) of the EEPROM 71 mounted on the tag substrate 70 are set to (001). On the other hand, in the present embodiment, the device address terminals (A2, A1, A0) of the EEPROM 81 mounted on the tag substrate 80 are set to (011). Note that the WP (Write Protect) terminal of the EEPROM 71 (81) is fixed to the Low level (connected to the ground) because it does not require a function for prohibiting data rewriting.

  Next, the operation of the consumable units 23 and 23a attached to the image forming apparatus 1, particularly the power supply operation to the EEPROMs 71 and 81 mounted on the tag substrates 70 and 80 attached to the consumable units 23 and 23a. explain. The clock lines 68, 68a, 68b, 76, 86 are in a high state when the EEPROMs 71, 81 are not accessed (when not accessed). The clock lines 68, 68a, 68b, 76, and 86 periodically repeat High and Low when accessing the EEPROM 71 or the EEPROM 81 (during access). Therefore, when the clock signal is High, power is supplied to the power supply terminals (Vcc) of the EEPROMs 71 and 81, and the capacitors 74 and 84 are charged. When the clock signal is low, the charges charged in the capacitors 74 and 84 are supplied to the power supply terminals (Vcc) of the EEPROMs 71 and 81. That is, the charges stored in the capacitors 74 and 84 during the period when the clock signal is High are discharged during the Low period, and the power supply drop of the EEPROMs 71 and 81 is prevented.

  As described above, in the tag substrates 70 and 80, the capacitors 74 and 84 are connected to the clock lines 76 and 86 via the resistors 72 and 82 and the diodes 73 and 83 connected in parallel to each other. The charging current when the capacitors 74 and 84 are charged increases, and the charging speed is improved.

  As described above, according to the consumable units 23 and 23a according to the present embodiment, the EEPROMs 71 and 81 are connected to one end of the capacitors 74 and 84 connected to the clock electrodes 75a and 85a (clock lines 76 and 86). When the power supply terminal (Vcc) is connected and the clock signal is High, power is supplied to the EEPROMs 71 and 81 and the capacitors 74 and 84 are charged. When the clock signal is low, the charges charged in the capacitors 74 and 84 are supplied to the power supply terminals (Vcc) of the EEPROMs 71 and 81. Therefore, it is not necessary to connect the power line on the image forming apparatus 1 (printer controller 60) side and the power line on the tag substrates 70 and 80 attached to the consumable units 23 and 23a. That is, the electrode for connecting both power supply lines can be deleted. As a result, it is used for electrical connection between the image forming apparatus 1 main body (printer controller 60) and the consumable units 23 and 23a to which the tag substrates 70 and 80 on which the nonvolatile EEPROMs 71 and 81 are mounted are attached. It is possible to reduce the number of electrodes.

  More specifically, according to the consumable units 23 and 23a according to the present embodiment, serial EEPROMs 71 and 81 using I2C communication are used as memories. In this case, the number of electrodes for wiring and connection can be reduced as compared with the case where a parallel type memory is used. However, normally, at least four, that is, power supply (Vcc), clock (SCL), data ( SDA) and ground (GND) lines and electrodes are required. However, in this embodiment, since connection of the power supply line is not required, three lines, that is, a clock (SCL), data (SDA), and ground (GND) lines and electrodes are sufficient. Therefore, contact defects can be reduced to improve the connection reliability, and the area of the tag substrates 70 and 80 can be reduced.

  According to the consumable units 23 and 23a according to the present embodiment, one ends of the capacitors 74 and 84 are connected to the clock lines 76 and 86 (clock electrodes) via the resistors 72 and 82 and the diodes 73 and 83 connected in parallel to each other. 75a, 85a). Here, the same voltage is applied to the resistors 72 and 82 and the diodes 73 and 83, respectively. Therefore, the current value supplied to the capacitors 74 and 84 is a value obtained by adding the current values flowing through the resistors 72 and 82 and the diodes 73 and 83, respectively. Therefore, the charging speed of the capacitors 74 and 84 can be improved.

  According to the consumable units 23 and 23a according to the present embodiment, since the low level time in one clock of the clock signal is on the order of microseconds, the capacitors 74 and 84 take the low level time of the clock signal into consideration. When the clock signal is low, power is supplied to the power supply terminals (Vcc) of the EEPROMs 71 and 81 by a chip type multilayer ceramic capacitor, that is, a very small capacitor, while the clock signal is low. It becomes possible.

  According to the image forming apparatus 1 according to the present embodiment, as described above, the power supply line on the image forming apparatus 1 (printer controller 60) side and the power supplies of the tag substrates 70 and 80 attached to the consumable units 23 and 23a. There is no need to connect the line. That is, the connection electrode for connecting both power supply lines can be deleted. As a result, it is used for electrical connection between the image forming apparatus 1 main body (printer controller 60) and the consumable units 23 and 23a to which the tag substrates 70 and 80 on which the nonvolatile EEPROMs 71 and 81 are mounted are attached. It is possible to reduce the number of electrodes formed. Therefore, contact defects can be reduced to improve the connection reliability, and the area of the tag substrates 70 and 80 can be reduced.

  In the image forming apparatus 1 according to the present embodiment, the clock electrodes 66 a and 67 a are connected to the output ends of the CMOS buffers 64 and 65. Therefore, when the clock signal is low, it is possible to prevent the charges charged in the capacitors 74 and 84 of the consumable units 23 and 23a from flowing to the image forming apparatus 1 side that outputs the clock signal.

  Although the embodiment of the present invention has been described above, the present invention is not limited to the above embodiment, and various modifications can be made. For example, in the above embodiment, the developer unit 23 and the toner cartridge 23a are given as examples of the consumable unit. However, the type, number, and device address of the consumable unit are limited to the above embodiment. I can't.

  Further, the frequency of the clock signal, the capacitances of the capacitors 74 and 84, the resistance values of the resistors 72 and 82, and the like are not limited to the above embodiment.

  In the above embodiment, the capacitors 74 and 84 are connected to the clock lines 76 and 86 via the resistors 72 and 82 and the diodes 73 and 83 connected in parallel to each other. However, the diodes 73 and 83 are omitted, and the resistors The capacitors 74 and 84 may be connected to the clock lines 76 and 86 only through the 72 and 82.

  In the above embodiment, I2C is used as the communication method of the serial EEPROMs 71 and 81. However, the communication method of the serial EEPROMs 71 and 81 is not limited to I2C.

1 Image forming apparatus 20 Photosensitive drum 23 Developer unit (consumable unit)
23a Toner cartridge (consumable unit)
60 Printer controller 61 Microprocessor 62, 63 Pull-up resistor 64, 65 CMOS buffer 70, 80 Tag board 71, 81 EEPROM
72, 82 Resistor 73, 83 Diode 74, 84 Capacitor 66, 67 Connection electrode 66a, 67a Clock electrode 66b, 67b Data electrode 66c, 67c Ground electrode 75, 85 External electrode 75a, 85a Clock electrode 75b, 85b Data electrode 75c, 85c Ground electrode

Claims (8)

In a consumable unit that can be attached to and detached from an image forming apparatus,
A non-volatile memory having a power terminal, a ground terminal, a clock terminal, and a data terminal and capable of electrically writing and erasing data;
Three external electrodes including a clock electrode, a data electrode, and a ground electrode, which are electrically connected to a connection electrode on the image forming apparatus side when mounted on the image forming apparatus;
A capacitor having one end connected to the clock electrode and the other end connected to the ground electrode;
In the memory, the clock terminal is connected to the clock electrode, the data terminal is connected to the data electrode, the ground terminal is connected to the ground electrode, and the power supply terminal is connected to one end of the capacitor. Consumable unit characterized by that.   The consumable unit according to claim 1, wherein one end of the capacitor is connected to the clock electrode via a resistor and a diode connected in parallel to each other.   The consumable unit according to claim 1, wherein the memory is a serial EEPROM. The clock signal input to the clock terminal has a low level time in one clock in the order of microseconds,
The consumable unit according to any one of claims 1 to 3, wherein the capacitor is a chip-type multilayer ceramic capacitor.   The consumable unit according to claim 1, wherein the consumable unit is a toner cartridge containing toner.   The consumable unit according to any one of claims 1 to 4, wherein the consumable unit is an electrophotographic developer unit. An image forming apparatus to which the consumable unit according to any one of claims 1 to 6 is detachably mounted.
An image forming apparatus comprising: three connection electrodes that are electrically connected to the three external electrodes of the consumable unit when the consumable unit is mounted. The three connection electrodes include a connection electrode that outputs a clock signal,
The image forming apparatus according to claim 7, wherein the connection electrode that outputs the clock signal is connected to an output of a backflow prevention circuit.

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