CN107590086A - A kind of communication connecting apparatus and method, communication veneers - Google Patents
A kind of communication connecting apparatus and method, communication veneers Download PDFInfo
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- CN107590086A CN107590086A CN201610533990.4A CN201610533990A CN107590086A CN 107590086 A CN107590086 A CN 107590086A CN 201610533990 A CN201610533990 A CN 201610533990A CN 107590086 A CN107590086 A CN 107590086A
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
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Abstract
The embodiment of the present invention provides a kind of communication connecting apparatus and method, communication veneers, communication connection is switched to by channel management unit and is connected with collocation channel, and the configuration information of processor is obtained from collocation channel, the configuration information got is sent in processing by channel management unit by timing resolution unit, processor is adjusted according to the configuration information received, after the transmission of configuration information is completed, communications management unit is switched to interface channel by connection is communicated, and the information in slow devices is loaded into by processor via timing resolution unit by the interface channel；The processor read-write cycle is extended by configuration information, so that CPU read-write cycle matches with BOOT FLASH, so as to solve the problems, such as that CPU is unworthy of with slow devices sequential in the prior art, realizes the flexible configuration of communication connecting apparatus, quickly realizes the communication of CPU and slow devices.
Description
Technical field
The present invention relates to communication technical field, more particularly to a kind of communication connecting apparatus and method, communication veneers.
Background technology
At present, in order to improve communication efficiency, most communication equipment is all come real using high performance processor (CPU)
It is existing, but the use for high-performance CPU is, it is necessary to pay special attention to when being communicated with slow devices, for interface chip
The collocation of type selecting and sequential, in general, in order to adapt to slower external memorizer and input-output equipment, existing processing side
Formula is to carry out program initialization setting to CPU, can be realized by various ways, the scheme having at present is that CPU passes through inside solidification journey
Sequence is realized, specifically, CPU is equipped with the programmable memory space of inside solidification, its program stored can by the bus cycles
Extend, but due to being limited by hardware condition, this extension is typically limited, and its interface device type selecting is also relative limitation
Property, also have what is configured by CPU Peripheral Interface chips, specifically, loading I by CPU2C, the interface chip such as SPI is matched somebody with somebody
Program is put to realize, but cost can be increased by way of external interface chip.
The content of the invention
Communication connecting apparatus provided in an embodiment of the present invention and method, communication veneers, with solution in the prior art, due to
CPU mismatches with slow devices sequential, and causes CPU can not match the problem of reading data with BOOT FLASH.
In order to solve the above technical problems, the embodiment of the present invention provides a kind of communication connecting apparatus, including：Timing resolution list
Member, channel management unit, collocation channel, interface channel；
The external processor of timing resolution unit, the external slow devices of interface channel；
When electric on a processor, the channel management unit is switched to the collocation channel by connection is communicated, and passes through institute
State channel management unit and configuration information is sent to the processor via the timing resolution unit；
After the transmission of configuration information is completed, the channel management unit is switched to the interface channel by connection is communicated,
And the information in slow devices is loaded into by the processor via the timing resolution unit by the channel management unit.
On the one hand, the embodiment of the present invention also provides a kind of communication veneers, including：Processor, slow devices, and as above institute
The communication connecting apparatus stated.
On the other hand, the embodiment of the present invention also provides a kind of communication connecting method, including：
On to processor after electricity, the configuration information of processor is obtained by collocation channel；
The configuration information is sent to the processor and configured；
After the configuration information is sent completely, the processor is switched to and communicated by interface channel and slow devices
Connection.
On the other hand, the embodiment of the present invention also provides a kind of computer-readable storage medium, is deposited in the computer-readable storage medium
Computer executable instructions are contained, the computer executable instructions are used to perform foregoing communication connection method.
The beneficial effects of the invention are as follows：
Communication connecting apparatus, method, communication veneers and the computer-readable storage medium provided according to embodiments of the present invention, lead to
Cross channel management unit and be switched to connection is communicated and be connected with collocation channel, and obtain from collocation channel processor matches somebody with somebody confidence
Breath, channel management unit are sent configuration information in processing by timing resolution unit, and processor is according to the configuration received
Information is adjusted so that the reading rate of processor and matching for slow devices；After the transmission of configuration information is completed, lead to
Letter administrative unit will communicate connection and be switched to interface channel, and by the interface channel by the information in slow devices via sequential
Resolution unit is loaded on processor, it is achieved thereby that the communication between high-performance processor and slow devices, by this hair
The implementation of the communication connecting apparatus of bright offer, processor is adjusted by reading the configuration information prestored in collocation channel
Whole, the configuration information is used to adjust the sequential of processor to the memory in slow devices to match, and solves high-performance
The problem of processor can not be communicated with slow devices due to sequential mismatch so that have during debugging and use flexible
Configure, update the advantages of facilitating.
Brief description of the drawings
Fig. 1 is the structural representation for the communication connecting apparatus that first embodiment of the invention provides；
Fig. 2 is the structural representation for another communication connecting apparatus that second embodiment of the invention provides；
Fig. 3 is the structural representation for the communication veneers that third embodiment of the invention provides；
Fig. 4 is the flow chart for the communication connecting method that fourth embodiment of the invention provides；
Fig. 5 is another flow chart for the communication connecting method that the present invention the 5th implements offer.
Embodiment
The embodiment of the present invention is described in further detail below by embodiment combination accompanying drawing.
First embodiment：
The communication connecting apparatus that the present invention implements to provide is used to adjust processor configuration by being stored with collocation channel
Configuration information, the configuration information of channel management unit reading processor from collocation channel, and being sent out by timing resolution unit
Processor is given, processor is configured according to the configuration information received, while communication management unit is switched to and connected
Passage connect, it is achieved thereby that between high-performance processor and slow devices communication connection, solve in the prior art CPU with
The unmatched problem of slow devices sequential.
Fig. 1 is referred to, Fig. 1 is the structure chart for the communication connecting apparatus that the present embodiment provides, and the communication connecting apparatus 1 wraps
Include：Timing resolution unit 11, channel management unit 12, collocation channel 13 and interface channel 14, wherein：
Communication connecting apparatus 1 is connected by timing resolution unit 11 with processor, passes through interface channel 14 and slow devices
Connection；
On to processor after electricity, channel management unit 12 is switched to and communicated with collocation channel 13 by communication connecting apparatus 1
Connection, and the configuration information of reading processor is sent to timing resolution unit 11, sequential processing unit 11 from collocation channel 13
The configuration information received is transferred on processor, processor configuration according to corresponding to being carried out configuration information so that processing
Read-write speed and slow devices match；
After the completion of communication connecting apparatus 1 is configured processor by configuration information, channel management unit 12 is switched to
Communicate and connect with interface channel 14, and the information in slow devices is loaded into by processor via timing resolution unit 11 by device
On.
All modules or unit that the present embodiment provides can also pass through PLD (Complex
Programmable Logic Device, abbreviation CPLD) realize, specifically mutually interconnected by each logic collocation channel in CPLD
Realization is fetched, can also be entered each logic collocation channel in CPLD to write configurator code according to the type of slow devices
Row combination is functional so as to realize the institute of the communication connecting apparatus 1 of the present embodiment offer.
In the present embodiment, the interface channel 14 specifically includes FLASH passages, will be communicated and connected by FLASH passages
Device 1 is connected with the BOOT FLASH in slow devices, is passed through the system version information on BOOT FLASH by FLASH passages
It is loaded into by timing resolution unit 11 in processor.
The channel management unit 12 is particularly used for management configuration passage 13 and interface channel 14, by judging that configuration is logical
Whether the configuration information in road 13, which is all read, sends, and leads to if so, then switching to channel management unit 12 with being connected
Road 14 is connected so that processor is communicated with BOOT FLASH, and processor is read on BOOT FLASH by interface channel 114
System version information.
In the present embodiment, when the processor needs to read configuration information from collocation channel 13, the timing resolution
Unit 11 specifically includes the ADDR address informations for latching processor in advance, and corresponding configure is read by the heap of collocation channel 13
Information, and the configuration information is sent to processor and configured.
In the present embodiment, communication connecting apparatus 1, which is additionally included in channel management unit 12, sets counter and counting
Threshold value, and the count value that configuration information is read to channel management unit 12 judges with the count threshold, according to judgement
As a result switching communication connection between channel management unit 12 and collocation channel 13 and interface channel is adjusted.
By the implementation of the communication connecting apparatus 1 provided the present embodiment, when carrying out power on operation to CPU, communication connects
Connection device 1 parses firstly the need of by timing resolution unit 11 to CPU LOCAL BUS bus timings, collocation channel 13
According to the result of parsing configure adjustment processor configuration information, by channel management unit 12 via timing resolution unit 11 to
Processor directly exports the configuration information configured and extends to CPU read-write cycle and the BOOT FLASH phases in slow devices
Matching.
Further, read in channel management unit 12 in collocation channel 13 during configuration information, channel management list
Member 12 also reads the actual frequency of configuration information by rolling counters forward, wherein, the default value of the counter is 0, when CPU is read
When taking configuration information, the counting of counter increases successively, after the counting of counter reaches count threshold, directly by channel management
The mark position 1 of unit 12, channel management unit 12 switches to be connected with interface channel 14, is made at CPU LOCAL BUS buses
In the state communicated with BOOT FLASH, meanwhile, CPU read-write cycle is reduced to by processor according to the configuration information read
Can be with the speed of BOOT FLASH matchings.
Communication connecting apparatus provided in an embodiment of the present invention, the bus timing of processor is carried out by timing resolution unit
The configuration information of processor, processor is sent to by collocation channel by analysis, and according to read-write of the configuration information to processor
Speed is adjusted so that processor can carry out normal communication connection with slow devices；Specifically pass through channel management unit
Communication connection is switched to and is connected with collocation channel, and is transmitted the configuration information of processor via timing resolution unit by it
To processor, after transmitting configuration information is completed, communication connection is switched to and is connected with interface channel by channel management unit, and will
Information in slow devices is loaded on processor by timing resolution unit, is prolonged the processor read-write cycle by configuration information
It is long so that CPU read-write cycle matches with BOOT FLASH, so as to solve CPU in the prior art and slow devices sequential not
With the problem of, realize the flexible configuration of communication connecting apparatus, quickly realize the communication of CPU and slow devices, due to communication connect
All units that connection device provides can be realized by the CPLD logical devices in veneer, can further save and additionally match somebody with somebody
Chip is put, this also reduces hardware cost.
Second embodiment：
Fig. 2 is referred to, Fig. 2 is another structure chart for the communication connecting apparatus that this implementation provides, and the device includes sequential
Resolution unit 11, channel management unit 12, collocation channel 13, interface channel 14 and dispensing unit 15, wherein,
11 external processor of timing resolution unit, 14 external slow devices of interface channel；When electric on a processor, tube channel
Reason unit 12 will communicate connection and be switched to collocation channel 14, and by channel management unit 12 by configuration information via timing resolution
Unit 11 is sent to processor；After the transmission of configuration information is completed, channel management unit 12 is switched to connection by connection is communicated
Passage 14, and by channel management unit 12 be loaded into the information in slow devices via the timing resolution unit 11 described
Processor, the dispensing unit 15 is connected with collocation channel 13, for storing the configuration information of processor.
In the present embodiment, the dispensing unit 15 can be specifically arranged inside communication connecting apparatus 1, can also be set
Outside communication connecting apparatus 1, setting can be the memory cell on veneer.
In the present embodiment, the specific timing resolution unit 11 is connected with the bus of processor, is obtained by bus
The timing information of processor, timing resolution unit 11 is to the read-write speed of the timing resolution processor received, according to processor
Read-write speed and slow devices difference, set adjust instruction, the adjust instruction is stored in dispensing unit 15, when right
When processor carries out electric, processor parses address by sending read requests, timing resolution unit 11 according to read requests
Latch signal AE, piece select CS, the signal read OE, write WR, address AD DR, data DATA etc., parse above-mentioned information, are specifically
The cpu chip handbook according to corresponding to loading CPU type selecting of communication connecting apparatus 1, the LOCAL BUS provided by cpu chip are total
Line timing diagram realizes that, when the cpu bus ale signal that parsing obtains is low level, communication connecting apparatus 1 is defeated by logical code
Go out signal latch CPU ADD address informations, while when CS, OE signal are low level, collocation channel 13 is according to ADDR address informations
DATA corresponding to being read from dispensing unit 15, the DATA are adjustment CPU adjust instruction, and pass through the He of channel management unit 12
Timing resolution unit 11 is sent to CPU, and last CPU carries out configuration adjustment according to the adjust instruction of reception.
In the present embodiment, flag bit a CNT_FLAG, CNT_ are further provided with channel management unit 12
Whether FLAG mark place values are completed to set according to the configured number presetting to CPU, that is to say that CPU receives time of configuration information
Number, when the register configuration to CPU is more complicated, configured number can be more.Wherein, channel management unit 12 is in collocation channel and company
The switching connected between road is specifically to be switched over according to flag bit CNT_FLAG set is 0 or 1, it is preferred that device
The set value of acquiescence be 0, and it is corresponding be collocation channel 13, when set value be 1 when it is corresponding be interface channel, that is to say
FLASH passages.Completed when channel management unit 12 reads the processor configuration information in dispensing unit 15 by collocation channel 13
Afterwards, CNT_FLAG mark positions are 1 by channel management unit 12, and switch it to FLASH passages be connected, so as at realization
Reason device is communicated by FLASH passages and BOOT FLASH.
In the present embodiment, would generally be provided in the cpu chip handbook that channel management unit 12 is loaded into configurable
Internal register addresses and relevant configuration information, configuration information have generally included cpu bus interface speed, port assignment, kernel
Frequency etc., dispensing unit 15 according to configuration information set adjust instruction, the adjust instruction be by CPU configuration information adjust to
Slow devices BOOT FLASH match, and the adjust instruction is specifically stored in dispensing unit 15, for example, storing for reducing
The adjust instruction of cpu bus interface speed.Cpu bus reads adjust instruction, CPU meetings from dispensing unit 15 after electricity on CPU
CPU inside related register is configured according to the configuration information read, so as to reach the extension bus read-write cycle, be reduced to
Can and BOOT FLASH matching speed, meanwhile, after configuration is complete, channel management unit 12 switch it to interface channel
Connection.
3rd embodiment：
Fig. 3 is referred to, Fig. 3 is the structure chart for the communication veneers that the present embodiment provides, and the communication veneers 3 include processor
31st, slow devices 32 and communication connecting apparatus 1, wherein, the communication connecting apparatus 1 is used to provide configuration information to processor,
The configuration information that processor 31 provides according to communication connecting apparatus 1 is configured, and after the completion of configuration, passes through communication connecting apparatus
1 is connected processor 31 with slow devices 32 so that the processor 31 and BOOT FLASH in slow devices read-write speed phase
Matching.
In the present embodiment, specifically, connection switching will be communicated by the channel management unit 12 in communication connecting apparatus 1
Configuration information is sent to processor via timing resolution unit 11 to collocation channel 13, and by channel management unit 12, located
The configuration information that reason device 31 sends over according to timing resolution unit 11 is configured, after the completion of configuration, to communication connection dress
The information of 1 feedback configuration completion is put, channel management unit 12 enters the switching of row of channels according to the feedack of processor 31, specifically
, channel management unit 12 is switched to interface channel 14 with being connected from collocation channel 13, and will at a slow speed by interface channel 14
Information in equipment is loaded into processor 31 via timing resolution unit 11.
In the present embodiment, timing resolution unit 11 parses to the LOCAL BUS bus timings of processor 31, passes through
The simulation address and configuration information that dispensing unit 15 provides configure to processor 31.Namely pass through communication connecting apparatus
1 directly exports configuration information extends to the read-write cycle of processor 31, then the read-write cycle of processor 31 and BOOT FLASH
Matching.
Counter is additionally provided with inside the channel management unit 12 that the present embodiment provides, and counting threshold is set to counter
Value, the upper initial hour counter default value 0 of electricity, the marker bit of counter is defaulted as 0.When reading configuration information to processor 31,
The counting of counter increases successively with the number for reading configuration information, and when counter counts are full, channel management unit 12 will be counted
Mark position in number device is 1, the switching channel of channel management unit 12, the bus of processor 31 is in and BOOT FLASH communications
State.
Dispensing unit 15 provides configuration information and the bus address ADDR of simulation, and configuration information is made up of multiple bytes, needs
Want complete multiple read-write cycles of processor 31.Often read start-stop counter and just add 1, it is 1 that markers note position is completed in configuration, is located simultaneously
The reason read-write cycle of device 31 is reduced to the speed with BOOT FLASH matchings, and channel management unit 12 then switches switch and arrives FLASH
Passage, the bus of processor 31 and BOOT FLASH normal communications.
In the present embodiment, the communication connecting apparatus 1 in communication veneers 3 specifically can be by the CPLD in veneer come real
It is existing, it is preferred that by writing program code that each logic unit combination connection in CPLD is logical in the present embodiment to realize
The function that each unit of news attachment means 1 is realized, the configuration code write using the CPLD storages on veneer, to processing
On device 31 after electricity, processor 31 read directly from CPLD corresponding to configuration code each logic unit in CPLD is combined
Connection, extraly external interface configuration chip so can be both saved, the hardware when designing communication veneers can also be reduced and set
Count cost.
Fourth embodiment：
Fig. 4 is referred to, Fig. 4 is the flow chart for the communication connecting method that the present embodiment provides, and the processing step of this method has
Body includes：
S401, on to processor after electricity, configuration information is obtained by collocation channel.
In this step, the configuration information is specially that the EBI speed adjust of processor is instructed, communication connection
Device carries out the analysis of sequential according to the LOCAL BUS bus timings figures that cpu chip handbook provides by logical code, works as CPU
When bus ale signal is low, CPU ADDR address informations are latched, when CS, OE signal are low, by dispensing unit ADDR
DATA adjust instructions information is supplied to CPU corresponding to address.
In the present embodiment, on to processor after electricity, in addition to the configuring request of the processor is obtained, according to described
Configuring request sets the configuration information of processor, and is stored in the dispensing unit；When the sequential to CPU is analyzed,
The timing diagram and corresponding register address that are there is provided in the cpu chip handbook being specifically loaded into according to communication connecting apparatus,
Relevant configuration information is parsed.
S402, the configuration information is sent to the processor and configured.
In this step, configuration information is sent to processor and specifically includes the ADDR addresses for latching the processing in advance letter
Breath, the configuration information corresponding to reading from the collocation channel, and the configuration information is sent to the processor and matched somebody with somebody
Put, CPU can configure according to the configuration information read to CPU inside related register, extend bus read-write week so as to reach
Phase, be reduced to BOOT FLASH matching speed.
In the present embodiment, in addition to counter and count threshold are set, pass through the counting of the configuration information to reading
The judgement of value and the count threshold, processor is switched to and is connected with interface channel.
S403, after the configuration information is sent completely, the processor is switched to by interface channel with setting at a slow speed
Standby communication connection.
In this step, in addition to counter and count threshold are set, the counter is used to count and matched somebody with somebody described in reading
The actual frequency of confidence breath, judges the actual frequency and the count threshold, according to being realized the result of judgement
Processor switches communication connection between the collocation channel and interface channel.
Specifically, the actual frequency of configuration information is read by rolling counters forward, wherein, the default value of the counter is
0, when CPU reads configuration information, the counting of counter increases successively, after the counting of counter reaches count threshold, directly
By the mark position of counter be 1, processor is switched to and be connected with interface channel, make CPU LOCAL BUS buses be in
BOOT FLASH communication state, meanwhile, processor according to the configuration information read by CPU read-write cycle be reduced to
The speed of BOOT FLASH matchings.
In the present embodiment, the interface channel includes FLASH passages, the external BOOT FLASH of FLASH passages, leads to
Cross the FLASH passages and the system version information on BOOT FLASH is loaded into the processing via the timing resolution unit
Device.
In the present embodiment, the communication connecting method of above-mentioned offer can also by way of directly program code is set come
Realize, be stored in particular by by program code in the CPLD on veneer, on to CPU after electricity, processor reads and is stored in
Each logic unit in CPLD is connected with each other, passed through so as to realize to CPU initial configurations by the boot code in CPLD
Configuration-direct extends CPU read-write cycle, CPU read-write cycle is matched with BOOT FLASH.
5th embodiment：
Refer to Fig. 5, another flow chart for the communication connecting method that Fig. 5 provides for the present embodiment, the processing of this method
Step is specific as follows：
S501, CPU power-up initializing, read configuration-direct.
S502, timing resolution unit parse to CPU LOCAL BUS sequential, the simulation provided by dispensing unit
Address and configuration-direct configure to CPU.
In this step, timing resolution specifically includes address latch signal ALE, piece selects CS, reads OE, writes WR, address for progress
The signals such as ADDR, data DATA.Parsing passes through logical code according to the LOCAL BUS bus timing figures that cpu chip handbook provides
Realize, when cpu bus ale signal is low, latch CPU ADDR address informations, when CS, OE signal are low, pass through and configure
DATA configuration orders information corresponding to ADDR addresses is supplied to CPU by unit 40, that is, is directly exported configuration by CPLD and referred to
Order extends CPU read-write cycle, CPU read-write cycle is matched with BOOT FLASH.
S503, channel management unit are responsible for the management of collocation channel and FLASH passages, by judging in channel management unit
The CNT_FLAG mark place values in portion switch over.
In the present embodiment, it is additionally included in channel management unit and is internally provided with counter, the upper initial hour counter of electricity is write from memory
Recognize value 0, CNT_FLAG marker bits are defaulted as 0.When reading configuration-direct to CPU, rolling counters forward increases successively, when meter is full
CNT_FLAG mark positions are 1, channel management unit switching channel, and specific CNT_FLAG marks place value foundation is preset to CPU
Whether fixed configured number is completed to set, and when the register configuration to CPU is more complicated, configured number can be more.0,1 point of set
Collocation channel, FLASH passages are not corresponded to.CNT_FLAG acquiescences set 0 after veneer power-up, cpu bus is read using collocation channel
The information of dispensing unit 40.After the completion of reading dispensing unit, CNT_FLAG marker bits set 1, CPU LOCAL BUS are switched to
FLASH passages are communicated with BOOT FLASH.
S504, dispensing unit deposit configuration information in the CPU ADDR to be read and write.
Usual cpu chip handbook can provide configurable internal register addresses and relevant configuration information, and conventional having is total
Line interface speed, port assignment, core frequency etc..Dispensing unit 40 provides the configuration-direct for reducing cpu bus interface speed.
It was found from step S503, LOCAL BUS buses read configuration information from collocation channel after CPU power-up, and CPU can match somebody with somebody according to what is read
Confidence breath configures to CPU inside related register, extends the bus read-write cycle so as to reach, is reduced to and BOOT
The speed of FLASH matchings.
S505, after CPU has read dispensing unit information, channel management unit switches to FLASH passages by connection is communicated,
CPU loads BOOT FLASH system version informations by FLASH passages.
In the present embodiment, the CPLD of configuration generation can directly by being stored on veneer in to(for) above-mentioned processing procedure
Code is realized, can save extra configuration chip using CPLD storage configuration codes, this also reduces hardware cost.
By to communication connecting apparatus provided in an embodiment of the present invention and method, the implementation of communication veneers, especially by logical
Road administrative unit obtains the configuration information of processor from collocation channel, and by its by configuration information via timing resolution unit
Processor is sent to, processor is configured, after the completion of transmission, channel management unit is switched to and connected with interface channel
Connect, the configuration information is used to adjust the sequential of processor to the memory in slow devices to match, and solves high-performance
The problem of processor can not be communicated with slow devices due to sequential mismatch so that have during debugging and use flexible
Configure, update the advantages of facilitating.
Further, the present invention is compared with prior art, provided in an embodiment of the present invention to be used for matching somebody with somebody for initialization processor
Confidence breath is solidificated in inside processor, but according to the type of the slow devices communicated with processor come the configuration journey write
Sequence, because current most veneers are using logical devices such as CPLD, extra configuration core can be saved using CPLD storage configurators
Piece, this also reduces hardware cost.
Obviously, those skilled in the art should be understood that each module of the embodiments of the present invention or each step can be used
General computing device realizes that they can be concentrated on single computing device, or be distributed in multiple computing device institutes
On the network of composition, alternatively, they can be realized with the program code that computing device can perform, it is thus possible to by they
It is stored in computer-readable storage medium (ROM/RAM, magnetic disc, CD) and is performed by computing device, and in some cases, can
With to perform shown or described step different from order herein, or they are fabricated to each integrated circuit die respectively
Block, or the multiple modules or step in them are fabricated to single integrated circuit module to realize.So the present invention does not limit
Combined in any specific hardware and software.
Above content is to combine the further description that specific embodiment is made to the embodiment of the present invention, it is impossible to is recognized
The specific implementation of the fixed present invention is confined to these explanations.For general technical staff of the technical field of the invention,
Without departing from the inventive concept of the premise, some simple deduction or replace can also be made, should all be considered as belonging to the present invention
Protection domain.
Claims (10)
- A kind of 1. communication connecting apparatus, it is characterised in that including：Timing resolution unit, channel management unit, collocation channel, company Connect road；The external processor of timing resolution unit, the external slow devices of interface channel；It is described logical when electric on a processor Road administrative unit will communicate connection and be switched to the collocation channel, and by the channel management unit by configuration information via institute State timing resolution unit and be sent to the processor；After the transmission of configuration information is completed, the channel management unit will communicate Connection is switched to the interface channel, and by the channel management unit by the information in slow devices via the sequential solution Analysis unit is loaded into the processor.
- 2. communication connecting apparatus according to claim 1, it is characterised in that also include matching somebody with somebody with what the collocation channel was connected Unit is put, for storing the configuration information of processor.
- 3. communication connecting apparatus according to claim 1 or 2, it is characterised in that the interface channel leads to including FLASH Road, the external BOOT FLASH of FLASH passages, by the FLASH passages by the system version information on BOOT FLASH The processor is loaded into via the timing resolution unit.
- 4. communication connecting apparatus according to claim 1 or 2, it is characterised in that the configuration information by processor passes through Being sent to the processor by the timing resolution unit includes：The ADDR addresses letter of the timing resolution unit latches processor Breath, by configuration information corresponding to collocation channel reading, and the configuration information is sent to the processor and matched somebody with somebody Put.
- 5. communication connecting apparatus according to claim 1 or 2, it is characterised in that set in the channel management unit Counter and count threshold, and count value and the count threshold progress of configuration information are read to the channel management unit Judge, adjusting switching communication between the channel management unit and the collocation channel and interface channel according to the result of judgement connects Connect.
- A kind of 6. communication veneers, it is characterised in that including：Processor, slow devices, and such as any one of claim 1-5 institutes The communication connecting apparatus stated.
- A kind of 7. communication connecting method, it is characterised in that including：On to processor after electricity, the configuration information of processor is obtained by collocation channel；The configuration information is sent to the processor and configured；After the configuration information is sent completely, the processor is switched to and connected by interface channel and slow devices communication Connect.
- 8. communication connecting method according to claim 7, it is characterised in that on to processor after electricity, configured passing through Before passage obtains the configuration information of processor, in addition to：The configuring request of the processor is obtained, according to the configuring request The configuration information of processor is set, and is stored in dispensing unit.
- 9. the communication connecting method according to claim 7 or 8, it is characterised in that it is described by the configuration information send to The processor, which carries out configuration, to be included：The ADDR address informations of the processing are latched in advance, pass through collocation channel reading pair The configuration information answered, and the configuration information is sent to the processor and configured.
- 10. the communication connecting method according to claim 7 or 8, it is characterised in that the processor is switched to and passes through company Connecting road and slow devices communication connection includes：Counter and count threshold are set, and the counter is used to count the actual frequency for reading the configuration information；The actual frequency and the count threshold are judged；Realize that the processor switches over communication connection between the collocation channel and interface channel according to the result of judgement.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610533990.4A CN107590086B (en) | 2016-07-08 | 2016-07-08 | Communication connection device and method and communication single board |
| PCT/CN2017/091501 WO2018006777A1 (en) | 2016-07-08 | 2017-07-03 | Communication connection apparatus and method, and communication board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610533990.4A CN107590086B (en) | 2016-07-08 | 2016-07-08 | Communication connection device and method and communication single board |
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| Publication Number | Publication Date |
|---|---|
| CN107590086A true CN107590086A (en) | 2018-01-16 |
| CN107590086B CN107590086B (en) | 2022-05-10 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201610533990.4A Active CN107590086B (en) | 2016-07-08 | 2016-07-08 | Communication connection device and method and communication single board |
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|---|---|
| CN (1) | CN107590086B (en) |
| WO (1) | WO2018006777A1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109933293A (en) * | 2019-03-25 | 2019-06-25 | 深圳忆联信息系统有限公司 | Method for writing data, device and computer equipment based on SpiFlash |
| CN110928159A (en) * | 2019-12-23 | 2020-03-27 | 广州众诺电子技术有限公司 | Method for photosensitive drum chip data, consumable box and laser imaging equipment |
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| CN101169765A (en) * | 2007-11-28 | 2008-04-30 | 中兴通讯股份有限公司 | Control method for processor accessing slow memory |
| CN101989244A (en) * | 2009-08-05 | 2011-03-23 | 华为技术有限公司 | Signal conversion device and method as well as communication equipment |
| CN102073612A (en) * | 2009-11-20 | 2011-05-25 | 英业达股份有限公司 | Architecture for converting CPU (Central Processing Unit) socket into low-speed bus |
| CN102473076A (en) * | 2009-11-12 | 2012-05-23 | 株式会社日立制作所 | Disk array system and hard disk drive expansion method thereof |
| CN102749985A (en) * | 2011-04-22 | 2012-10-24 | 纬创资通股份有限公司 | Method and device for dynamically adjusting bus clock |
| CN105094295A (en) * | 2014-05-12 | 2015-11-25 | 联想(北京)有限公司 | Information processing method and electronic device |
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| JPS5542404A (en) * | 1978-09-20 | 1980-03-25 | Oki Electric Ind Co Ltd | Communication control equipment |
| CN1437119A (en) * | 2002-02-06 | 2003-08-20 | 华为技术有限公司 | Regulation method of peripheral control signal time sequence |
| CN101169765A (en) * | 2007-11-28 | 2008-04-30 | 中兴通讯股份有限公司 | Control method for processor accessing slow memory |
| CN101989244A (en) * | 2009-08-05 | 2011-03-23 | 华为技术有限公司 | Signal conversion device and method as well as communication equipment |
| CN102473076A (en) * | 2009-11-12 | 2012-05-23 | 株式会社日立制作所 | Disk array system and hard disk drive expansion method thereof |
| CN102073612A (en) * | 2009-11-20 | 2011-05-25 | 英业达股份有限公司 | Architecture for converting CPU (Central Processing Unit) socket into low-speed bus |
| CN102749985A (en) * | 2011-04-22 | 2012-10-24 | 纬创资通股份有限公司 | Method and device for dynamically adjusting bus clock |
| CN105094295A (en) * | 2014-05-12 | 2015-11-25 | 联想(北京)有限公司 | Information processing method and electronic device |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109933293A (en) * | 2019-03-25 | 2019-06-25 | 深圳忆联信息系统有限公司 | Method for writing data, device and computer equipment based on SpiFlash |
| CN109933293B (en) * | 2019-03-25 | 2022-06-07 | 深圳忆联信息系统有限公司 | Data writing method and device based on SpiFlash and computer equipment |
| CN110928159A (en) * | 2019-12-23 | 2020-03-27 | 广州众诺电子技术有限公司 | Method for photosensitive drum chip data, consumable box and laser imaging equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107590086B (en) | 2022-05-10 |
| WO2018006777A1 (en) | 2018-01-11 |
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