CN107579723B - Method and device for calibrating clock frequency - Google Patents
Method and device for calibrating clock frequency Download PDFInfo
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- CN107579723B CN107579723B CN201710659545.7A CN201710659545A CN107579723B CN 107579723 B CN107579723 B CN 107579723B CN 201710659545 A CN201710659545 A CN 201710659545A CN 107579723 B CN107579723 B CN 107579723B
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Abstract
The embodiment of the invention discloses a method and a device for calibrating clock frequency, comprising the following steps: the clock detection circuit is used for counting the clock signals output by the parameter adjustable oscillator at regular time to obtain a count value, judging that the absolute value of the difference between the obtained count value and an expected count value is greater than or equal to a preset threshold value, and outputting a first enabling signal to the calibration circuit to control the calibration circuit to enter a working state; the calibration circuit is used for entering a working state when receiving the first enabling signal and outputting a control signal to the parameter adjustable oscillator according to the obtained counting value so that the parameter adjustable oscillator adjusts the frequency of the clock signal; and the parameter adjustable oscillator is used for outputting the output clock signal to a clock detection circuit and other circuits working based on the clock signal and adjusting the frequency of the clock signal according to the control signal. The embodiment of the invention reduces the influence of the change of the ambient environment and the application temperature on the clock frequency of the oscillator, and improves the frequency precision of the oscillator; and power consumption is reduced.
Description
Technical Field
The present invention relates to the field of integrated circuits, and more particularly, to a method and apparatus for calibrating clock frequency.
Background
In recent years, the application of electronic technology in the fields of medical treatment, finance, internet of things and the like provides a new direction for the development of integrated circuits, and also drives the rapid development of the integrated circuit industry. Consumer electronics have evolved from traditional electronics, such as computers, mobile phones, home appliances, etc., to new types of electronics, such as one-card-pass, non-contact Integrated Circuit (IC) cards, smart hardware, etc. At present, the clock frequency of an integrated circuit chip is higher and higher, and meanwhile, the requirement for the clock signal of the whole system is higher and higher. When the operating frequency of an integrated circuit chip reaches gigahertz (GHz), the stability of the clock signal directly affects the performance of the chip and even functional errors can occur. An oscillator plays a very important role as a frequency source in electronic and communication equipment.
The precision of the clock frequency output by the oscillator is determined by parameters such as internal resistance, capacitance and the like, the parameters are easily influenced by a semiconductor manufacturing process, and in the implementation process of the process, the resistance and the capacitance may have large process deviation, so that the frequency of the clock signal output by the oscillator has large deviation, and the normal work of a digital circuit is influenced.
At present, by calibrating the frequency of the clock signal output by the oscillator in the wafer test stage, the oscillator can also output the clock signal with the frequency meeting the precision requirement. However, as the oscillator continues to operate, the clock frequency of the oscillator may deviate from the original oscillation frequency due to the change of the ambient environment and the application temperature, which may cause a large error in the frequency of the oscillator and may affect the function of the circuit.
Disclosure of Invention
Embodiments of the present invention provide a method and an apparatus for calibrating a clock frequency, which can reduce the influence of changes in ambient environment and application temperature on the clock frequency of an oscillator, thereby improving the frequency accuracy of the oscillator.
The embodiment of the invention provides a device for calibrating clock frequency, which is characterized by comprising the following components:
the clock detection circuit is used for counting the clock signals output by the parameter adjustable oscillator at regular time to obtain a count value, judging that the absolute value of the difference between the obtained count value and an expected count value is greater than or equal to a preset threshold value, and outputting a first enabling signal to the calibration circuit to control the calibration circuit to enter a working state;
the calibration circuit is used for entering a working state when receiving the first enabling signal and outputting a control signal to the parameter adjustable oscillator according to the obtained counting value so that the parameter adjustable oscillator adjusts the frequency of the clock signal;
and the parameter adjustable oscillator is used for outputting the output clock signal to a clock detection circuit and other circuits working based on the clock signal and adjusting the frequency of the clock signal according to the control signal.
Optionally, the clock detection circuit is further configured to:
judging that the absolute value of the difference between the obtained count value and the expected count value is smaller than a preset threshold value, and outputting a second enabling signal to the calibration circuit to control the calibration circuit to enter a non-working state;
the calibration circuit is further configured to:
and entering a non-working state when the second enabling signal is received.
Optionally, the method further includes:
a reference clock circuit for generating periodic detection pulses;
the clock detection circuit is specifically configured to count the clock signal output by the parameter-adjustable oscillator by the timing to obtain a count value in the following manner:
when receiving the detection pulse from the reference clock circuit in a non-counting state, starting to count the clock signal output by the parameter adjustable oscillator; and when the counting state receives the detection pulse from the reference clock circuit, stopping counting the clock signal output by the parameter adjustable oscillator and obtaining a count value.
Optionally, the calibration circuit is specifically configured to output the control signal to the parameter-adjustable oscillator according to the obtained count value by using the following method:
judging that the obtained count value is larger than the expected count value, and outputting a control signal for indicating the parameter adjustable oscillator to reduce the frequency of a clock signal to the parameter adjustable oscillator;
the parameter-adjustable oscillator is specifically configured to:
and outputting the output clock signal to a clock detection circuit and other circuits working based on the clock signal, and reducing the frequency of the clock signal according to a control signal for instructing the parameter-adjustable oscillator to reduce the frequency of the clock signal.
Optionally, the calibration circuit is specifically configured to output the control signal to the parameter-adjustable oscillator according to the obtained count value by using the following method:
judging that the obtained count value is smaller than the expected count value, and outputting a control signal for indicating the parameter adjustable oscillator to increase the frequency of a clock signal to the parameter adjustable oscillator;
the parameter-adjustable oscillator is specifically configured to:
and outputting the output clock signal to a clock detection circuit and other circuits operating based on the clock signal, and increasing the frequency of the clock signal according to a control signal for indicating the parameter-adjustable oscillator to increase the frequency of the clock signal.
The embodiment of the invention also provides a method for calibrating the clock frequency, which comprises the following steps:
the parameter adjustable oscillator outputs the output clock signal to a clock detection circuit and other circuits working based on the clock signal;
the clock detection circuit counts clock signals output by the parameter adjustable oscillator in a timing mode to obtain a count value, judges that the absolute value of the difference between the obtained count value and an expected count value is larger than or equal to a preset threshold value, and outputs a first enabling signal to the calibration circuit to control the calibration circuit to enter a working state;
the calibration circuit enters a working state when receiving the first enabling signal, and outputs a control signal to the parameter adjustable oscillator according to the obtained counting value so that the parameter adjustable oscillator adjusts the frequency of the clock signal;
the parameter adjustable oscillator adjusts the frequency of the clock signal according to the control signal.
Optionally, the method further includes:
the clock detection circuit judges that the absolute value of the difference between the obtained count value and the expected count value is smaller than a preset threshold value, and outputs a second enabling signal to the calibration circuit so as to control the calibration circuit to enter a non-working state;
and the calibration circuit enters a non-working state when receiving the second enabling signal.
Optionally, the counting the clock signal output by the parameter-adjustable oscillator to obtain the count value by the clock detection circuit at regular time includes:
a reference clock circuit generates periodic detection pulses;
when the clock detection circuit receives a detection pulse from the reference clock circuit in a non-counting state, the clock detection circuit starts to count the clock signal output by the parameter adjustable oscillator; and when the counting state receives the detection pulse from the reference clock circuit, stopping counting the clock signal output by the parameter adjustable oscillator and obtaining a count value.
Optionally, the outputting, by the calibration circuit, the control signal to the parameter-adjustable oscillator according to the obtained count value includes:
the calibration circuit judges that the obtained count value is larger than the expected count value, and outputs a control signal for indicating the parameter adjustable oscillator to reduce the frequency of a clock signal to the parameter adjustable oscillator;
the parameter-adjustable oscillator adjusting the frequency of the clock signal according to the control signal includes:
and reducing the frequency of the clock signal according to a control signal for instructing the parameter-adjustable oscillator to reduce the frequency of the clock signal.
Optionally, the outputting, by the calibration circuit, the control signal to the parameter-adjustable oscillator according to the obtained count value includes:
judging that the obtained count value is smaller than the expected count value, and outputting a control signal for indicating the parameter adjustable oscillator to increase the frequency of a clock signal to the parameter adjustable oscillator;
the parameter-adjustable oscillator adjusting the frequency of the clock signal according to the control signal includes:
the frequency of the clock signal is increased according to a control signal for instructing the parameter adjustable oscillator to increase the frequency of the clock signal.
The embodiment of the present invention further provides a chip, which includes all modules of any one of the above devices for calibrating a clock frequency, and further includes:
the configuration module is used for configuring parameters of the parameter-adjustable oscillator when the chip is powered on;
the other circuits work based on the clock signals and are used for working according to the clock signals output by the parameter adjustable oscillator;
the tunable parameter oscillator is further configured to:
and after the configuration module performs parameter configuration, outputting a clock signal with a frequency corresponding to the configured parameter.
Compared with the related art, the embodiment of the invention comprises the following steps: the clock detection circuit is used for counting the clock signals output by the parameter adjustable oscillator at regular time to obtain a count value, judging that the absolute value of the difference between the obtained count value and an expected count value is greater than or equal to a preset threshold value, and outputting a first enabling signal to the calibration circuit to control the calibration circuit to enter a working state; the calibration circuit is used for entering a working state when receiving the first enabling signal and outputting a control signal to the parameter adjustable oscillator according to the obtained counting value so that the parameter adjustable oscillator adjusts the frequency of the clock signal; and the parameter adjustable oscillator is used for outputting the output clock signal to a clock detection circuit and other circuits working based on the clock signal and adjusting the frequency of the clock signal according to the control signal. According to the scheme of the embodiment of the invention, the frequency of the clock signal output by the parameter-adjustable oscillator is adjusted in real time according to the count value of the clock signal output by the parameter-adjustable oscillator, so that the influence of the change of the ambient environment and the application temperature on the clock frequency of the oscillator is reduced, and the frequency precision of the oscillator is improved; and the clock detection circuit sends an enable signal to the calibration circuit to control the working state of the calibration circuit, so that the power consumption is reduced.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the example serve to explain the principles of the invention and not to limit the invention.
FIG. 1 is a schematic diagram illustrating a structure of an apparatus for calibrating a clock frequency according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a clock detection circuit according to an embodiment of the present invention;
FIG. 3 is a flowchart illustrating a method for calibrating a clock frequency according to an embodiment of the invention.
Detailed Description
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. It should be noted that the embodiments and features of the embodiments in the present application may be arbitrarily combined with each other without conflict.
The steps illustrated in the flow charts of the figures may be performed in a computer system such as a set of computer-executable instructions. Also, while a logical order is shown in the flow diagrams, in some cases, the steps shown or described may be performed in an order different than here.
Referring to fig. 1, an embodiment of the present invention provides an apparatus for calibrating a clock frequency, including:
the clock detection circuit is used for counting the clock signals output by the parameter adjustable oscillator at regular time to obtain a count value, judging that the absolute value of the difference between the obtained count value and an expected count value is greater than or equal to a preset threshold value, and outputting a first enabling signal to the calibration circuit to control the calibration circuit to enter a working state;
the calibration circuit is used for entering a working state when receiving the first enabling signal and outputting a control signal to the parameter adjustable oscillator according to the obtained counting value so that the parameter adjustable oscillator adjusts the frequency of the clock signal;
and the parameter adjustable oscillator is used for outputting the output clock signal to a clock detection circuit and other circuits working based on the clock signal and adjusting the frequency of the clock signal according to the control signal.
Optionally, the clock detection circuit is further configured to:
judging that the absolute value of the difference between the obtained count value and the expected count value is smaller than a preset threshold value, and outputting a second enabling signal to the calibration circuit to control the calibration circuit to enter a non-working state;
the calibration circuit is further configured to:
and entering a non-working state when the second enabling signal is received.
In the above device, the first enable signal EN is 0, and the second enable signal EN is 1;
alternatively, the first enable signal EN is 1, and the second enable signal EN is 0.
Depending on the implementation of the calibration circuit.
Optionally, the method further includes:
a reference clock circuit for generating periodic detection pulses;
the clock detection circuit is specifically used for counting the clock signals output by the parameter-adjustable oscillator in a timed mode to obtain a count value by adopting the following modes:
when receiving the detection pulse from the reference clock circuit in a non-counting state, starting to count the clock signal output by the parameter adjustable oscillator; and when the counting state receives the detection pulse from the reference clock circuit, stopping counting the clock signal output by the parameter adjustable oscillator and obtaining a count value.
Wherein the time interval between adjacent three detection pulses is equal to one calibration period.
For example, the clock detection circuit starts counting when the first detection pulse is received, stops counting when the second detection pulse is received, starts counting when the third detection pulse is received, stops counting when the fourth detection pulse is received, … …, and so on.
The clock detection circuit counts the clock signals output by the parameter-adjustable oscillator, which means that the pulses of the clock signals output by the parameter-adjustable oscillator are counted.
Specifically, referring to fig. 2, the clock detection circuit includes a counter and a state control circuit;
the counter is used for counting clock signals output by the parameter adjustable oscillator to obtain a count value;
the state control circuit is used for judging that the absolute value of the difference between the obtained count value and the expected count value is greater than or equal to a preset threshold value, and outputting a first enabling signal to the calibration circuit so as to control the calibration circuit to enter a working state; and judging that the absolute value of the difference between the obtained count value and the expected count value is smaller than a preset threshold value, and outputting a second enabling signal to the calibration circuit to control the calibration circuit to enter a non-working state.
Wherein, the counter is specifically used for:
when receiving the detection pulse from the reference clock circuit in a non-counting state, starting to count the clock signal output by the parameter adjustable oscillator; and when the counting state receives the detection pulse from the reference clock circuit, stopping counting the clock signal output by the parameter adjustable oscillator and obtaining a count value.
Optionally, the calibration circuit is specifically configured to output the control signal to the parameter-adjustable oscillator according to the obtained count value by using the following method:
judging that the obtained count value is larger than the expected count value, and outputting a control signal for indicating the parameter adjustable oscillator to reduce the frequency of the clock signal to the parameter adjustable oscillator;
the tunable parameter oscillator is specifically configured to:
and outputting the output clock signal to a clock detection circuit and other circuits operating based on the clock signal, and reducing the frequency of the clock signal according to a control signal for instructing the parameter-tunable oscillator to reduce the frequency of the clock signal.
Optionally, the calibration circuit is specifically configured to output the control signal to the parameter-adjustable oscillator according to the obtained count value by using the following method:
judging that the obtained count value is smaller than the expected count value, and outputting a control signal for indicating the parameter adjustable oscillator to increase the frequency of the clock signal to the parameter adjustable oscillator;
the tunable parameter oscillator is specifically configured to:
the output clock signal is output to a clock detection circuit and other circuits operating based on the clock signal, and the frequency of the clock signal is lowered in accordance with a control signal for instructing a parameter-tunable oscillator to raise the frequency of the clock signal.
The frequency of the clock signal is adjusted by adjusting an adjustable parameter in the parameter-adjustable oscillator, where the adjustable parameter may be a resistance value, a capacitance value, an inductance value, or the like.
For example, when the frequency of the clock signal is adjusted by the resistance value, the resistance may be set to have a plurality of adjustable gears, and each gear corresponds to one resistance value; when a control signal for indicating the parameter-adjustable oscillator to reduce the frequency of the clock signal is received, reducing a resistance gear; when a control signal is received instructing the parameter adjustable oscillator to increase the frequency of the clock signal, a resistance step is increased.
Of course, other adjustment manners may also be adopted, and the embodiment of the present invention is not limited thereto.
Other circuits operating based on the clock signal may be digital circuits, analog circuits, or the like.
According to the scheme of the embodiment of the invention, the frequency of the clock signal output by the parameter-adjustable oscillator is adjusted in real time according to the count value of the clock signal output by the parameter-adjustable oscillator, so that the influence of the change of the ambient environment and the application temperature on the clock frequency of the oscillator is reduced, and the frequency precision of the oscillator is improved; and the clock detection circuit sends an enable signal to the calibration circuit to control the working state of the calibration circuit, so that the power consumption is reduced.
Referring to fig. 3, an embodiment of the present invention further provides a method for calibrating a clock frequency, including:
and step 300, outputting the output clock signal to a clock detection circuit and other circuits working based on the clock signal by the parameter adjustable oscillator.
In this step, the clock detection circuit counts the clock signal output by the parameter-adjustable oscillator at regular time to obtain a count value, which includes:
a reference clock circuit generates periodic detection pulses;
when the clock detection circuit receives a detection pulse from the reference clock circuit in a non-counting state, the clock detection circuit starts to count the clock signal output by the parameter adjustable oscillator; and when the counting state receives the detection pulse from the reference clock circuit, stopping counting the clock signal output by the parameter adjustable oscillator and obtaining a count value.
Wherein the time interval between adjacent three detection pulses is equal to one calibration period.
For example, the clock detection circuit starts counting when the first detection pulse is received, stops counting when the second detection pulse is received, starts counting when the third detection pulse is received, stops counting when the fourth detection pulse is received, … …, and so on.
The clock detection circuit counts the clock signals output by the parameter-adjustable oscillator, which means that the pulses of the clock signals output by the parameter-adjustable oscillator are counted.
In this step, the outputting, by the calibration circuit, the control signal to the parameter-adjustable oscillator according to the obtained count value includes:
the calibration circuit judges that the obtained count value is larger than the expected count value, and outputs a control signal for indicating the parameter adjustable oscillator to reduce the frequency of the clock signal to the parameter adjustable oscillator;
and outputting a control signal for indicating the parameter-adjustable oscillator to increase the frequency of the clock signal to the parameter-adjustable oscillator when the obtained count value is judged to be smaller than the expected count value.
And step 303, adjusting the frequency of the clock signal by the parameter adjustable oscillator according to the control signal. The method comprises the following steps:
reducing the frequency of the clock signal according to a control signal for instructing the parameter-tunable oscillator to reduce the frequency of the clock signal;
the frequency of the clock signal is increased in accordance with a control signal that instructs the parameter adjustable oscillator to increase the frequency of the clock signal. The adjusted parameter adjustable oscillator outputs the output clock signal to a clock detection circuit and other circuits working based on the clock signal, and enters the next round of detection and calibration under the control of detection pulses.
The frequency of the clock signal is adjusted by adjusting an adjustable parameter in the parameter-adjustable oscillator, where the adjustable parameter may be a resistance value, a capacitance value, an inductance value, or the like.
For example, when the frequency of the clock signal is adjusted by the resistance value, the resistance may be set to have a plurality of adjustable gears, and each gear corresponds to one resistance value; when a control signal for indicating the parameter-adjustable oscillator to reduce the frequency of the clock signal is received, reducing a resistance gear; when a control signal is received instructing the parameter adjustable oscillator to increase the frequency of the clock signal, a resistance step is increased.
Of course, other adjustment manners may also be adopted, and the embodiment of the present invention is not limited thereto.
Optionally, the method further includes:
the clock detection circuit judges that the absolute value of the difference between the obtained count value and the expected count value is smaller than a preset threshold value, and outputs a second enabling signal to the calibration circuit so as to control the calibration circuit to enter a non-working state;
and the calibration circuit enters a non-working state when receiving the second enabling signal.
In the method, the first enable signal EN is 0, and the second enable signal EN is 1;
alternatively, the first enable signal EN is 1, and the second enable signal EN is 0.
Depending on the implementation of the calibration circuit.
The embodiment of the present invention further provides a chip, which includes all modules of any one of the above devices for calibrating a clock frequency, and further includes:
the configuration module is used for configuring parameters of the parameter-adjustable oscillator when the chip is powered on;
the other circuits work based on the clock signals and are used for working according to the clock signals output by the parameter adjustable oscillator;
the tunable parameter oscillator is further configured to:
and after the configuration module performs parameter configuration, outputting a clock signal with a frequency corresponding to the configured parameter.
Wherein the configuration module may be a CPU.
Although the embodiments of the present invention have been described above, the above description is only for the convenience of understanding the present invention, and is not intended to limit the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (9)
1. An apparatus for calibrating a clock frequency, comprising:
the clock detection circuit is used for counting the clock signals output by the parameter adjustable oscillator at regular time to obtain a count value, judging that the absolute value of the difference between the obtained count value and an expected count value is greater than or equal to a preset threshold value, and outputting a first enabling signal to the calibration circuit to control the calibration circuit to enter a working state;
the calibration circuit is used for entering a working state when receiving the first enabling signal and outputting a control signal to the parameter adjustable oscillator according to the obtained counting value so that the parameter adjustable oscillator adjusts the frequency of the clock signal;
the parameter adjustable oscillator is used for outputting the output clock signal to a clock detection circuit and other circuits working based on the clock signal and adjusting the frequency of the clock signal according to a control signal;
a reference clock circuit for generating periodic detection pulses;
the clock detection circuit is specifically configured to count the clock signal output by the parameter-adjustable oscillator by the timing to obtain a count value in the following manner:
when receiving the detection pulse from the reference clock circuit in a non-counting state, starting to count the clock signal output by the parameter adjustable oscillator; and when the counting state receives the detection pulse from the reference clock circuit, stopping counting the clock signal output by the parameter adjustable oscillator and obtaining a count value.
2. The apparatus of claim 1, wherein the clock detection circuit is further configured to:
judging that the absolute value of the difference between the obtained count value and the expected count value is smaller than a preset threshold value, and outputting a second enabling signal to the calibration circuit to control the calibration circuit to enter a non-working state;
the calibration circuit is further configured to:
and entering a non-working state when the second enabling signal is received.
3. The apparatus according to claim 1 or 2, wherein the calibration circuit is specifically configured to implement the outputting of the control signal to the parameter-adjustable oscillator according to the obtained count value by:
judging that the obtained count value is larger than the expected count value, and outputting a control signal for indicating the parameter adjustable oscillator to reduce the frequency of a clock signal to the parameter adjustable oscillator;
the parameter-adjustable oscillator is specifically configured to:
and outputting the output clock signal to a clock detection circuit and other circuits working based on the clock signal, and reducing the frequency of the clock signal according to a control signal for instructing the parameter-adjustable oscillator to reduce the frequency of the clock signal.
4. The apparatus according to claim 1 or 2, wherein the calibration circuit is specifically configured to implement the outputting of the control signal to the parameter-adjustable oscillator according to the obtained count value by:
judging that the obtained count value is smaller than the expected count value, and outputting a control signal for indicating the parameter adjustable oscillator to increase the frequency of a clock signal to the parameter adjustable oscillator;
the parameter-adjustable oscillator is specifically configured to:
and outputting the output clock signal to a clock detection circuit and other circuits operating based on the clock signal, and increasing the frequency of the clock signal according to a control signal for indicating the parameter-adjustable oscillator to increase the frequency of the clock signal.
5. A method of calibrating a clock frequency, comprising:
the parameter adjustable oscillator outputs the output clock signal to a clock detection circuit and other circuits working based on the clock signal;
the clock detection circuit counts clock signals output by the parameter adjustable oscillator in a timing mode to obtain a count value, judges that the absolute value of the difference between the obtained count value and an expected count value is larger than or equal to a preset threshold value, and outputs a first enabling signal to the calibration circuit to control the calibration circuit to enter a working state;
the calibration circuit enters a working state when receiving the first enabling signal, and outputs a control signal to the parameter adjustable oscillator according to the obtained counting value so that the parameter adjustable oscillator adjusts the frequency of the clock signal;
the parameter adjustable oscillator adjusts the frequency of the clock signal according to the control signal;
the clock detection circuit is used for counting the clock signals output by the parameter adjustable oscillator to obtain a count value at regular time and comprises the following steps:
a reference clock circuit generates periodic detection pulses;
when the clock detection circuit receives a detection pulse from the reference clock circuit in a non-counting state, the clock detection circuit starts to count the clock signal output by the parameter adjustable oscillator; and when the counting state receives the detection pulse from the reference clock circuit, stopping counting the clock signal output by the parameter adjustable oscillator and obtaining a count value.
6. The method of claim 5, further comprising:
the clock detection circuit judges that the absolute value of the difference between the obtained count value and the expected count value is smaller than a preset threshold value, and outputs a second enabling signal to the calibration circuit so as to control the calibration circuit to enter a non-working state;
and the calibration circuit enters a non-working state when receiving the second enabling signal.
7. The method of claim 5 or 6, wherein outputting a control signal to a parametrically adjustable oscillator by the calibration circuit based on the derived count value comprises:
the calibration circuit judges that the obtained count value is larger than the expected count value, and outputs a control signal for indicating the parameter adjustable oscillator to reduce the frequency of a clock signal to the parameter adjustable oscillator;
the parameter-adjustable oscillator adjusting the frequency of the clock signal according to the control signal includes:
and reducing the frequency of the clock signal according to a control signal for instructing the parameter-adjustable oscillator to reduce the frequency of the clock signal.
8. The method of claim 5 or 6, wherein outputting a control signal to a parametrically adjustable oscillator by the calibration circuit based on the derived count value comprises:
judging that the obtained count value is smaller than the expected count value, and outputting a control signal for indicating the parameter adjustable oscillator to increase the frequency of a clock signal to the parameter adjustable oscillator;
the parameter-adjustable oscillator adjusting the frequency of the clock signal according to the control signal includes:
the frequency of the clock signal is increased according to a control signal for instructing the parameter adjustable oscillator to increase the frequency of the clock signal.
9. A chip comprising all modules of the apparatus for calibrating a clock frequency according to any one of claims 1 to 4, further comprising:
the configuration module is used for configuring parameters of the parameter-adjustable oscillator when the chip is powered on;
the other circuits work based on the clock signals and are used for working according to the clock signals output by the parameter adjustable oscillator;
the tunable parameter oscillator is further configured to:
and after the configuration module performs parameter configuration, outputting a clock signal with a frequency corresponding to the configured parameter.
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